Pyalpha tools for performance audio demo in PRSDK.
[processor-sdk/performance-audio-tools.git] / alpha / src_a.hdM
1 // src_a.hdM: inverse compilation file [Wed Mar 28 14:11:17 CDT 2018]
3 #define readSRCMode 0xc247,0x0400
4 #define writeSRCModeDisable 0xca47,0x0400
5 #define writeSRCModeEnable 0xca47,0x0401
6 #define readSRCRateRequest 0xc247,0x0500
7 #define writeSRCRateRequestFull 0xca47,0x0500
8 #define writeSRCRateRequestHalf 0xca47,0x0501
9 #define writeSRCRateRequestQuarter 0xca47,0x0502
10 #define writeSRCRateRequestDouble 0xca47,0x0503
11 #define writeSRCRateRequestQuadruple 0xca47,0x0504
12 #define writeSRCRateRequestMax192 0xca47,0x0580
13 #define writeSRCRateRequestMax96 0xca47,0x0581
14 #define writeSRCRateRequestMax48 0xca47,0x0582
15 #define writeSRCRateRequestMin64 0xca47,0x0583
16 #define writeSRCRateRequestMin128 0xca47,0x0584
17 #define readSRCRateStream 0xc247,0x0600
18 #define wroteSRCRateStreamFull 0xca47,0x0600
19 #define wroteSRCRateStreamHalf 0xca47,0x0601
20 #define wroteSRCRateStreamQuarter 0xca47,0x0602
21 #define wroteSRCRateStreamDouble 0xca47,0x0603
22 #define wroteSRCRateStreamQuadruple 0xca47,0x0604
23 #define readSRCSampleRate 0xc247,0x0700
24 #define wroteSRCSampleRateUnknown 0xca47,0x0700
25 #define wroteSRCSampleRateNone 0xca47,0x0701
26 #define wroteSRCSampleRate11025Hz 0xca47,0x070c
27 #define wroteSRCSampleRate12000Hz 0xca47,0x070d
28 #define wroteSRCSampleRate16000Hz 0xca47,0x070e
29 #define wroteSRCSampleRate22050Hz 0xca47,0x070f
30 #define wroteSRCSampleRate24000Hz 0xca47,0x0710
31 #define wroteSRCSampleRate32000Hz 0xca47,0x0702
32 #define wroteSRCSampleRate44100Hz 0xca47,0x0703
33 #define wroteSRCSampleRate48000Hz 0xca47,0x0704
34 #define wroteSRCSampleRate64000Hz 0xca47,0x0708
35 #define wroteSRCSampleRate88200Hz 0xca47,0x0705
36 #define wroteSRCSampleRate96000Hz 0xca47,0x0706
37 #define wroteSRCSampleRate128000Hz 0xca47,0x0709
38 #define wroteSRCSampleRate176400Hz 0xca47,0x070a
39 #define wroteSRCSampleRate192000Hz 0xca47,0x0707
40 #define readSRCStatus 0xc508,0x0047
41 #define readSRCControl 0xc247,0x0400,0xc247,0x0500
42 #define readSRC_B_Mode 0xc24f,0x0400
43 #define writeSRC_B_ModeDisable 0xca4f,0x0400
44 #define writeSRC_B_ModeEnable 0xca4f,0x0401
45 #define readSRC_B_RateRequest 0xc24f,0x0500
46 #define writeSRC_B_RateRequestFull 0xca4f,0x0500
47 #define writeSRC_B_RateRequestHalf 0xca4f,0x0501
48 #define writeSRC_B_RateRequestQuarter 0xca4f,0x0502
49 #define writeSRC_B_RateRequestDouble 0xca4f,0x0503
50 #define writeSRC_B_RateRequestQuadruple 0xca4f,0x0504
51 #define writeSRC_B_RateRequestMax192 0xca4f,0x0580
52 #define writeSRC_B_RateRequestMax96 0xca4f,0x0581
53 #define writeSRC_B_RateRequestMax48 0xca4f,0x0582
54 #define writeSRC_B_RateRequestMin64 0xca4f,0x0583
55 #define writeSRC_B_RateRequestMin128 0xca4f,0x0584
56 #define readSRC_B_RateStream 0xc24f,0x0600
57 #define wroteSRC_B_RateStreamFull 0xca4f,0x0600
58 #define wroteSRC_B_RateStreamHalf 0xca4f,0x0601
59 #define wroteSRC_B_RateStreamQuarter 0xca4f,0x0602
60 #define wroteSRC_B_RateStreamDouble 0xca4f,0x0603
61 #define wroteSRC_B_RateStreamQuadruple 0xca4f,0x0604
62 #define readSRC_B_SampleRate 0xc24f,0x0700
63 #define wroteSRC_B_SampleRateUnknown 0xca4f,0x0700
64 #define wroteSRC_B_SampleRateNone 0xca4f,0x0701
65 #define wroteSRC_B_SampleRate11025Hz 0xca4f,0x070c
66 #define wroteSRC_B_SampleRate12000Hz 0xca4f,0x070d
67 #define wroteSRC_B_SampleRate16000Hz 0xca4f,0x070e
68 #define wroteSRC_B_SampleRate22050Hz 0xca4f,0x070f
69 #define wroteSRC_B_SampleRate24000Hz 0xca4f,0x0710
70 #define wroteSRC_B_SampleRate32000Hz 0xca4f,0x0702
71 #define wroteSRC_B_SampleRate44100Hz 0xca4f,0x0703
72 #define wroteSRC_B_SampleRate48000Hz 0xca4f,0x0704
73 #define wroteSRC_B_SampleRate64000Hz 0xca4f,0x0708
74 #define wroteSRC_B_SampleRate88200Hz 0xca4f,0x0705
75 #define wroteSRC_B_SampleRate96000Hz 0xca4f,0x0706
76 #define wroteSRC_B_SampleRate128000Hz 0xca4f,0x0709
77 #define wroteSRC_B_SampleRate176400Hz 0xca4f,0x070a
78 #define wroteSRC_B_SampleRate192000Hz 0xca4f,0x0707
79 #define readSRC_B_Status 0xc508,0x004f
80 #define readSRC_B_Control 0xc24f,0x0400,0xc24f,0x0500