| author | Suman Anna <s-anna@ti.com> | |
| Mon, 15 Mar 2021 22:54:19 +0000 (17:54 -0500) | ||
| committer | Suman Anna <s-anna@ti.com> | |
| Tue, 16 Mar 2021 15:22:26 +0000 (10:22 -0500) | ||
| commit | 0f2ebe7ed4aadfc42f69b64dfd4a00819d7be1d3 | |
| tree | 1da9336ecc6364ebdaaec2bbccb2d4200879a74e | tree | snapshot (tar.xz tar.gz zip) |
| parent | a9bff6f43001cf66dc1ed3ef7e9dfb688b67f7bb | commit | diff |
examples/am65x: Fixup linker command files for resource table alignment
The AM65x SoCs use an ARMv8 Cortex-A53 core for running Linux. The Linux
kernel is 64-bit and uses 8-byte (64-bit) pointers, but the various
PRU/RTU/Tx_PRU cores in ICSSG are 32-bit cores. The resource table section
therefore needs to be aligned on 8-byte addresses for proper pointer
dereferencing of different resource types on the Linux side.
The addresses are aligned on existing examples only by chance. Update all
the relevant linker cmd files to enforce the alignment that will be
effective even with any automatic shifting that might happen with some
code changes otherwise.
Signed-off-by: Suman Anna <s-anna@ti.com>
The AM65x SoCs use an ARMv8 Cortex-A53 core for running Linux. The Linux
kernel is 64-bit and uses 8-byte (64-bit) pointers, but the various
PRU/RTU/Tx_PRU cores in ICSSG are 32-bit cores. The resource table section
therefore needs to be aligned on 8-byte addresses for proper pointer
dereferencing of different resource types on the Linux side.
The addresses are aligned on existing examples only by chance. Update all
the relevant linker cmd files to enforce the alignment that will be
effective even with any automatic shifting that might happen with some
code changes otherwise.
Signed-off-by: Suman Anna <s-anna@ti.com>
14 files changed: