ARM: dts: am437x-gp-evm: Enable wkup_m3 control of IO isolation
[rpmsg/hwspinlock.git] / arch / arm / boot / dts / am437x-gp-evm.dts
1 /*
2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 /* AM437x GP EVM */
11 /dts-v1/;
13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h>
18 / {
19         model = "TI AM437x GP EVM";
20         compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
22         aliases {
23                 display0 = &lcd0;
24         };
26         chosen {
27                 stdout-path = &uart0;
28         };
30         evm_v3_3d: fixedregulator-v3_3d {
31                 compatible = "regulator-fixed";
32                 regulator-name = "evm_v3_3d";
33                 regulator-min-microvolt = <3300000>;
34                 regulator-max-microvolt = <3300000>;
35                 enable-active-high;
36         };
38         vtt_fixed: fixedregulator-vtt {
39                 compatible = "regulator-fixed";
40                 regulator-name = "vtt_fixed";
41                 regulator-min-microvolt = <1500000>;
42                 regulator-max-microvolt = <1500000>;
43                 regulator-always-on;
44                 regulator-boot-on;
45                 enable-active-high;
46                 gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
47         };
49         vmmcwl_fixed: fixedregulator-mmcwl {
50                 compatible = "regulator-fixed";
51                 regulator-name = "vmmcwl_fixed";
52                 regulator-min-microvolt = <1800000>;
53                 regulator-max-microvolt = <1800000>;
54                 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
55                 enable-active-high;
56         };
58         lcd_bl: backlight {
59                 compatible = "pwm-backlight";
60                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
61                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
62                 default-brightness-level = <8>;
63         };
65         matrix_keypad: matrix_keypad0 {
66                 compatible = "gpio-matrix-keypad";
67                 debounce-delay-ms = <5>;
68                 col-scan-delay-us = <2>;
70                 row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
71                                 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
72                                 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
74                 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
75                                 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
77                 linux,keymap = <0x00000201      /* P1 */
78                                 0x00010202      /* P2 */
79                                 0x01000067      /* UP */
80                                 0x0101006a      /* RIGHT */
81                                 0x02000069      /* LEFT */
82                                 0x0201006c>;      /* DOWN */
83                 };
85         lcd0: display {
86                 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
87                 label = "lcd";
89                 backlight = <&lcd_bl>;
91                 panel-timing {
92                         clock-frequency = <33000000>;
93                         hactive = <800>;
94                         vactive = <480>;
95                         hfront-porch = <210>;
96                         hback-porch = <16>;
97                         hsync-len = <30>;
98                         vback-porch = <10>;
99                         vfront-porch = <22>;
100                         vsync-len = <13>;
101                         hsync-active = <0>;
102                         vsync-active = <0>;
103                         de-active = <1>;
104                         pixelclk-active = <1>;
105                 };
107                 port {
108                         lcd_in: endpoint {
109                                 remote-endpoint = <&dpi_out>;
110                         };
111                 };
112         };
114         /* fixed 12MHz oscillator */
115         refclk: oscillator {
116                 #clock-cells = <0>;
117                 compatible = "fixed-clock";
118                 clock-frequency = <12000000>;
119         };
121         /* fixed 32k external oscillator clock */
122         clk_32k_rtc: clk_32k_rtc {
123                 #clock-cells = <0>;
124                 compatible = "fixed-clock";
125                 clock-frequency = <32768>;
126         };
128         sound0: sound0 {
129                 compatible = "simple-audio-card";
130                 simple-audio-card,name = "AM437x-GP-EVM";
131                 simple-audio-card,widgets =
132                         "Headphone", "Headphone Jack",
133                         "Line", "Line In";
134                 simple-audio-card,routing =
135                         "Headphone Jack",       "HPLOUT",
136                         "Headphone Jack",       "HPROUT",
137                         "LINE1L",               "Line In",
138                         "LINE1R",               "Line In";
139                 simple-audio-card,format = "dsp_b";
140                 simple-audio-card,bitclock-master = <&sound0_master>;
141                 simple-audio-card,frame-master = <&sound0_master>;
142                 simple-audio-card,bitclock-inversion;
144                 simple-audio-card,cpu {
145                         sound-dai = <&mcasp1>;
146                         system-clock-frequency = <12000000>;
147                 };
149                 sound0_master: simple-audio-card,codec {
150                         sound-dai = <&tlv320aic3106>;
151                         system-clock-frequency = <12000000>;
152                 };
153         };
155         beeper: beeper {
156                 compatible = "gpio-beeper";
157                 pinctrl-names = "default";
158                 pinctrl-0 = <&beeper_pins>;
159                 gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
160         };
161 };
163 &am43xx_pinmux {
164         pinctrl-names = "default", "sleep";
165         pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default>;
166         pinctrl-1 = <&wlan_pins_sleep>;
168         ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
169                 pinctrl-single,pins = <
170                         0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
171                 >;
172         };
174         i2c0_pins: i2c0_pins {
175                 pinctrl-single,pins = <
176                         AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
177                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
178                 >;
179         };
181         i2c1_pins: i2c1_pins {
182                 pinctrl-single,pins = <
183                         AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
184                         AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
185                 >;
186         };
188         mmc1_pins: pinmux_mmc1_pins {
189                 pinctrl-single,pins = <
190                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
191                 >;
192         };
194         ecap0_pins: backlight_pins {
195                 pinctrl-single,pins = <
196                         AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
197                 >;
198         };
200         pixcir_ts_pins: pixcir_ts_pins {
201                 pinctrl-single,pins = <
202                         AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
203                 >;
204         };
206         cpsw_default: cpsw_default {
207                 pinctrl-single,pins = <
208                         /* Slave 1 */
209                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
210                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
211                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
212                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
213                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
214                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
215                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
216                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
217                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
218                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
219                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
220                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
221                 >;
222         };
224         cpsw_sleep: cpsw_sleep {
225                 pinctrl-single,pins = <
226                         /* Slave 1 reset value */
227                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
228                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
229                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
230                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
231                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
232                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
233                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
234                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
235                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
236                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
237                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
238                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
239                 >;
240         };
242         davinci_mdio_default: davinci_mdio_default {
243                 pinctrl-single,pins = <
244                         /* MDIO */
245                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
246                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
247                 >;
248         };
250         davinci_mdio_sleep: davinci_mdio_sleep {
251                 pinctrl-single,pins = <
252                         /* MDIO reset value */
253                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
254                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
255                 >;
256         };
258         nand_flash_x8: nand_flash_x8 {
259                 pinctrl-single,pins = <
260                         AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
261                         AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
262                         AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
263                         AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
264                         AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
265                         AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
266                         AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
267                         AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
268                         AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
269                         AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
270                         AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
271                         AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
272                         AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
273                         AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
274                         AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
275                 >;
276         };
278         dss_pins: dss_pins {
279                 pinctrl-single,pins = <
280                         AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
281                         AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
282                         AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
283                         AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
284                         AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
285                         AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
286                         AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
287                         AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
288                         AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
289                         AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
290                         AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
291                         AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
292                         AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
293                         AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
294                         AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
295                         AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
296                         AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
297                         AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
298                         AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
299                         AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
300                         AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
301                         AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
302                         AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
303                         AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
304                         AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
305                         AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
306                         AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
307                         AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
309                 >;
310         };
312         display_mux_pins: display_mux_pins {
313                 pinctrl-single,pins = <
314                         /* GPIO 5_8 to select LCD / HDMI */
315                         AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
316                 >;
317         };
319         dcan0_default: dcan0_default_pins {
320                 pinctrl-single,pins = <
321                         AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
322                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_rtsn.d_can0_rx */
323                 >;
324         };
326         dcan0_sleep: dcan0_sleep_pins {
327                 pinctrl-single,pins = <
328                         AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_ctsn.gpio0_12 */
329                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rtsn.gpio0_13 */
330                 >;
331         };
333         dcan1_default: dcan1_default_pins {
334                 pinctrl-single,pins = <
335                         AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)             /* uart1_rxd.d_can1_tx */
336                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.d_can1_rx */
337                 >;
338         };
340         dcan1_sleep: dcan1_sleep_pins {
341                 pinctrl-single,pins = <
342                         AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rxd.gpio0_14 */
343                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_txd.gpio0_15 */
344                 >;
345         };
347         vpfe0_pins_default: vpfe0_pins_default {
348                 pinctrl-single,pins = <
349                         AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
350                         AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
351                         AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
352                         AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
353                         AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
354                         AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
355                         AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
356                         AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
357                         AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
358                         AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
359                         AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
360                         AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
361                         AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
362                 >;
363         };
365         vpfe0_pins_sleep: vpfe0_pins_sleep {
366                 pinctrl-single,pins = <
367                         AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
368                         AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
369                         AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
370                         AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
371                         AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
372                         AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
373                         AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
374                         AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
375                         AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
376                         AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
377                         AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
378                         AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
379                         AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
380                 >;
381         };
383         vpfe1_pins_default: vpfe1_pins_default {
384                 pinctrl-single,pins = <
385                         AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
386                         AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
387                         AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
388                         AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
389                         AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
390                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
391                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
392                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
393                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
394                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
395                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
396                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
397                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
398                 >;
399         };
401         vpfe1_pins_sleep: vpfe1_pins_sleep {
402                 pinctrl-single,pins = <
403                         AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
404                         AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
405                         AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
406                         AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
407                         AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
408                         AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
409                         AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
410                         AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
411                         AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
412                         AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
413                         AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
414                         AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
415                         AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
416                 >;
417         };
419         mmc3_pins_default: pinmux_mmc3_pins_default {
420                 pinctrl-single,pins = <
421                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
422                         AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
423                         AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
424                         AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
425                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
426                         AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
427                 >;
428         };
430         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
431                 pinctrl-single,pins = <
432                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_clk.mmc2_clk */
433                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_csn3.mmc2_cmd */
434                         AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a1.mmc2_dat0 */
435                         AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a2.mmc2_dat1 */
436                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a3.mmc2_dat2 */
437                         AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_be1n.mmc2_dat3 */
438                 >;
439         };
441         wlan_pins_default: pinmux_wlan_pins_default {
442                 pinctrl-single,pins = <
443                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
444                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
445                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
446                 >;
447         };
449         wlan_pins_sleep: pinmux_wlan_pins_sleep {
450                 pinctrl-single,pins = <
451                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
452                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
453                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)              /* gpmc_a0.gpio1_16 BT_EN*/
454                 >;
455         };
457         uart3_pins: uart3_pins {
458                 pinctrl-single,pins = <
459                         AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)              /* uart3_rxd.uart3_rxd */
460                         AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
461                         AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart3_ctsn.uart3_ctsn */
462                         AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
463                 >;
464         };
466         mcasp1_pins: mcasp1_pins {
467                 pinctrl-single,pins = <
468                         AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
469                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
470                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
471                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
472                 >;
473         };
475         mcasp1_sleep_pins: mcasp1_sleep_pins {
476                 pinctrl-single,pins = <
477                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
478                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
479                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
480                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
481                 >;
482         };
484         gpio0_pins: gpio0_pins {
485                 pinctrl-single,pins = <
486                         AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
487                 >;
488         };
490         emmc_pins_default: emmc_pins_default {
491                 pinctrl-single,pins = <
492                         AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
493                         AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
494                         AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
495                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
496                         AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
497                         AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
498                         AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
499                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
500                         AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
501                         AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
502                 >;
503         };
505         emmc_pins_sleep: emmc_pins_sleep {
506                 pinctrl-single,pins = <
507                         AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
508                         AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
509                         AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
510                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
511                         AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
512                         AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
513                         AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
514                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
515                         AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
516                         AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
517                 >;
518         };
520         uart0_pins_default: uart0_pins_default {
521                 pinctrl-single,pins = <
522                         AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0)              /* uart0_ctsn.uart0_ctsn */
523                         AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_rtsn.uart0_rtsn */
524                         AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
525                         AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
526                 >;
527         };
529         beeper_pins: beeper_pins {
530                 pinctrl-single,pins = <
531                         AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
532                 >;
533         };
535 };
537 &uart0 {
538         status = "okay";
539         pinctrl-names = "default";
540         pinctrl-0 = <&uart0_pins_default>;
541 };
543 &i2c0 {
544         status = "okay";
545         pinctrl-names = "default";
546         pinctrl-0 = <&i2c0_pins>;
547         clock-frequency = <100000>;
549         tps65218: tps65218@24 {
550                 reg = <0x24>;
551                 compatible = "ti,tps65218";
552                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
553                 interrupt-controller;
554                 #interrupt-cells = <2>;
556                 dcdc1: regulator-dcdc1 {
557                         regulator-name = "vdd_core";
558                         regulator-min-microvolt = <912000>;
559                         regulator-max-microvolt = <1144000>;
560                         regulator-boot-on;
561                         regulator-always-on;
562                 };
564                 dcdc2: regulator-dcdc2 {
565                         regulator-name = "vdd_mpu";
566                         regulator-min-microvolt = <912000>;
567                         regulator-max-microvolt = <1378000>;
568                         regulator-boot-on;
569                         regulator-always-on;
570                 };
572                 dcdc3: regulator-dcdc3 {
573                         regulator-name = "vdcdc3";
574                         regulator-boot-on;
575                         regulator-always-on;
576                         regulator-state-mem {
577                                 regulator-on-in-suspend;
578                         };
579                         regulator-state-disk {
580                                 regulator-off-in-suspend;
581                         };
582                 };
584                 dcdc5: regulator-dcdc5 {
585                         regulator-name = "v1_0bat";
586                         regulator-min-microvolt = <1000000>;
587                         regulator-max-microvolt = <1000000>;
588                         regulator-boot-on;
589                         regulator-always-on;
590                         regulator-state-mem {
591                                 regulator-on-in-suspend;
592                         };
593                 };
595                 dcdc6: regulator-dcdc6 {
596                         regulator-name = "v1_8bat";
597                         regulator-min-microvolt = <1800000>;
598                         regulator-max-microvolt = <1800000>;
599                         regulator-boot-on;
600                         regulator-always-on;
601                         regulator-state-mem {
602                                 regulator-on-in-suspend;
603                         };
604                 };
606                 ldo1: regulator-ldo1 {
607                         regulator-min-microvolt = <1800000>;
608                         regulator-max-microvolt = <1800000>;
609                         regulator-boot-on;
610                         regulator-always-on;
611                 };
612         };
614         ov2659@30 {
615                 compatible = "ovti,ov2659";
616                 reg = <0x30>;
618                 clocks = <&refclk 0>;
619                 clock-names = "xvclk";
621                 port {
622                         ov2659_0: endpoint {
623                                 remote-endpoint = <&vpfe1_ep>;
624                                 link-frequencies = /bits/ 64 <70000000>;
625                         };
626                 };
627         };
628 };
630 &i2c1 {
631         status = "okay";
632         pinctrl-names = "default";
633         pinctrl-0 = <&i2c1_pins>;
634         pixcir_ts@5c {
635                 compatible = "pixcir,pixcir_tangoc";
636                 pinctrl-names = "default";
637                 pinctrl-0 = <&pixcir_ts_pins>;
638                 reg = <0x5c>;
640                 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
642                 /*
643                  * 0x264 represents the offset of padconf register of
644                  * gpio3_22 from am43xx_pinmux base.
645                  */
646                 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
647                                       <&am43xx_pinmux 0x264>;
648                 interrupt-names = "tsc", "wakeup";
650                 touchscreen-size-x = <1024>;
651                 touchscreen-size-y = <600>;
652                 wakeup-source;
653         };
655         ov2659@30 {
656                 compatible = "ovti,ov2659";
657                 reg = <0x30>;
659                 clocks = <&refclk 0>;
660                 clock-names = "xvclk";
662                 port {
663                         ov2659_1: endpoint {
664                                 remote-endpoint = <&vpfe0_ep>;
665                                 link-frequencies = /bits/ 64 <70000000>;
666                         };
667                 };
668         };
670         tlv320aic3106: tlv320aic3106@1b {
671                 #sound-dai-cells = <0>;
672                 compatible = "ti,tlv320aic3106";
673                 reg = <0x1b>;
674                 status = "okay";
676                 /* Regulators */
677                 IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
678                 AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
679                 DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
680                 DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
681         };
682 };
684 &epwmss0 {
685         status = "okay";
686 };
688 &tscadc {
689         status = "okay";
691         adc {
692                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
693         };
694 };
696 &ecap0 {
697         status = "okay";
698         pinctrl-names = "default";
699         pinctrl-0 = <&ecap0_pins>;
700 };
702 &gpio0 {
703         pinctrl-names = "default";
704         pinctrl-0 = <&gpio0_pins>;
705         status = "okay";
707         p23 {
708                 gpio-hog;
709                 gpios = <23 GPIO_ACTIVE_HIGH>;
710                 /* SelEMMCorNAND selects between eMMC and NAND:
711                  * Low: NAND
712                  * High: eMMC
713                  * When changing this line make sure the newly
714                  * selected device node is enabled and the previously
715                  * selected device node is disabled.
716                  */
717                 output-low;
718                 line-name = "SelEMMCorNAND";
719         };
720 };
722 &gpio1 {
723         status = "okay";
724 };
726 &gpio3 {
727         status = "okay";
728 };
730 &gpio4 {
731         status = "okay";
732 };
734 &gpio5 {
735         pinctrl-names = "default";
736         pinctrl-0 = <&display_mux_pins>;
737         status = "okay";
738         ti,no-reset-on-init;
740         p8 {
741                 /*
742                  * SelLCDorHDMI selects between display and audio paths:
743                  * Low: HDMI display with audio via HDMI
744                  * High: LCD display with analog audio via aic3111 codec
745                  */
746                 gpio-hog;
747                 gpios = <8 GPIO_ACTIVE_HIGH>;
748                 output-high;
749                 line-name = "SelLCDorHDMI";
750         };
751 };
753 &mmc1 {
754         status = "okay";
755         vmmc-supply = <&evm_v3_3d>;
756         bus-width = <4>;
757         pinctrl-names = "default";
758         pinctrl-0 = <&mmc1_pins>;
759         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
760 };
762 /* eMMC sits on mmc2 */
763 &mmc2 {
764         /*
765          * When enabling eMMC, disable GPMC/NAND and set
766          * SelEMMCorNAND to output-high
767          */
768         status = "disabled";
769         vmmc-supply = <&evm_v3_3d>;
770         bus-width = <8>;
771         pinctrl-names = "default", "sleep";
772         pinctrl-0 = <&emmc_pins_default>;
773         pinctrl-1 = <&emmc_pins_sleep>;
774         ti,non-removable;
775 };
777 &mmc3 {
778         status = "okay";
779         /* these are on the crossbar and are outlined in the
780            xbar-event-map element */
781         dmas = <&edma_xbar 30 0 1>,
782                 <&edma_xbar 31 0 2>;
783         dma-names = "tx", "rx";
784         vmmc-supply = <&vmmcwl_fixed>;
785         bus-width = <4>;
786         pinctrl-names = "default", "sleep";
787         pinctrl-0 = <&mmc3_pins_default>;
788         pinctrl-1 = <&mmc3_pins_sleep>;
789         cap-power-off-card;
790         keep-power-in-suspend;
791         ti,non-removable;
793         #address-cells = <1>;
794         #size-cells = <0>;
795         wlcore: wlcore@0 {
796                 compatible = "ti,wl1835";
797                 reg = <2>;
798                 interrupt-parent = <&gpio1>;
799                 interrupts = <23 IRQ_TYPE_EDGE_RISING>;
800         };
801 };
803 &uart3 {
804         status = "okay";
805         pinctrl-names = "default";
806         pinctrl-0 = <&uart3_pins>;
807 };
809 &usb2_phy1 {
810         status = "okay";
811 };
813 &usb1 {
814         dr_mode = "otg";
815         status = "okay";
816 };
818 &usb2_phy2 {
819         status = "okay";
820 };
822 &usb2 {
823         dr_mode = "host";
824         status = "okay";
825 };
827 &mac {
828         slaves = <1>;
829         pinctrl-names = "default", "sleep";
830         pinctrl-0 = <&cpsw_default>;
831         pinctrl-1 = <&cpsw_sleep>;
832         status = "okay";
833 };
835 &davinci_mdio {
836         pinctrl-names = "default", "sleep";
837         pinctrl-0 = <&davinci_mdio_default>;
838         pinctrl-1 = <&davinci_mdio_sleep>;
839         status = "okay";
840 };
842 &cpsw_emac0 {
843         phy_id = <&davinci_mdio>, <0>;
844         phy-mode = "rgmii";
845 };
847 &elm {
848         status = "okay";
849 };
851 &gpmc {
852         /*
853          * When enabling GPMC, disable eMMC and set
854          * SelEMMCorNAND to output-low
855          */
856         status = "okay";
857         pinctrl-names = "default";
858         pinctrl-0 = <&nand_flash_x8>;
859         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
860         nand@0,0 {
861                 compatible = "ti,omap2-nand";
862                 reg = <0 0 4>;          /* device IO registers */
863                 interrupt-parent = <&gpmc>;
864                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
865                              <1 IRQ_TYPE_NONE>; /* termcount */
866                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
867                 ti,nand-xfer-type = "prefetch-dma";
868                 ti,nand-ecc-opt = "bch16";
869                 ti,elm-id = <&elm>;
870                 nand-bus-width = <8>;
871                 gpmc,device-width = <1>;
872                 gpmc,sync-clk-ps = <0>;
873                 gpmc,cs-on-ns = <0>;
874                 gpmc,cs-rd-off-ns = <40>;
875                 gpmc,cs-wr-off-ns = <40>;
876                 gpmc,adv-on-ns = <0>;
877                 gpmc,adv-rd-off-ns = <25>;
878                 gpmc,adv-wr-off-ns = <25>;
879                 gpmc,we-on-ns = <0>;
880                 gpmc,we-off-ns = <20>;
881                 gpmc,oe-on-ns = <3>;
882                 gpmc,oe-off-ns = <30>;
883                 gpmc,access-ns = <30>;
884                 gpmc,rd-cycle-ns = <40>;
885                 gpmc,wr-cycle-ns = <40>;
886                 gpmc,bus-turnaround-ns = <0>;
887                 gpmc,cycle2cycle-delay-ns = <0>;
888                 gpmc,clk-activation-ns = <0>;
889                 gpmc,wr-access-ns = <40>;
890                 gpmc,wr-data-mux-bus-ns = <0>;
891                 /* MTD partition table */
892                 /* All SPL-* partitions are sized to minimal length
893                  * which can be independently programmable. For
894                  * NAND flash this is equal to size of erase-block */
895                 #address-cells = <1>;
896                 #size-cells = <1>;
897                 partition@0 {
898                         label = "NAND.SPL";
899                         reg = <0x00000000 0x00040000>;
900                 };
901                 partition@1 {
902                         label = "NAND.SPL.backup1";
903                         reg = <0x00040000 0x00040000>;
904                 };
905                 partition@2 {
906                         label = "NAND.SPL.backup2";
907                         reg = <0x00080000 0x00040000>;
908                 };
909                 partition@3 {
910                         label = "NAND.SPL.backup3";
911                         reg = <0x000c0000 0x00040000>;
912                 };
913                 partition@4 {
914                         label = "NAND.u-boot-spl-os";
915                         reg = <0x00100000 0x00080000>;
916                 };
917                 partition@5 {
918                         label = "NAND.u-boot";
919                         reg = <0x00180000 0x00100000>;
920                 };
921                 partition@6 {
922                         label = "NAND.u-boot-env";
923                         reg = <0x00280000 0x00040000>;
924                 };
925                 partition@7 {
926                         label = "NAND.u-boot-env.backup1";
927                         reg = <0x002c0000 0x00040000>;
928                 };
929                 partition@8 {
930                         label = "NAND.kernel";
931                         reg = <0x00300000 0x00700000>;
932                 };
933                 partition@9 {
934                         label = "NAND.file-system";
935                         reg = <0x00a00000 0x1f600000>;
936                 };
937         };
938 };
940 &dss {
941         status = "ok";
943         pinctrl-names = "default";
944         pinctrl-0 = <&dss_pins>;
946         port {
947                 dpi_out: endpoint {
948                         remote-endpoint = <&lcd_in>;
949                         data-lines = <24>;
950                 };
951         };
952 };
954 &dcan0 {
955         pinctrl-names = "default", "sleep";
956         pinctrl-0 = <&dcan0_default>;
957         pinctrl-1 = <&dcan0_sleep>;
958         status = "okay";
959 };
961 &dcan1 {
962         pinctrl-names = "default", "sleep";
963         pinctrl-0 = <&dcan1_default>;
964         pinctrl-1 = <&dcan1_sleep>;
965         status = "okay";
966 };
968 &vpfe0 {
969         status = "okay";
970         pinctrl-names = "default", "sleep";
971         pinctrl-0 = <&vpfe0_pins_default>;
972         pinctrl-1 = <&vpfe0_pins_sleep>;
974         port {
975                 vpfe0_ep: endpoint {
976                         remote-endpoint = <&ov2659_1>;
977                         ti,am437x-vpfe-interface = <0>;
978                         bus-width = <8>;
979                         hsync-active = <0>;
980                         vsync-active = <0>;
981                 };
982         };
983 };
985 &vpfe1 {
986         status = "okay";
987         pinctrl-names = "default", "sleep";
988         pinctrl-0 = <&vpfe1_pins_default>;
989         pinctrl-1 = <&vpfe1_pins_sleep>;
991         port {
992                 vpfe1_ep: endpoint {
993                         remote-endpoint = <&ov2659_0>;
994                         ti,am437x-vpfe-interface = <0>;
995                         bus-width = <8>;
996                         hsync-active = <0>;
997                         vsync-active = <0>;
998                 };
999         };
1000 };
1002 &mcasp1 {
1003         #sound-dai-cells = <0>;
1004         pinctrl-names = "default", "sleep";
1005         pinctrl-0 = <&mcasp1_pins>;
1006         pinctrl-1 = <&mcasp1_sleep_pins>;
1008         status = "okay";
1010         op-mode = <0>; /* MCASP_IIS_MODE */
1011         tdm-slots = <2>;
1012         /* 4 serializers */
1013         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1014                 0 0 1 2
1015         >;
1016         tx-num-evt = <32>;
1017         rx-num-evt = <32>;
1018 };
1020 &rtc {
1021         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1022         clock-names = "ext-clk", "int-clk";
1023         status = "okay";
1024 };
1026 &cpu {
1027         cpu0-supply = <&dcdc2>;
1028 };
1030 &wkup_m3_ipc {
1031         ti,set-io-isolation;
1032 };