ARM: dts: am437x-gp-evm: Add pinctrl for unused_pins
[rpmsg/hwspinlock.git] / arch / arm / boot / dts / am437x-gp-evm.dts
1 /*
2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 /* AM437x GP EVM */
11 /dts-v1/;
13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h>
18 / {
19         model = "TI AM437x GP EVM";
20         compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
22         aliases {
23                 display0 = &lcd0;
24         };
26         chosen {
27                 stdout-path = &uart0;
28         };
30         evm_v3_3d: fixedregulator-v3_3d {
31                 compatible = "regulator-fixed";
32                 regulator-name = "evm_v3_3d";
33                 regulator-min-microvolt = <3300000>;
34                 regulator-max-microvolt = <3300000>;
35                 enable-active-high;
36         };
38         vtt_fixed: fixedregulator-vtt {
39                 compatible = "regulator-fixed";
40                 regulator-name = "vtt_fixed";
41                 regulator-min-microvolt = <1500000>;
42                 regulator-max-microvolt = <1500000>;
43                 regulator-always-on;
44                 regulator-boot-on;
45                 enable-active-high;
46                 gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
47         };
49         vmmcwl_fixed: fixedregulator-mmcwl {
50                 compatible = "regulator-fixed";
51                 regulator-name = "vmmcwl_fixed";
52                 regulator-min-microvolt = <1800000>;
53                 regulator-max-microvolt = <1800000>;
54                 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
55                 enable-active-high;
56         };
58         lcd_bl: backlight {
59                 compatible = "pwm-backlight";
60                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
61                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
62                 default-brightness-level = <8>;
63         };
65         matrix_keypad: matrix_keypad0 {
66                 compatible = "gpio-matrix-keypad";
67                 debounce-delay-ms = <5>;
68                 col-scan-delay-us = <2>;
70                 row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
71                                 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
72                                 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
74                 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
75                                 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
77                 linux,keymap = <0x00000201      /* P1 */
78                                 0x00010202      /* P2 */
79                                 0x01000067      /* UP */
80                                 0x0101006a      /* RIGHT */
81                                 0x02000069      /* LEFT */
82                                 0x0201006c>;      /* DOWN */
83                 };
85         lcd0: display {
86                 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
87                 label = "lcd";
89                 backlight = <&lcd_bl>;
91                 panel-timing {
92                         clock-frequency = <33000000>;
93                         hactive = <800>;
94                         vactive = <480>;
95                         hfront-porch = <210>;
96                         hback-porch = <16>;
97                         hsync-len = <30>;
98                         vback-porch = <10>;
99                         vfront-porch = <22>;
100                         vsync-len = <13>;
101                         hsync-active = <0>;
102                         vsync-active = <0>;
103                         de-active = <1>;
104                         pixelclk-active = <1>;
105                 };
107                 port {
108                         lcd_in: endpoint {
109                                 remote-endpoint = <&dpi_out>;
110                         };
111                 };
112         };
114         /* fixed 12MHz oscillator */
115         refclk: oscillator {
116                 #clock-cells = <0>;
117                 compatible = "fixed-clock";
118                 clock-frequency = <12000000>;
119         };
121         /* fixed 32k external oscillator clock */
122         clk_32k_rtc: clk_32k_rtc {
123                 #clock-cells = <0>;
124                 compatible = "fixed-clock";
125                 clock-frequency = <32768>;
126         };
128         sound0: sound0 {
129                 compatible = "simple-audio-card";
130                 simple-audio-card,name = "AM437x-GP-EVM";
131                 simple-audio-card,widgets =
132                         "Headphone", "Headphone Jack",
133                         "Line", "Line In";
134                 simple-audio-card,routing =
135                         "Headphone Jack",       "HPLOUT",
136                         "Headphone Jack",       "HPROUT",
137                         "LINE1L",               "Line In",
138                         "LINE1R",               "Line In";
139                 simple-audio-card,format = "dsp_b";
140                 simple-audio-card,bitclock-master = <&sound0_master>;
141                 simple-audio-card,frame-master = <&sound0_master>;
142                 simple-audio-card,bitclock-inversion;
144                 simple-audio-card,cpu {
145                         sound-dai = <&mcasp1>;
146                         system-clock-frequency = <12000000>;
147                 };
149                 sound0_master: simple-audio-card,codec {
150                         sound-dai = <&tlv320aic3106>;
151                         system-clock-frequency = <12000000>;
152                 };
153         };
155         beeper: beeper {
156                 compatible = "gpio-beeper";
157                 pinctrl-names = "default";
158                 pinctrl-0 = <&beeper_pins>;
159                 gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
160         };
161 };
163 &am43xx_pinmux {
164         pinctrl-names = "default", "sleep";
165         pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins>;
166         pinctrl-1 = <&wlan_pins_sleep>;
168         ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
169                 pinctrl-single,pins = <
170                         0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
171                 >;
172         };
174         i2c0_pins: i2c0_pins {
175                 pinctrl-single,pins = <
176                         AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
177                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
178                 >;
179         };
181         i2c1_pins: i2c1_pins {
182                 pinctrl-single,pins = <
183                         AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
184                         AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
185                 >;
186         };
188         mmc1_pins: pinmux_mmc1_pins {
189                 pinctrl-single,pins = <
190                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
191                 >;
192         };
194         ecap0_pins: backlight_pins {
195                 pinctrl-single,pins = <
196                         AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
197                 >;
198         };
200         pixcir_ts_pins: pixcir_ts_pins {
201                 pinctrl-single,pins = <
202                         AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
203                 >;
204         };
206         cpsw_default: cpsw_default {
207                 pinctrl-single,pins = <
208                         /* Slave 1 */
209                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
210                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
211                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
212                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
213                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
214                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
215                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
216                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
217                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
218                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
219                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
220                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
221                 >;
222         };
224         cpsw_sleep: cpsw_sleep {
225                 pinctrl-single,pins = <
226                         /* Slave 1 reset value */
227                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
228                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
229                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
230                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
231                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
232                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
233                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
234                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
235                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
236                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
237                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
238                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
239                 >;
240         };
242         davinci_mdio_default: davinci_mdio_default {
243                 pinctrl-single,pins = <
244                         /* MDIO */
245                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
246                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
247                 >;
248         };
250         davinci_mdio_sleep: davinci_mdio_sleep {
251                 pinctrl-single,pins = <
252                         /* MDIO reset value */
253                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
254                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
255                 >;
256         };
258         nand_flash_x8: nand_flash_x8 {
259                 pinctrl-single,pins = <
260                         AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
261                         AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
262                         AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
263                         AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
264                         AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
265                         AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
266                         AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
267                         AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
268                         AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
269                         AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
270                         AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
271                         AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
272                         AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
273                         AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
274                         AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
275                 >;
276         };
278         dss_pins: dss_pins {
279                 pinctrl-single,pins = <
280                         AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
281                         AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
282                         AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
283                         AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
284                         AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
285                         AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
286                         AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
287                         AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
288                         AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
289                         AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
290                         AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
291                         AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
292                         AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
293                         AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
294                         AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
295                         AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
296                         AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
297                         AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
298                         AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
299                         AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
300                         AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
301                         AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
302                         AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
303                         AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
304                         AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
305                         AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
306                         AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
307                         AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
309                 >;
310         };
312         display_mux_pins: display_mux_pins {
313                 pinctrl-single,pins = <
314                         /* GPIO 5_8 to select LCD / HDMI */
315                         AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
316                 >;
317         };
319         dcan0_default: dcan0_default_pins {
320                 pinctrl-single,pins = <
321                         AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
322                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_rtsn.d_can0_rx */
323                 >;
324         };
326         dcan0_sleep: dcan0_sleep_pins {
327                 pinctrl-single,pins = <
328                         AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_ctsn.gpio0_12 */
329                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rtsn.gpio0_13 */
330                 >;
331         };
333         dcan1_default: dcan1_default_pins {
334                 pinctrl-single,pins = <
335                         AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)             /* uart1_rxd.d_can1_tx */
336                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.d_can1_rx */
337                 >;
338         };
340         dcan1_sleep: dcan1_sleep_pins {
341                 pinctrl-single,pins = <
342                         AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rxd.gpio0_14 */
343                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_txd.gpio0_15 */
344                 >;
345         };
347         vpfe0_pins_default: vpfe0_pins_default {
348                 pinctrl-single,pins = <
349                         AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
350                         AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
351                         AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
352                         AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
353                         AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
354                         AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
355                         AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
356                         AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
357                         AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
358                         AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
359                         AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
360                         AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
361                         AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
362                 >;
363         };
365         vpfe0_pins_sleep: vpfe0_pins_sleep {
366                 pinctrl-single,pins = <
367                         AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
368                         AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
369                         AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
370                         AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
371                         AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
372                         AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
373                         AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
374                         AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
375                         AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
376                         AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
377                         AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
378                         AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
379                         AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
380                 >;
381         };
383         vpfe1_pins_default: vpfe1_pins_default {
384                 pinctrl-single,pins = <
385                         AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
386                         AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
387                         AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
388                         AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
389                         AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
390                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
391                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
392                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
393                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
394                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
395                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
396                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
397                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
398                 >;
399         };
401         vpfe1_pins_sleep: vpfe1_pins_sleep {
402                 pinctrl-single,pins = <
403                         AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
404                         AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
405                         AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
406                         AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
407                         AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
408                         AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
409                         AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
410                         AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
411                         AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
412                         AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
413                         AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
414                         AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
415                         AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
416                 >;
417         };
419         mmc3_pins_default: pinmux_mmc3_pins_default {
420                 pinctrl-single,pins = <
421                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
422                         AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
423                         AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
424                         AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
425                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
426                         AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
427                 >;
428         };
430         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
431                 pinctrl-single,pins = <
432                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_clk.mmc2_clk */
433                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_csn3.mmc2_cmd */
434                         AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a1.mmc2_dat0 */
435                         AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a2.mmc2_dat1 */
436                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a3.mmc2_dat2 */
437                         AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_be1n.mmc2_dat3 */
438                 >;
439         };
441         wlan_pins_default: pinmux_wlan_pins_default {
442                 pinctrl-single,pins = <
443                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
444                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
445                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
446                 >;
447         };
449         wlan_pins_sleep: pinmux_wlan_pins_sleep {
450                 pinctrl-single,pins = <
451                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
452                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
453                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)              /* gpmc_a0.gpio1_16 BT_EN*/
454                 >;
455         };
457         uart3_pins: uart3_pins {
458                 pinctrl-single,pins = <
459                         AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)              /* uart3_rxd.uart3_rxd */
460                         AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
461                         AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart3_ctsn.uart3_ctsn */
462                         AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
463                 >;
464         };
466         mcasp1_pins: mcasp1_pins {
467                 pinctrl-single,pins = <
468                         AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
469                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
470                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
471                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
472                 >;
473         };
475         mcasp1_sleep_pins: mcasp1_sleep_pins {
476                 pinctrl-single,pins = <
477                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
478                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
479                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
480                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
481                 >;
482         };
484         gpio0_pins: gpio0_pins {
485                 pinctrl-single,pins = <
486                         AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
487                 >;
488         };
490         emmc_pins_default: emmc_pins_default {
491                 pinctrl-single,pins = <
492                         AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
493                         AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
494                         AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
495                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
496                         AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
497                         AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
498                         AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
499                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
500                         AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
501                         AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
502                 >;
503         };
505         emmc_pins_sleep: emmc_pins_sleep {
506                 pinctrl-single,pins = <
507                         AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
508                         AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
509                         AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
510                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
511                         AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
512                         AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
513                         AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
514                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
515                         AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
516                         AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
517                 >;
518         };
520         uart0_pins_default: uart0_pins_default {
521                 pinctrl-single,pins = <
522                         AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0)              /* uart0_ctsn.uart0_ctsn */
523                         AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_rtsn.uart0_rtsn */
524                         AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
525                         AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
526                 >;
527         };
529         beeper_pins: beeper_pins {
530                 pinctrl-single,pins = <
531                         AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
532                 >;
533         };
535         unused_pins: unused_pins {
536                 pinctrl-single,pins = <
537                         AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
538                         AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
539                         AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
540                         AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
541                         AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
542                         AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
543                         AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
544                         AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
545                         AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
546                         AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
547                         AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
548                         AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
549                         AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
550                         AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
551                         AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
552                         AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
553                         AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
554                         AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
555                         AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
556                         AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
557                         AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
558                         AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
559                         AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
560                         AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
561                         AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
562                         AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
563                         AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
564                         AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
565                         AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
566                         AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
567                         AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
568                         AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
569                         AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
570                         AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
571                         AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
572                         AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
573                         AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
574                         AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
575                         AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
576                         AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
577                         AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
578                         AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
579                         AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
580                         AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
581                 >;
582         };
583 };
585 &uart0 {
586         status = "okay";
587         pinctrl-names = "default";
588         pinctrl-0 = <&uart0_pins_default>;
589 };
591 &i2c0 {
592         status = "okay";
593         pinctrl-names = "default";
594         pinctrl-0 = <&i2c0_pins>;
595         clock-frequency = <100000>;
597         tps65218: tps65218@24 {
598                 reg = <0x24>;
599                 compatible = "ti,tps65218";
600                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
601                 interrupt-controller;
602                 #interrupt-cells = <2>;
604                 dcdc1: regulator-dcdc1 {
605                         regulator-name = "vdd_core";
606                         regulator-min-microvolt = <912000>;
607                         regulator-max-microvolt = <1144000>;
608                         regulator-boot-on;
609                         regulator-always-on;
610                 };
612                 dcdc2: regulator-dcdc2 {
613                         regulator-name = "vdd_mpu";
614                         regulator-min-microvolt = <912000>;
615                         regulator-max-microvolt = <1378000>;
616                         regulator-boot-on;
617                         regulator-always-on;
618                 };
620                 dcdc3: regulator-dcdc3 {
621                         regulator-name = "vdcdc3";
622                         regulator-boot-on;
623                         regulator-always-on;
624                         regulator-state-mem {
625                                 regulator-on-in-suspend;
626                         };
627                         regulator-state-disk {
628                                 regulator-off-in-suspend;
629                         };
630                 };
632                 dcdc5: regulator-dcdc5 {
633                         regulator-name = "v1_0bat";
634                         regulator-min-microvolt = <1000000>;
635                         regulator-max-microvolt = <1000000>;
636                         regulator-boot-on;
637                         regulator-always-on;
638                         regulator-state-mem {
639                                 regulator-on-in-suspend;
640                         };
641                 };
643                 dcdc6: regulator-dcdc6 {
644                         regulator-name = "v1_8bat";
645                         regulator-min-microvolt = <1800000>;
646                         regulator-max-microvolt = <1800000>;
647                         regulator-boot-on;
648                         regulator-always-on;
649                         regulator-state-mem {
650                                 regulator-on-in-suspend;
651                         };
652                 };
654                 ldo1: regulator-ldo1 {
655                         regulator-min-microvolt = <1800000>;
656                         regulator-max-microvolt = <1800000>;
657                         regulator-boot-on;
658                         regulator-always-on;
659                 };
660         };
662         ov2659@30 {
663                 compatible = "ovti,ov2659";
664                 reg = <0x30>;
666                 clocks = <&refclk 0>;
667                 clock-names = "xvclk";
669                 port {
670                         ov2659_0: endpoint {
671                                 remote-endpoint = <&vpfe1_ep>;
672                                 link-frequencies = /bits/ 64 <70000000>;
673                         };
674                 };
675         };
676 };
678 &i2c1 {
679         status = "okay";
680         pinctrl-names = "default";
681         pinctrl-0 = <&i2c1_pins>;
682         pixcir_ts@5c {
683                 compatible = "pixcir,pixcir_tangoc";
684                 pinctrl-names = "default";
685                 pinctrl-0 = <&pixcir_ts_pins>;
686                 reg = <0x5c>;
688                 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
690                 /*
691                  * 0x264 represents the offset of padconf register of
692                  * gpio3_22 from am43xx_pinmux base.
693                  */
694                 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
695                                       <&am43xx_pinmux 0x264>;
696                 interrupt-names = "tsc", "wakeup";
698                 touchscreen-size-x = <1024>;
699                 touchscreen-size-y = <600>;
700                 wakeup-source;
701         };
703         ov2659@30 {
704                 compatible = "ovti,ov2659";
705                 reg = <0x30>;
707                 clocks = <&refclk 0>;
708                 clock-names = "xvclk";
710                 port {
711                         ov2659_1: endpoint {
712                                 remote-endpoint = <&vpfe0_ep>;
713                                 link-frequencies = /bits/ 64 <70000000>;
714                         };
715                 };
716         };
718         tlv320aic3106: tlv320aic3106@1b {
719                 #sound-dai-cells = <0>;
720                 compatible = "ti,tlv320aic3106";
721                 reg = <0x1b>;
722                 status = "okay";
724                 /* Regulators */
725                 IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
726                 AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
727                 DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
728                 DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
729         };
730 };
732 &epwmss0 {
733         status = "okay";
734 };
736 &tscadc {
737         status = "okay";
739         adc {
740                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
741         };
742 };
744 &ecap0 {
745         status = "okay";
746         pinctrl-names = "default";
747         pinctrl-0 = <&ecap0_pins>;
748 };
750 &gpio0 {
751         pinctrl-names = "default";
752         pinctrl-0 = <&gpio0_pins>;
753         status = "okay";
755         p23 {
756                 gpio-hog;
757                 gpios = <23 GPIO_ACTIVE_HIGH>;
758                 /* SelEMMCorNAND selects between eMMC and NAND:
759                  * Low: NAND
760                  * High: eMMC
761                  * When changing this line make sure the newly
762                  * selected device node is enabled and the previously
763                  * selected device node is disabled.
764                  */
765                 output-low;
766                 line-name = "SelEMMCorNAND";
767         };
768 };
770 &gpio1 {
771         status = "okay";
772 };
774 &gpio3 {
775         status = "okay";
776 };
778 &gpio4 {
779         status = "okay";
780 };
782 &gpio5 {
783         pinctrl-names = "default";
784         pinctrl-0 = <&display_mux_pins>;
785         status = "okay";
786         ti,no-reset-on-init;
788         p8 {
789                 /*
790                  * SelLCDorHDMI selects between display and audio paths:
791                  * Low: HDMI display with audio via HDMI
792                  * High: LCD display with analog audio via aic3111 codec
793                  */
794                 gpio-hog;
795                 gpios = <8 GPIO_ACTIVE_HIGH>;
796                 output-high;
797                 line-name = "SelLCDorHDMI";
798         };
799 };
801 &mmc1 {
802         status = "okay";
803         vmmc-supply = <&evm_v3_3d>;
804         bus-width = <4>;
805         pinctrl-names = "default";
806         pinctrl-0 = <&mmc1_pins>;
807         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
808 };
810 /* eMMC sits on mmc2 */
811 &mmc2 {
812         /*
813          * When enabling eMMC, disable GPMC/NAND and set
814          * SelEMMCorNAND to output-high
815          */
816         status = "disabled";
817         vmmc-supply = <&evm_v3_3d>;
818         bus-width = <8>;
819         pinctrl-names = "default", "sleep";
820         pinctrl-0 = <&emmc_pins_default>;
821         pinctrl-1 = <&emmc_pins_sleep>;
822         ti,non-removable;
823 };
825 &mmc3 {
826         status = "okay";
827         /* these are on the crossbar and are outlined in the
828            xbar-event-map element */
829         dmas = <&edma_xbar 30 0 1>,
830                 <&edma_xbar 31 0 2>;
831         dma-names = "tx", "rx";
832         vmmc-supply = <&vmmcwl_fixed>;
833         bus-width = <4>;
834         pinctrl-names = "default", "sleep";
835         pinctrl-0 = <&mmc3_pins_default>;
836         pinctrl-1 = <&mmc3_pins_sleep>;
837         cap-power-off-card;
838         keep-power-in-suspend;
839         ti,non-removable;
841         #address-cells = <1>;
842         #size-cells = <0>;
843         wlcore: wlcore@0 {
844                 compatible = "ti,wl1835";
845                 reg = <2>;
846                 interrupt-parent = <&gpio1>;
847                 interrupts = <23 IRQ_TYPE_EDGE_RISING>;
848         };
849 };
851 &uart3 {
852         status = "okay";
853         pinctrl-names = "default";
854         pinctrl-0 = <&uart3_pins>;
855 };
857 &usb2_phy1 {
858         status = "okay";
859 };
861 &usb1 {
862         dr_mode = "otg";
863         status = "okay";
864 };
866 &usb2_phy2 {
867         status = "okay";
868 };
870 &usb2 {
871         dr_mode = "host";
872         status = "okay";
873 };
875 &mac {
876         slaves = <1>;
877         pinctrl-names = "default", "sleep";
878         pinctrl-0 = <&cpsw_default>;
879         pinctrl-1 = <&cpsw_sleep>;
880         status = "okay";
881 };
883 &davinci_mdio {
884         pinctrl-names = "default", "sleep";
885         pinctrl-0 = <&davinci_mdio_default>;
886         pinctrl-1 = <&davinci_mdio_sleep>;
887         status = "okay";
888 };
890 &cpsw_emac0 {
891         phy_id = <&davinci_mdio>, <0>;
892         phy-mode = "rgmii";
893 };
895 &elm {
896         status = "okay";
897 };
899 &gpmc {
900         /*
901          * When enabling GPMC, disable eMMC and set
902          * SelEMMCorNAND to output-low
903          */
904         status = "okay";
905         pinctrl-names = "default";
906         pinctrl-0 = <&nand_flash_x8>;
907         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
908         nand@0,0 {
909                 compatible = "ti,omap2-nand";
910                 reg = <0 0 4>;          /* device IO registers */
911                 interrupt-parent = <&gpmc>;
912                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
913                              <1 IRQ_TYPE_NONE>; /* termcount */
914                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
915                 ti,nand-xfer-type = "prefetch-dma";
916                 ti,nand-ecc-opt = "bch16";
917                 ti,elm-id = <&elm>;
918                 nand-bus-width = <8>;
919                 gpmc,device-width = <1>;
920                 gpmc,sync-clk-ps = <0>;
921                 gpmc,cs-on-ns = <0>;
922                 gpmc,cs-rd-off-ns = <40>;
923                 gpmc,cs-wr-off-ns = <40>;
924                 gpmc,adv-on-ns = <0>;
925                 gpmc,adv-rd-off-ns = <25>;
926                 gpmc,adv-wr-off-ns = <25>;
927                 gpmc,we-on-ns = <0>;
928                 gpmc,we-off-ns = <20>;
929                 gpmc,oe-on-ns = <3>;
930                 gpmc,oe-off-ns = <30>;
931                 gpmc,access-ns = <30>;
932                 gpmc,rd-cycle-ns = <40>;
933                 gpmc,wr-cycle-ns = <40>;
934                 gpmc,bus-turnaround-ns = <0>;
935                 gpmc,cycle2cycle-delay-ns = <0>;
936                 gpmc,clk-activation-ns = <0>;
937                 gpmc,wr-access-ns = <40>;
938                 gpmc,wr-data-mux-bus-ns = <0>;
939                 /* MTD partition table */
940                 /* All SPL-* partitions are sized to minimal length
941                  * which can be independently programmable. For
942                  * NAND flash this is equal to size of erase-block */
943                 #address-cells = <1>;
944                 #size-cells = <1>;
945                 partition@0 {
946                         label = "NAND.SPL";
947                         reg = <0x00000000 0x00040000>;
948                 };
949                 partition@1 {
950                         label = "NAND.SPL.backup1";
951                         reg = <0x00040000 0x00040000>;
952                 };
953                 partition@2 {
954                         label = "NAND.SPL.backup2";
955                         reg = <0x00080000 0x00040000>;
956                 };
957                 partition@3 {
958                         label = "NAND.SPL.backup3";
959                         reg = <0x000c0000 0x00040000>;
960                 };
961                 partition@4 {
962                         label = "NAND.u-boot-spl-os";
963                         reg = <0x00100000 0x00080000>;
964                 };
965                 partition@5 {
966                         label = "NAND.u-boot";
967                         reg = <0x00180000 0x00100000>;
968                 };
969                 partition@6 {
970                         label = "NAND.u-boot-env";
971                         reg = <0x00280000 0x00040000>;
972                 };
973                 partition@7 {
974                         label = "NAND.u-boot-env.backup1";
975                         reg = <0x002c0000 0x00040000>;
976                 };
977                 partition@8 {
978                         label = "NAND.kernel";
979                         reg = <0x00300000 0x00700000>;
980                 };
981                 partition@9 {
982                         label = "NAND.file-system";
983                         reg = <0x00a00000 0x1f600000>;
984                 };
985         };
986 };
988 &dss {
989         status = "ok";
991         pinctrl-names = "default";
992         pinctrl-0 = <&dss_pins>;
994         port {
995                 dpi_out: endpoint {
996                         remote-endpoint = <&lcd_in>;
997                         data-lines = <24>;
998                 };
999         };
1000 };
1002 &dcan0 {
1003         pinctrl-names = "default", "sleep";
1004         pinctrl-0 = <&dcan0_default>;
1005         pinctrl-1 = <&dcan0_sleep>;
1006         status = "okay";
1007 };
1009 &dcan1 {
1010         pinctrl-names = "default", "sleep";
1011         pinctrl-0 = <&dcan1_default>;
1012         pinctrl-1 = <&dcan1_sleep>;
1013         status = "okay";
1014 };
1016 &vpfe0 {
1017         status = "okay";
1018         pinctrl-names = "default", "sleep";
1019         pinctrl-0 = <&vpfe0_pins_default>;
1020         pinctrl-1 = <&vpfe0_pins_sleep>;
1022         port {
1023                 vpfe0_ep: endpoint {
1024                         remote-endpoint = <&ov2659_1>;
1025                         ti,am437x-vpfe-interface = <0>;
1026                         bus-width = <8>;
1027                         hsync-active = <0>;
1028                         vsync-active = <0>;
1029                 };
1030         };
1031 };
1033 &vpfe1 {
1034         status = "okay";
1035         pinctrl-names = "default", "sleep";
1036         pinctrl-0 = <&vpfe1_pins_default>;
1037         pinctrl-1 = <&vpfe1_pins_sleep>;
1039         port {
1040                 vpfe1_ep: endpoint {
1041                         remote-endpoint = <&ov2659_0>;
1042                         ti,am437x-vpfe-interface = <0>;
1043                         bus-width = <8>;
1044                         hsync-active = <0>;
1045                         vsync-active = <0>;
1046                 };
1047         };
1048 };
1050 &mcasp1 {
1051         #sound-dai-cells = <0>;
1052         pinctrl-names = "default", "sleep";
1053         pinctrl-0 = <&mcasp1_pins>;
1054         pinctrl-1 = <&mcasp1_sleep_pins>;
1056         status = "okay";
1058         op-mode = <0>; /* MCASP_IIS_MODE */
1059         tdm-slots = <2>;
1060         /* 4 serializers */
1061         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1062                 0 0 1 2
1063         >;
1064         tx-num-evt = <32>;
1065         rx-num-evt = <32>;
1066 };
1068 &rtc {
1069         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1070         clock-names = "ext-clk", "int-clk";
1071         status = "okay";
1072 };
1074 &cpu {
1075         cpu0-supply = <&dcdc2>;
1076 };
1078 &wkup_m3_ipc {
1079         ti,set-io-isolation;
1080         ti,scale-data-fw = "am43x-evm-scale-data.bin";
1081 };