arch/arm/boot/dts/imx27-pdk.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright 2012 Sascha Hauer, Pengutronix
   4
   5 /dts-v1/;
   6 #include "imx27.dtsi"
   7
   8 / {
   9         model = "Freescale i.MX27 Product Development Kit";
  10         compatible = "fsl,imx27-pdk", "fsl,imx27";
  11
  12         memory@a0000000 {
  13                 reg = <0xa0000000 0x08000000>;
  14         };
  15
  16         usbphy {
  17                 compatible = "simple-bus";
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 usbphy0: usbphy@0 {
  22                         compatible = "usb-nop-xceiv";
  23                         reg = <0>;
  24                         clocks = <&clks IMX27_CLK_DUMMY>;
  25                         clock-names = "main_clk";
  26                         #phy-cells = <0>;
  27                 };
  28         };
  29 };
  30
  31 &cspi2 {
  32         pinctrl-names = "default";
  33         pinctrl-0 = <&pinctrl_cspi2>;
  34         cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
  35         status = "okay";
  36
  37         pmic: mc13783@0 {
  38                 compatible = "fsl,mc13783";
  39                 reg = <0>;
  40                 spi-cs-high;
  41                 spi-max-frequency = <1000000>;
  42                 interrupt-parent = <&gpio3>;
  43                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
  44
  45                 regulators {
  46                         vgen_reg: vgen {
  47                                 regulator-min-microvolt = <1500000>;
  48                                 regulator-max-microvolt = <1500000>;
  49                                 regulator-always-on;
  50                                 regulator-boot-on;
  51                         };
  52
  53                         vmmc1_reg: vmmc1 {
  54                                 regulator-min-microvolt = <1600000>;
  55                                 regulator-max-microvolt = <3000000>;
  56                         };
  57
  58                         gpo1_reg: gpo1 {
  59                                 regulator-always-on;
  60                                 regulator-boot-on;
  61                         };
  62
  63                         gpo3_reg: gpo3 {
  64                                 regulator-always-on;
  65                                 regulator-boot-on;
  66                         };
  67                 };
  68         };
  69 };
  70
  71 &fec {
  72         phy-mode = "mii";
  73         pinctrl-names = "default";
  74         pinctrl-0 = <&pinctrl_fec>;
  75         status = "okay";
  76 };
  77
  78 &kpp {
  79         linux,keymap = <
  80                 MATRIX_KEY(0, 0, KEY_UP)
  81                 MATRIX_KEY(0, 1, KEY_DOWN)
  82                 MATRIX_KEY(1, 0, KEY_RIGHT)
  83                 MATRIX_KEY(1, 1, KEY_LEFT)
  84                 MATRIX_KEY(1, 2, KEY_ENTER)
  85                 MATRIX_KEY(2, 0, KEY_F6)
  86                 MATRIX_KEY(2, 1, KEY_F8)
  87                 MATRIX_KEY(2, 2, KEY_F9)
  88                 MATRIX_KEY(2, 3, KEY_F10)
  89         >;
  90         status = "okay";
  91 };
  92
  93 &nfc {
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&pinctrl_nand>;
  96         nand-ecc-mode = "hw";
  97         nand-on-flash-bbt;
  98         status = "okay";
  99 };
 100
 101 &uart1 {
 102         uart-has-rtscts;
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&pinctrl_uart1>;
 105         status = "okay";
 106 };
 107
 108 &usbotg {
 109         pinctrl-names = "default";
 110         pinctrl-0 = <&pinctrl_usbotg>;
 111         dr_mode = "otg";
 112         fsl,usbphy = <&usbphy0>;
 113         phy_type = "ulpi";
 114         status = "okay";
 115 };
 116
 117 &iomuxc {
 118         imx27-pdk {
 119                 pinctrl_cspi2: cspi2grp {
 120                         fsl,pins = <
 121                                 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
 122                                 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
 123                                 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
 124                                 MX27_PAD_CSPI2_SS0__GPIO4_21    0x0 /* SPI2 CS0 */
 125                                 MX27_PAD_TOUT__GPIO3_14         0x0 /* PMIC IRQ */
 126                         >;
 127                 };
 128
 129                 pinctrl_fec: fecgrp {
 130                         fsl,pins = <
 131                                 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
 132                                 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
 133                                 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
 134                                 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
 135                                 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
 136                                 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
 137                                 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
 138                                 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
 139                                 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
 140                                 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
 141                                 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
 142                                 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
 143                                 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
 144                                 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
 145                                 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
 146                                 MX27_PAD_ATA_DATA13__FEC_COL 0x0
 147                                 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
 148                                 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
 149                         >;
 150                 };
 151
 152                 pinctrl_nand: nandgrp {
 153                         fsl,pins = <
 154                                 MX27_PAD_NFRB__NFRB     0x0
 155                                 MX27_PAD_NFCLE__NFCLE   0x0
 156                                 MX27_PAD_NFWP_B__NFWP_B 0x0
 157                                 MX27_PAD_NFCE_B__NFCE_B 0x0
 158                                 MX27_PAD_NFALE__NFALE   0x0
 159                                 MX27_PAD_NFRE_B__NFRE_B 0x0
 160                                 MX27_PAD_NFWE_B__NFWE_B 0x0
 161                         >;
 162                 };
 163
 164                 pinctrl_uart1: uart1grp {
 165                         fsl,pins = <
 166                                 MX27_PAD_UART1_TXD__UART1_TXD 0x0
 167                                 MX27_PAD_UART1_RXD__UART1_RXD 0x0
 168                                 MX27_PAD_UART1_CTS__UART1_CTS 0x0
 169                                 MX27_PAD_UART1_RTS__UART1_RTS 0x0
 170                         >;
 171                 };
 172
 173                 pinctrl_usbotg: usbotggrp {
 174                         fsl,pins = <
 175                                 MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
 176                                 MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
 177                                 MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
 178                                 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
 179                                 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
 180                                 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
 181                                 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
 182                                 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
 183                                 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
 184                                 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
 185                                 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
 186                                 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
 187                         >;
 188                 };
 189         };
 190 };