1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/suspend.h>
145 #include <linux/bootmem.h>
147 #include <linux/platform_data/ti-sysc.h>
149 #include <dt-bindings/bus/ti-sysc.h>
151 #include <asm/system_misc.h>
153 #include "clock.h"
154 #include "omap_hwmod.h"
156 #include "soc.h"
157 #include "common.h"
158 #include "clockdomain.h"
159 #include "powerdomain.h"
160 #include "cm2xxx.h"
161 #include "cm3xxx.h"
162 #include "cm33xx.h"
163 #include "prm.h"
164 #include "prm3xxx.h"
165 #include "prm44xx.h"
166 #include "prm33xx.h"
167 #include "prminst44xx.h"
168 #include "pm.h"
170 /* Name of the OMAP hwmod for the MPU */
171 #define MPU_INITIATOR_NAME "mpu"
173 /*
174 * Number of struct omap_hwmod_link records per struct
175 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 */
177 #define LINKS_PER_OCP_IF 2
179 /*
180 * Address offset (in bytes) between the reset control and the reset
181 * status registers: 4 bytes on OMAP4
182 */
183 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 /*
186 * Maximum length for module clock handle names
187 */
188 #define MOD_CLK_MAX_NAME_LEN 32
190 /**
191 * struct clkctrl_provider - clkctrl provider mapping data
192 * @addr: base address for the provider
193 * @size: size of the provider address space
194 * @offset: offset of the provider from PRCM instance base
195 * @node: device node associated with the provider
196 * @link: list link
197 */
198 struct clkctrl_provider {
199 u32 addr;
200 u32 size;
201 u16 offset;
202 struct device_node *node;
203 struct list_head link;
204 };
206 static LIST_HEAD(clkctrl_providers);
208 /**
209 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
210 * @enable_module: function to enable a module (via MODULEMODE)
211 * @disable_module: function to disable a module (via MODULEMODE)
212 *
213 * XXX Eventually this functionality will be hidden inside the PRM/CM
214 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
215 * conditionals in this code.
216 */
217 struct omap_hwmod_soc_ops {
218 void (*enable_module)(struct omap_hwmod *oh);
219 int (*disable_module)(struct omap_hwmod *oh);
220 int (*wait_target_ready)(struct omap_hwmod *oh);
221 int (*assert_hardreset)(struct omap_hwmod *oh,
222 struct omap_hwmod_rst_info *ohri);
223 int (*deassert_hardreset)(struct omap_hwmod *oh,
224 struct omap_hwmod_rst_info *ohri);
225 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
226 struct omap_hwmod_rst_info *ohri);
227 int (*init_clkdm)(struct omap_hwmod *oh);
228 void (*update_context_lost)(struct omap_hwmod *oh);
229 int (*get_context_lost)(struct omap_hwmod *oh);
230 int (*disable_direct_prcm)(struct omap_hwmod *oh);
231 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
232 };
234 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
235 static struct omap_hwmod_soc_ops soc_ops;
237 /* omap_hwmod_list contains all registered struct omap_hwmods */
238 static LIST_HEAD(omap_hwmod_list);
240 /* oh_reidle_list contains all omap_hwmods with HWMOD_NEEDS_REIDLE set */
241 static LIST_HEAD(oh_reidle_list);
243 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
244 static struct omap_hwmod *mpu_oh;
246 /* inited: set to true once the hwmod code is initialized */
247 static bool inited;
249 /* Private functions */
251 /**
252 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
253 * @oh: struct omap_hwmod *
254 *
255 * Load the current value of the hwmod OCP_SYSCONFIG register into the
256 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
257 * OCP_SYSCONFIG register or 0 upon success.
258 */
259 static int _update_sysc_cache(struct omap_hwmod *oh)
260 {
261 if (!oh->class->sysc) {
262 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
263 return -EINVAL;
264 }
266 /* XXX ensure module interface clock is up */
268 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
270 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
271 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
273 return 0;
274 }
276 /**
277 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
278 * @v: OCP_SYSCONFIG value to write
279 * @oh: struct omap_hwmod *
280 *
281 * Write @v into the module class' OCP_SYSCONFIG register, if it has
282 * one. No return value.
283 */
284 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
285 {
286 if (!oh->class->sysc) {
287 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
288 return;
289 }
291 /* XXX ensure module interface clock is up */
293 /* Module might have lost context, always update cache and register */
294 oh->_sysc_cache = v;
296 /*
297 * Some IP blocks (such as RTC) require unlocking of IP before
298 * accessing its registers. If a function pointer is present
299 * to unlock, then call it before accessing sysconfig and
300 * call lock after writing sysconfig.
301 */
302 if (oh->class->unlock)
303 oh->class->unlock(oh);
305 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
307 if (oh->class->lock)
308 oh->class->lock(oh);
309 }
311 /**
312 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
313 * @oh: struct omap_hwmod *
314 * @standbymode: MIDLEMODE field bits
315 * @v: pointer to register contents to modify
316 *
317 * Update the master standby mode bits in @v to be @standbymode for
318 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
319 * upon error or 0 upon success.
320 */
321 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
322 u32 *v)
323 {
324 u32 mstandby_mask;
325 u8 mstandby_shift;
327 if (!oh->class->sysc ||
328 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
329 return -EINVAL;
331 if (!oh->class->sysc->sysc_fields) {
332 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
333 return -EINVAL;
334 }
336 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
337 mstandby_mask = (0x3 << mstandby_shift);
339 *v &= ~mstandby_mask;
340 *v |= __ffs(standbymode) << mstandby_shift;
342 return 0;
343 }
345 /**
346 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
347 * @oh: struct omap_hwmod *
348 * @idlemode: SIDLEMODE field bits
349 * @v: pointer to register contents to modify
350 *
351 * Update the slave idle mode bits in @v to be @idlemode for the @oh
352 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
353 * or 0 upon success.
354 */
355 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
356 {
357 u32 sidle_mask;
358 u8 sidle_shift;
360 if (!oh->class->sysc ||
361 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
362 return -EINVAL;
364 if (!oh->class->sysc->sysc_fields) {
365 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
366 return -EINVAL;
367 }
369 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
370 sidle_mask = (0x3 << sidle_shift);
372 *v &= ~sidle_mask;
373 *v |= __ffs(idlemode) << sidle_shift;
375 return 0;
376 }
378 /**
379 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
380 * @oh: struct omap_hwmod *
381 * @clockact: CLOCKACTIVITY field bits
382 * @v: pointer to register contents to modify
383 *
384 * Update the clockactivity mode bits in @v to be @clockact for the
385 * @oh hwmod. Used for additional powersaving on some modules. Does
386 * not write to the hardware. Returns -EINVAL upon error or 0 upon
387 * success.
388 */
389 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
390 {
391 u32 clkact_mask;
392 u8 clkact_shift;
394 if (!oh->class->sysc ||
395 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
396 return -EINVAL;
398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
400 return -EINVAL;
401 }
403 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
404 clkact_mask = (0x3 << clkact_shift);
406 *v &= ~clkact_mask;
407 *v |= clockact << clkact_shift;
409 return 0;
410 }
412 /**
413 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
414 * @oh: struct omap_hwmod *
415 * @v: pointer to register contents to modify
416 *
417 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
418 * error or 0 upon success.
419 */
420 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
421 {
422 u32 softrst_mask;
424 if (!oh->class->sysc ||
425 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
426 return -EINVAL;
428 if (!oh->class->sysc->sysc_fields) {
429 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
430 return -EINVAL;
431 }
433 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
435 *v |= softrst_mask;
437 return 0;
438 }
440 /**
441 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
442 * @oh: struct omap_hwmod *
443 * @v: pointer to register contents to modify
444 *
445 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
446 * error or 0 upon success.
447 */
448 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
449 {
450 u32 softrst_mask;
452 if (!oh->class->sysc ||
453 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
454 return -EINVAL;
456 if (!oh->class->sysc->sysc_fields) {
457 WARN(1,
458 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
459 oh->name);
460 return -EINVAL;
461 }
463 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
465 *v &= ~softrst_mask;
467 return 0;
468 }
470 /**
471 * _wait_softreset_complete - wait for an OCP softreset to complete
472 * @oh: struct omap_hwmod * to wait on
473 *
474 * Wait until the IP block represented by @oh reports that its OCP
475 * softreset is complete. This can be triggered by software (see
476 * _ocp_softreset()) or by hardware upon returning from off-mode (one
477 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
478 * microseconds. Returns the number of microseconds waited.
479 */
480 static int _wait_softreset_complete(struct omap_hwmod *oh)
481 {
482 struct omap_hwmod_class_sysconfig *sysc;
483 u32 softrst_mask;
484 int c = 0;
486 sysc = oh->class->sysc;
488 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
489 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
490 & SYSS_RESETDONE_MASK),
491 MAX_MODULE_SOFTRESET_WAIT, c);
492 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
493 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
494 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
495 & softrst_mask),
496 MAX_MODULE_SOFTRESET_WAIT, c);
497 }
499 return c;
500 }
502 /**
503 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
504 * @oh: struct omap_hwmod *
505 *
506 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
507 * of some modules. When the DMA must perform read/write accesses, the
508 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
509 * for power management, software must set the DMADISABLE bit back to 1.
510 *
511 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
512 * error or 0 upon success.
513 */
514 static int _set_dmadisable(struct omap_hwmod *oh)
515 {
516 u32 v;
517 u32 dmadisable_mask;
519 if (!oh->class->sysc ||
520 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
521 return -EINVAL;
523 if (!oh->class->sysc->sysc_fields) {
524 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
525 return -EINVAL;
526 }
528 /* clocks must be on for this operation */
529 if (oh->_state != _HWMOD_STATE_ENABLED) {
530 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
531 return -EINVAL;
532 }
534 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
536 v = oh->_sysc_cache;
537 dmadisable_mask =
538 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
539 v |= dmadisable_mask;
540 _write_sysconfig(v, oh);
542 return 0;
543 }
545 /**
546 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
547 * @oh: struct omap_hwmod *
548 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
549 * @v: pointer to register contents to modify
550 *
551 * Update the module autoidle bit in @v to be @autoidle for the @oh
552 * hwmod. The autoidle bit controls whether the module can gate
553 * internal clocks automatically when it isn't doing anything; the
554 * exact function of this bit varies on a per-module basis. This
555 * function does not write to the hardware. Returns -EINVAL upon
556 * error or 0 upon success.
557 */
558 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
559 u32 *v)
560 {
561 u32 autoidle_mask;
562 u8 autoidle_shift;
564 if (!oh->class->sysc ||
565 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
566 return -EINVAL;
568 if (!oh->class->sysc->sysc_fields) {
569 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
570 return -EINVAL;
571 }
573 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
574 autoidle_mask = (0x1 << autoidle_shift);
576 *v &= ~autoidle_mask;
577 *v |= autoidle << autoidle_shift;
579 return 0;
580 }
582 /**
583 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
584 * @oh: struct omap_hwmod *
585 *
586 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
587 * upon error or 0 upon success.
588 */
589 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
590 {
591 if (!oh->class->sysc ||
592 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
593 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
594 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
595 return -EINVAL;
597 if (!oh->class->sysc->sysc_fields) {
598 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
599 return -EINVAL;
600 }
602 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
603 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
605 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
606 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
607 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
608 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
610 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
612 return 0;
613 }
615 /**
616 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
617 * @oh: struct omap_hwmod *
618 *
619 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
620 * upon error or 0 upon success.
621 */
622 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
623 {
624 if (!oh->class->sysc ||
625 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
626 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
627 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
628 return -EINVAL;
630 if (!oh->class->sysc->sysc_fields) {
631 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
632 return -EINVAL;
633 }
635 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
636 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
638 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
639 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
640 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
641 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
643 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
645 return 0;
646 }
648 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
649 {
650 struct clk_hw_omap *clk;
652 if (oh->clkdm) {
653 return oh->clkdm;
654 } else if (oh->_clk) {
655 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
656 return NULL;
657 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
658 return clk->clkdm;
659 }
660 return NULL;
661 }
663 /**
664 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
665 * @oh: struct omap_hwmod *
666 *
667 * Prevent the hardware module @oh from entering idle while the
668 * hardare module initiator @init_oh is active. Useful when a module
669 * will be accessed by a particular initiator (e.g., if a module will
670 * be accessed by the IVA, there should be a sleepdep between the IVA
671 * initiator and the module). Only applies to modules in smart-idle
672 * mode. If the clockdomain is marked as not needing autodeps, return
673 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
674 * passes along clkdm_add_sleepdep() value upon success.
675 */
676 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
677 {
678 struct clockdomain *clkdm, *init_clkdm;
680 clkdm = _get_clkdm(oh);
681 init_clkdm = _get_clkdm(init_oh);
683 if (!clkdm || !init_clkdm)
684 return -EINVAL;
686 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
687 return 0;
689 return clkdm_add_sleepdep(clkdm, init_clkdm);
690 }
692 /**
693 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
694 * @oh: struct omap_hwmod *
695 *
696 * Allow the hardware module @oh to enter idle while the hardare
697 * module initiator @init_oh is active. Useful when a module will not
698 * be accessed by a particular initiator (e.g., if a module will not
699 * be accessed by the IVA, there should be no sleepdep between the IVA
700 * initiator and the module). Only applies to modules in smart-idle
701 * mode. If the clockdomain is marked as not needing autodeps, return
702 * 0 without doing anything. Returns -EINVAL upon error or passes
703 * along clkdm_del_sleepdep() value upon success.
704 */
705 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
706 {
707 struct clockdomain *clkdm, *init_clkdm;
709 clkdm = _get_clkdm(oh);
710 init_clkdm = _get_clkdm(init_oh);
712 if (!clkdm || !init_clkdm)
713 return -EINVAL;
715 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
716 return 0;
718 return clkdm_del_sleepdep(clkdm, init_clkdm);
719 }
721 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
722 { .compatible = "ti,clkctrl" },
723 { }
724 };
726 static int __init _setup_clkctrl_provider(struct device_node *np)
727 {
728 const __be32 *addrp;
729 struct clkctrl_provider *provider;
730 u64 size;
732 provider = memblock_virt_alloc(sizeof(*provider), 0);
733 if (!provider)
734 return -ENOMEM;
736 addrp = of_get_address(np, 0, &size, NULL);
737 provider->addr = (u32)of_translate_address(np, addrp);
738 addrp = of_get_address(np->parent, 0, NULL, NULL);
739 provider->offset = provider->addr -
740 (u32)of_translate_address(np->parent, addrp);
741 provider->addr &= ~0xff;
742 provider->size = size | 0xff;
743 provider->node = np;
745 pr_debug("%s: %s: %x...%x [+%x]\n", __func__, np->parent->name,
746 provider->addr, provider->addr + provider->size,
747 provider->offset);
749 list_add(&provider->link, &clkctrl_providers);
751 return 0;
752 }
754 static int __init _init_clkctrl_providers(void)
755 {
756 struct device_node *np;
757 int ret = 0;
759 for_each_matching_node(np, ti_clkctrl_match_table) {
760 ret = _setup_clkctrl_provider(np);
761 if (ret)
762 break;
763 }
765 return ret;
766 }
768 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
769 {
770 if (!oh->prcm.omap4.modulemode)
771 return 0;
773 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
774 oh->clkdm->cm_inst,
775 oh->prcm.omap4.clkctrl_offs);
776 }
778 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
779 {
780 struct clkctrl_provider *provider;
781 struct clk *clk;
782 u32 addr;
784 if (!soc_ops.xlate_clkctrl)
785 return NULL;
787 addr = soc_ops.xlate_clkctrl(oh);
788 if (!addr)
789 return NULL;
791 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
793 list_for_each_entry(provider, &clkctrl_providers, link) {
794 if (provider->addr <= addr &&
795 provider->addr + provider->size >= addr) {
796 struct of_phandle_args clkspec;
798 clkspec.np = provider->node;
799 clkspec.args_count = 2;
800 clkspec.args[0] = addr - provider->addr -
801 provider->offset;
802 clkspec.args[1] = 0;
804 clk = of_clk_get_from_provider(&clkspec);
806 pr_debug("%s: %s got %p (offset=%x, provider=%s)\n",
807 __func__, oh->name, clk, clkspec.args[0],
808 provider->node->parent->name);
810 return clk;
811 }
812 }
814 return NULL;
815 }
817 /**
818 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
819 * @oh: struct omap_hwmod *
820 *
821 * Called from _init_clocks(). Populates the @oh _clk (main
822 * functional clock pointer) if a clock matching the hwmod name is found,
823 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
824 */
825 static int _init_main_clk(struct omap_hwmod *oh)
826 {
827 int ret = 0;
828 struct clk *clk = NULL;
830 clk = _lookup_clkctrl_clk(oh);
832 if (!IS_ERR_OR_NULL(clk)) {
833 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
834 __clk_get_name(clk), oh->name);
835 oh->main_clk = __clk_get_name(clk);
836 oh->_clk = clk;
837 soc_ops.disable_direct_prcm(oh);
838 } else {
839 if (!oh->main_clk)
840 return 0;
842 oh->_clk = clk_get(NULL, oh->main_clk);
843 }
845 if (IS_ERR(oh->_clk)) {
846 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
847 oh->name, oh->main_clk);
848 return -EINVAL;
849 }
850 /*
851 * HACK: This needs a re-visit once clk_prepare() is implemented
852 * to do something meaningful. Today its just a no-op.
853 * If clk_prepare() is used at some point to do things like
854 * voltage scaling etc, then this would have to be moved to
855 * some point where subsystems like i2c and pmic become
856 * available.
857 */
858 clk_prepare(oh->_clk);
860 if (!_get_clkdm(oh))
861 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
862 oh->name, oh->main_clk);
864 return ret;
865 }
867 /**
868 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
869 * @oh: struct omap_hwmod *
870 *
871 * Called from _init_clocks(). Populates the @oh OCP slave interface
872 * clock pointers. Returns 0 on success or -EINVAL on error.
873 */
874 static int _init_interface_clks(struct omap_hwmod *oh)
875 {
876 struct omap_hwmod_ocp_if *os;
877 struct clk *c;
878 int ret = 0;
880 list_for_each_entry(os, &oh->slave_ports, node) {
881 if (!os->clk)
882 continue;
884 c = clk_get(NULL, os->clk);
885 if (IS_ERR(c)) {
886 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
887 oh->name, os->clk);
888 ret = -EINVAL;
889 continue;
890 }
891 os->_clk = c;
892 /*
893 * HACK: This needs a re-visit once clk_prepare() is implemented
894 * to do something meaningful. Today its just a no-op.
895 * If clk_prepare() is used at some point to do things like
896 * voltage scaling etc, then this would have to be moved to
897 * some point where subsystems like i2c and pmic become
898 * available.
899 */
900 clk_prepare(os->_clk);
901 }
903 return ret;
904 }
906 /**
907 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
908 * @oh: struct omap_hwmod *
909 *
910 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
911 * clock pointers. Returns 0 on success or -EINVAL on error.
912 */
913 static int _init_opt_clks(struct omap_hwmod *oh)
914 {
915 struct omap_hwmod_opt_clk *oc;
916 struct clk *c;
917 int i;
918 int ret = 0;
920 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
921 c = clk_get(NULL, oc->clk);
922 if (IS_ERR(c)) {
923 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
924 oh->name, oc->clk);
925 ret = -EINVAL;
926 continue;
927 }
928 oc->_clk = c;
929 /*
930 * HACK: This needs a re-visit once clk_prepare() is implemented
931 * to do something meaningful. Today its just a no-op.
932 * If clk_prepare() is used at some point to do things like
933 * voltage scaling etc, then this would have to be moved to
934 * some point where subsystems like i2c and pmic become
935 * available.
936 */
937 clk_prepare(oc->_clk);
938 }
940 return ret;
941 }
943 static void _enable_optional_clocks(struct omap_hwmod *oh)
944 {
945 struct omap_hwmod_opt_clk *oc;
946 int i;
948 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
950 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
951 if (oc->_clk) {
952 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
953 __clk_get_name(oc->_clk));
954 clk_enable(oc->_clk);
955 }
956 }
958 static void _disable_optional_clocks(struct omap_hwmod *oh)
959 {
960 struct omap_hwmod_opt_clk *oc;
961 int i;
963 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
965 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
966 if (oc->_clk) {
967 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
968 __clk_get_name(oc->_clk));
969 clk_disable(oc->_clk);
970 }
971 }
973 /**
974 * _enable_clocks - enable hwmod main clock and interface clocks
975 * @oh: struct omap_hwmod *
976 *
977 * Enables all clocks necessary for register reads and writes to succeed
978 * on the hwmod @oh. Returns 0.
979 */
980 static int _enable_clocks(struct omap_hwmod *oh)
981 {
982 struct omap_hwmod_ocp_if *os;
984 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
986 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
987 _enable_optional_clocks(oh);
989 if (oh->_clk)
990 clk_enable(oh->_clk);
992 list_for_each_entry(os, &oh->slave_ports, node) {
993 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
994 clk_enable(os->_clk);
995 }
997 /* The opt clocks are controlled by the device driver. */
999 return 0;
1000 }
1002 /**
1003 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1004 * @oh: struct omap_hwmod *
1005 */
1006 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1007 {
1008 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1009 return true;
1011 return false;
1012 }
1014 /**
1015 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1016 * @oh: struct omap_hwmod *
1017 */
1018 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1019 {
1020 if (oh->prcm.omap4.clkctrl_offs)
1021 return true;
1023 if (!oh->prcm.omap4.clkctrl_offs &&
1024 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1025 return true;
1027 return false;
1028 }
1030 /**
1031 * _disable_clocks - disable hwmod main clock and interface clocks
1032 * @oh: struct omap_hwmod *
1033 *
1034 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1035 */
1036 static int _disable_clocks(struct omap_hwmod *oh)
1037 {
1038 struct omap_hwmod_ocp_if *os;
1040 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1042 if (oh->_clk)
1043 clk_disable(oh->_clk);
1045 list_for_each_entry(os, &oh->slave_ports, node) {
1046 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1047 clk_disable(os->_clk);
1048 }
1050 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1051 _disable_optional_clocks(oh);
1053 /* The opt clocks are controlled by the device driver. */
1055 return 0;
1056 }
1058 /**
1059 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1060 * @oh: struct omap_hwmod *
1061 *
1062 * Enables the PRCM module mode related to the hwmod @oh.
1063 * No return value.
1064 */
1065 static void _omap4_enable_module(struct omap_hwmod *oh)
1066 {
1067 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1068 _omap4_clkctrl_managed_by_clkfwk(oh))
1069 return;
1071 pr_debug("omap_hwmod: %s: %s: %d\n",
1072 oh->name, __func__, oh->prcm.omap4.modulemode);
1074 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1075 oh->clkdm->prcm_partition,
1076 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1077 }
1079 /**
1080 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1081 * @oh: struct omap_hwmod *
1082 *
1083 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1084 * does not have an IDLEST bit or if the module successfully enters
1085 * slave idle; otherwise, pass along the return value of the
1086 * appropriate *_cm*_wait_module_idle() function.
1087 */
1088 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1089 {
1090 if (!oh)
1091 return -EINVAL;
1093 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1094 return 0;
1096 if (oh->flags & HWMOD_NO_IDLEST)
1097 return 0;
1099 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1100 return 0;
1102 if (!_omap4_has_clkctrl_clock(oh))
1103 return 0;
1105 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1106 oh->clkdm->cm_inst,
1107 oh->prcm.omap4.clkctrl_offs, 0);
1108 }
1110 /**
1111 * _save_mpu_port_index - find and save the index to @oh's MPU port
1112 * @oh: struct omap_hwmod *
1113 *
1114 * Determines the array index of the OCP slave port that the MPU uses
1115 * to address the device, and saves it into the struct omap_hwmod.
1116 * Intended to be called during hwmod registration only. No return
1117 * value.
1118 */
1119 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1120 {
1121 struct omap_hwmod_ocp_if *os = NULL;
1123 if (!oh)
1124 return;
1126 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1128 list_for_each_entry(os, &oh->slave_ports, node) {
1129 if (os->user & OCP_USER_MPU) {
1130 oh->_mpu_port = os;
1131 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1132 break;
1133 }
1134 }
1136 return;
1137 }
1139 /**
1140 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1141 * @oh: struct omap_hwmod *
1142 *
1143 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1144 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1145 * communicate with the IP block. This interface need not be directly
1146 * connected to the MPU (and almost certainly is not), but is directly
1147 * connected to the IP block represented by @oh. Returns a pointer
1148 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1149 * error or if there does not appear to be a path from the MPU to this
1150 * IP block.
1151 */
1152 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1153 {
1154 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1155 return NULL;
1157 return oh->_mpu_port;
1158 };
1160 /**
1161 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1162 * @oh: struct omap_hwmod *
1163 *
1164 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1165 * by @oh is set to indicate to the PRCM that the IP block is active.
1166 * Usually this means placing the module into smart-idle mode and
1167 * smart-standby, but if there is a bug in the automatic idle handling
1168 * for the IP block, it may need to be placed into the force-idle or
1169 * no-idle variants of these modes. No return value.
1170 */
1171 static void _enable_sysc(struct omap_hwmod *oh)
1172 {
1173 u8 idlemode, sf;
1174 u32 v;
1175 bool clkdm_act;
1176 struct clockdomain *clkdm;
1178 if (!oh->class->sysc)
1179 return;
1181 /*
1182 * Wait until reset has completed, this is needed as the IP
1183 * block is reset automatically by hardware in some cases
1184 * (off-mode for example), and the drivers require the
1185 * IP to be ready when they access it
1186 */
1187 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1188 _enable_optional_clocks(oh);
1189 _wait_softreset_complete(oh);
1190 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1191 _disable_optional_clocks(oh);
1193 v = oh->_sysc_cache;
1194 sf = oh->class->sysc->sysc_flags;
1196 clkdm = _get_clkdm(oh);
1197 if (sf & SYSC_HAS_SIDLEMODE) {
1198 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1199 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1200 idlemode = HWMOD_IDLEMODE_NO;
1201 } else {
1202 if (sf & SYSC_HAS_ENAWAKEUP)
1203 _enable_wakeup(oh, &v);
1204 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1205 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1206 else
1207 idlemode = HWMOD_IDLEMODE_SMART;
1208 }
1210 /*
1211 * This is special handling for some IPs like
1212 * 32k sync timer. Force them to idle!
1213 */
1214 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1215 if (clkdm_act && !(oh->class->sysc->idlemodes &
1216 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1217 idlemode = HWMOD_IDLEMODE_FORCE;
1219 _set_slave_idlemode(oh, idlemode, &v);
1220 }
1222 if (sf & SYSC_HAS_MIDLEMODE) {
1223 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1224 idlemode = HWMOD_IDLEMODE_FORCE;
1225 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1226 idlemode = HWMOD_IDLEMODE_NO;
1227 } else {
1228 if (sf & SYSC_HAS_ENAWAKEUP)
1229 _enable_wakeup(oh, &v);
1230 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1231 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1232 else
1233 idlemode = HWMOD_IDLEMODE_SMART;
1234 }
1235 _set_master_standbymode(oh, idlemode, &v);
1236 }
1238 /*
1239 * XXX The clock framework should handle this, by
1240 * calling into this code. But this must wait until the
1241 * clock structures are tagged with omap_hwmod entries
1242 */
1243 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1244 (sf & SYSC_HAS_CLOCKACTIVITY))
1245 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1247 _write_sysconfig(v, oh);
1249 /*
1250 * Set the autoidle bit only after setting the smartidle bit
1251 * Setting this will not have any impact on the other modules.
1252 */
1253 if (sf & SYSC_HAS_AUTOIDLE) {
1254 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1255 0 : 1;
1256 _set_module_autoidle(oh, idlemode, &v);
1257 _write_sysconfig(v, oh);
1258 }
1259 }
1261 /**
1262 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1263 * @oh: struct omap_hwmod *
1264 *
1265 * If module is marked as SWSUP_SIDLE, force the module into slave
1266 * idle; otherwise, configure it for smart-idle. If module is marked
1267 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1268 * configure it for smart-standby. No return value.
1269 */
1270 static void _idle_sysc(struct omap_hwmod *oh)
1271 {
1272 u8 idlemode, sf;
1273 u32 v;
1275 if (!oh->class->sysc)
1276 return;
1278 v = oh->_sysc_cache;
1279 sf = oh->class->sysc->sysc_flags;
1281 if (sf & SYSC_HAS_SIDLEMODE) {
1282 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1283 idlemode = HWMOD_IDLEMODE_FORCE;
1284 } else {
1285 if (sf & SYSC_HAS_ENAWAKEUP)
1286 _enable_wakeup(oh, &v);
1287 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1288 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1289 else
1290 idlemode = HWMOD_IDLEMODE_SMART;
1291 }
1292 _set_slave_idlemode(oh, idlemode, &v);
1293 }
1295 if (sf & SYSC_HAS_MIDLEMODE) {
1296 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1297 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1298 idlemode = HWMOD_IDLEMODE_FORCE;
1299 } else {
1300 if (sf & SYSC_HAS_ENAWAKEUP)
1301 _enable_wakeup(oh, &v);
1302 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1303 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1304 else
1305 idlemode = HWMOD_IDLEMODE_SMART;
1306 }
1307 _set_master_standbymode(oh, idlemode, &v);
1308 }
1310 /* If the cached value is the same as the new value, skip the write */
1311 if (oh->_sysc_cache != v)
1312 _write_sysconfig(v, oh);
1313 }
1315 /**
1316 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1317 * @oh: struct omap_hwmod *
1318 *
1319 * Force the module into slave idle and master suspend. No return
1320 * value.
1321 */
1322 static void _shutdown_sysc(struct omap_hwmod *oh)
1323 {
1324 u32 v;
1325 u8 sf;
1327 if (!oh->class->sysc)
1328 return;
1330 v = oh->_sysc_cache;
1331 sf = oh->class->sysc->sysc_flags;
1333 if (sf & SYSC_HAS_SIDLEMODE)
1334 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1336 if (sf & SYSC_HAS_MIDLEMODE)
1337 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1339 if (sf & SYSC_HAS_AUTOIDLE)
1340 _set_module_autoidle(oh, 1, &v);
1342 _write_sysconfig(v, oh);
1343 }
1345 /**
1346 * _lookup - find an omap_hwmod by name
1347 * @name: find an omap_hwmod by name
1348 *
1349 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1350 */
1351 static struct omap_hwmod *_lookup(const char *name)
1352 {
1353 struct omap_hwmod *oh, *temp_oh;
1355 oh = NULL;
1357 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1358 if (!strcmp(name, temp_oh->name)) {
1359 oh = temp_oh;
1360 break;
1361 }
1362 }
1364 return oh;
1365 }
1367 /**
1368 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1369 * @oh: struct omap_hwmod *
1370 *
1371 * Convert a clockdomain name stored in a struct omap_hwmod into a
1372 * clockdomain pointer, and save it into the struct omap_hwmod.
1373 * Return -EINVAL if the clkdm_name lookup failed.
1374 */
1375 static int _init_clkdm(struct omap_hwmod *oh)
1376 {
1377 if (!oh->clkdm_name) {
1378 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1379 return 0;
1380 }
1382 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1383 if (!oh->clkdm) {
1384 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1385 oh->name, oh->clkdm_name);
1386 return 0;
1387 }
1389 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1390 oh->name, oh->clkdm_name);
1392 return 0;
1393 }
1395 /**
1396 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1397 * well the clockdomain.
1398 * @oh: struct omap_hwmod *
1399 * @np: device_node mapped to this hwmod
1400 *
1401 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1402 * Resolves all clock names embedded in the hwmod. Returns 0 on
1403 * success, or a negative error code on failure.
1404 */
1405 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1406 {
1407 int ret = 0;
1409 if (oh->_state != _HWMOD_STATE_REGISTERED)
1410 return 0;
1412 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1414 if (soc_ops.init_clkdm)
1415 ret |= soc_ops.init_clkdm(oh);
1417 ret |= _init_main_clk(oh);
1418 ret |= _init_interface_clks(oh);
1419 ret |= _init_opt_clks(oh);
1421 if (!ret)
1422 oh->_state = _HWMOD_STATE_CLKS_INITED;
1423 else
1424 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1426 return ret;
1427 }
1429 /**
1430 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1431 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line in the context of this hwmod
1433 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1434 *
1435 * Return the bit position of the reset line that match the
1436 * input name. Return -ENOENT if not found.
1437 */
1438 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1439 struct omap_hwmod_rst_info *ohri)
1440 {
1441 int i;
1443 for (i = 0; i < oh->rst_lines_cnt; i++) {
1444 const char *rst_line = oh->rst_lines[i].name;
1445 if (!strcmp(rst_line, name)) {
1446 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1447 ohri->st_shift = oh->rst_lines[i].st_shift;
1448 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1449 oh->name, __func__, rst_line, ohri->rst_shift,
1450 ohri->st_shift);
1452 return 0;
1453 }
1454 }
1456 return -ENOENT;
1457 }
1459 /**
1460 * _assert_hardreset - assert the HW reset line of submodules
1461 * contained in the hwmod module.
1462 * @oh: struct omap_hwmod *
1463 * @name: name of the reset line to lookup and assert
1464 *
1465 * Some IP like dsp, ipu or iva contain processor that require an HW
1466 * reset line to be assert / deassert in order to enable fully the IP.
1467 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1468 * asserting the hardreset line on the currently-booted SoC, or passes
1469 * along the return value from _lookup_hardreset() or the SoC's
1470 * assert_hardreset code.
1471 */
1472 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1473 {
1474 struct omap_hwmod_rst_info ohri;
1475 int ret = -EINVAL;
1477 if (!oh)
1478 return -EINVAL;
1480 if (!soc_ops.assert_hardreset)
1481 return -ENOSYS;
1483 ret = _lookup_hardreset(oh, name, &ohri);
1484 if (ret < 0)
1485 return ret;
1487 ret = soc_ops.assert_hardreset(oh, &ohri);
1489 return ret;
1490 }
1492 /**
1493 * _deassert_hardreset - deassert the HW reset line of submodules contained
1494 * in the hwmod module.
1495 * @oh: struct omap_hwmod *
1496 * @name: name of the reset line to look up and deassert
1497 *
1498 * Some IP like dsp, ipu or iva contain processor that require an HW
1499 * reset line to be assert / deassert in order to enable fully the IP.
1500 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1501 * deasserting the hardreset line on the currently-booted SoC, or passes
1502 * along the return value from _lookup_hardreset() or the SoC's
1503 * deassert_hardreset code.
1504 */
1505 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1506 {
1507 struct omap_hwmod_rst_info ohri;
1508 int ret = -EINVAL;
1510 if (!oh)
1511 return -EINVAL;
1513 if (!soc_ops.deassert_hardreset)
1514 return -ENOSYS;
1516 ret = _lookup_hardreset(oh, name, &ohri);
1517 if (ret < 0)
1518 return ret;
1520 if (oh->clkdm) {
1521 /*
1522 * A clockdomain must be in SW_SUP otherwise reset
1523 * might not be completed. The clockdomain can be set
1524 * in HW_AUTO only when the module become ready.
1525 */
1526 clkdm_deny_idle(oh->clkdm);
1527 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1528 if (ret) {
1529 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1530 oh->name, oh->clkdm->name, ret);
1531 return ret;
1532 }
1533 }
1535 _enable_clocks(oh);
1536 if (soc_ops.enable_module)
1537 soc_ops.enable_module(oh);
1539 ret = soc_ops.deassert_hardreset(oh, &ohri);
1541 if (soc_ops.disable_module)
1542 soc_ops.disable_module(oh);
1543 _disable_clocks(oh);
1545 if (ret == -EBUSY)
1546 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1548 if (oh->clkdm) {
1549 /*
1550 * Set the clockdomain to HW_AUTO, assuming that the
1551 * previous state was HW_AUTO.
1552 */
1553 clkdm_allow_idle(oh->clkdm);
1555 clkdm_hwmod_disable(oh->clkdm, oh);
1556 }
1558 return ret;
1559 }
1561 /**
1562 * _read_hardreset - read the HW reset line state of submodules
1563 * contained in the hwmod module
1564 * @oh: struct omap_hwmod *
1565 * @name: name of the reset line to look up and read
1566 *
1567 * Return the state of the reset line. Returns -EINVAL if @oh is
1568 * null, -ENOSYS if we have no way of reading the hardreset line
1569 * status on the currently-booted SoC, or passes along the return
1570 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1571 * code.
1572 */
1573 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1574 {
1575 struct omap_hwmod_rst_info ohri;
1576 int ret = -EINVAL;
1578 if (!oh)
1579 return -EINVAL;
1581 if (!soc_ops.is_hardreset_asserted)
1582 return -ENOSYS;
1584 ret = _lookup_hardreset(oh, name, &ohri);
1585 if (ret < 0)
1586 return ret;
1588 return soc_ops.is_hardreset_asserted(oh, &ohri);
1589 }
1591 /**
1592 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1593 * @oh: struct omap_hwmod *
1594 *
1595 * If all hardreset lines associated with @oh are asserted, then return true.
1596 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1597 * associated with @oh are asserted, then return false.
1598 * This function is used to avoid executing some parts of the IP block
1599 * enable/disable sequence if its hardreset line is set.
1600 */
1601 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1602 {
1603 int i, rst_cnt = 0;
1605 if (oh->rst_lines_cnt == 0)
1606 return false;
1608 for (i = 0; i < oh->rst_lines_cnt; i++)
1609 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1610 rst_cnt++;
1612 if (oh->rst_lines_cnt == rst_cnt)
1613 return true;
1615 return false;
1616 }
1618 /**
1619 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1620 * hard-reset
1621 * @oh: struct omap_hwmod *
1622 *
1623 * If any hardreset lines associated with @oh are asserted, then
1624 * return true. Otherwise, if no hardreset lines associated with @oh
1625 * are asserted, or if @oh has no hardreset lines, then return false.
1626 * This function is used to avoid executing some parts of the IP block
1627 * enable/disable sequence if any hardreset line is set.
1628 */
1629 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1630 {
1631 int rst_cnt = 0;
1632 int i;
1634 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1635 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1636 rst_cnt++;
1638 return (rst_cnt) ? true : false;
1639 }
1641 /**
1642 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1643 * @oh: struct omap_hwmod *
1644 *
1645 * Disable the PRCM module mode related to the hwmod @oh.
1646 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1647 */
1648 static int _omap4_disable_module(struct omap_hwmod *oh)
1649 {
1650 int v;
1652 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1653 _omap4_clkctrl_managed_by_clkfwk(oh))
1654 return -EINVAL;
1656 /*
1657 * Since integration code might still be doing something, only
1658 * disable if all lines are under hardreset.
1659 */
1660 if (_are_any_hardreset_lines_asserted(oh))
1661 return 0;
1663 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1665 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1666 oh->prcm.omap4.clkctrl_offs);
1668 v = _omap4_wait_target_disable(oh);
1669 if (v)
1670 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1671 oh->name);
1673 return 0;
1674 }
1676 /**
1677 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1678 * @oh: struct omap_hwmod *
1679 *
1680 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1681 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1682 * reset this way, -EINVAL if the hwmod is in the wrong state,
1683 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1684 *
1685 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1686 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1687 * use the SYSCONFIG softreset bit to provide the status.
1688 *
1689 * Note that some IP like McBSP do have reset control but don't have
1690 * reset status.
1691 */
1692 static int _ocp_softreset(struct omap_hwmod *oh)
1693 {
1694 u32 v;
1695 int c = 0;
1696 int ret = 0;
1698 if (!oh->class->sysc ||
1699 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1700 return -ENOENT;
1702 /* clocks must be on for this operation */
1703 if (oh->_state != _HWMOD_STATE_ENABLED) {
1704 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1705 oh->name);
1706 return -EINVAL;
1707 }
1709 /* For some modules, all optionnal clocks need to be enabled as well */
1710 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1711 _enable_optional_clocks(oh);
1713 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1715 v = oh->_sysc_cache;
1716 ret = _set_softreset(oh, &v);
1717 if (ret)
1718 goto dis_opt_clks;
1720 _write_sysconfig(v, oh);
1722 if (oh->class->sysc->srst_udelay)
1723 udelay(oh->class->sysc->srst_udelay);
1725 c = _wait_softreset_complete(oh);
1726 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1727 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1728 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1729 ret = -ETIMEDOUT;
1730 goto dis_opt_clks;
1731 } else {
1732 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1733 }
1735 ret = _clear_softreset(oh, &v);
1736 if (ret)
1737 goto dis_opt_clks;
1739 _write_sysconfig(v, oh);
1741 /*
1742 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1743 * _wait_target_ready() or _reset()
1744 */
1746 dis_opt_clks:
1747 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1748 _disable_optional_clocks(oh);
1750 return ret;
1751 }
1753 /**
1754 * _reset - reset an omap_hwmod
1755 * @oh: struct omap_hwmod *
1756 *
1757 * Resets an omap_hwmod @oh. If the module has a custom reset
1758 * function pointer defined, then call it to reset the IP block, and
1759 * pass along its return value to the caller. Otherwise, if the IP
1760 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1761 * associated with it, call a function to reset the IP block via that
1762 * method, and pass along the return value to the caller. Finally, if
1763 * the IP block has some hardreset lines associated with it, assert
1764 * all of those, but do _not_ deassert them. (This is because driver
1765 * authors have expressed an apparent requirement to control the
1766 * deassertion of the hardreset lines themselves.)
1767 *
1768 * The default software reset mechanism for most OMAP IP blocks is
1769 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1770 * hwmods cannot be reset via this method. Some are not targets and
1771 * therefore have no OCP header registers to access. Others (like the
1772 * IVA) have idiosyncratic reset sequences. So for these relatively
1773 * rare cases, custom reset code can be supplied in the struct
1774 * omap_hwmod_class .reset function pointer.
1775 *
1776 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1777 * does not prevent idling of the system. This is necessary for cases
1778 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1779 * kernel without disabling dma.
1780 *
1781 * Passes along the return value from either _ocp_softreset() or the
1782 * custom reset function - these must return -EINVAL if the hwmod
1783 * cannot be reset this way or if the hwmod is in the wrong state,
1784 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1785 */
1786 static int _reset(struct omap_hwmod *oh)
1787 {
1788 int i, r;
1790 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1792 if (oh->class->reset) {
1793 r = oh->class->reset(oh);
1794 } else {
1795 if (oh->rst_lines_cnt > 0) {
1796 for (i = 0; i < oh->rst_lines_cnt; i++)
1797 _assert_hardreset(oh, oh->rst_lines[i].name);
1798 return 0;
1799 } else {
1800 r = _ocp_softreset(oh);
1801 if (r == -ENOENT)
1802 r = 0;
1803 }
1804 }
1806 _set_dmadisable(oh);
1808 /*
1809 * OCP_SYSCONFIG bits need to be reprogrammed after a
1810 * softreset. The _enable() function should be split to avoid
1811 * the rewrite of the OCP_SYSCONFIG register.
1812 */
1813 if (oh->class->sysc) {
1814 _update_sysc_cache(oh);
1815 _enable_sysc(oh);
1816 }
1818 return r;
1819 }
1821 /**
1822 * _omap4_update_context_lost - increment hwmod context loss counter if
1823 * hwmod context was lost, and clear hardware context loss reg
1824 * @oh: hwmod to check for context loss
1825 *
1826 * If the PRCM indicates that the hwmod @oh lost context, increment
1827 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1828 * bits. No return value.
1829 */
1830 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1831 {
1832 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1833 return;
1835 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1836 oh->clkdm->pwrdm.ptr->prcm_offs,
1837 oh->prcm.omap4.context_offs))
1838 return;
1840 oh->prcm.omap4.context_lost_counter++;
1841 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1842 oh->clkdm->pwrdm.ptr->prcm_offs,
1843 oh->prcm.omap4.context_offs);
1844 }
1846 /**
1847 * _omap4_get_context_lost - get context loss counter for a hwmod
1848 * @oh: hwmod to get context loss counter for
1849 *
1850 * Returns the in-memory context loss counter for a hwmod.
1851 */
1852 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1853 {
1854 return oh->prcm.omap4.context_lost_counter;
1855 }
1857 /**
1858 * _enable_preprogram - Pre-program an IP block during the _enable() process
1859 * @oh: struct omap_hwmod *
1860 *
1861 * Some IP blocks (such as AESS) require some additional programming
1862 * after enable before they can enter idle. If a function pointer to
1863 * do so is present in the hwmod data, then call it and pass along the
1864 * return value; otherwise, return 0.
1865 */
1866 static int _enable_preprogram(struct omap_hwmod *oh)
1867 {
1868 if (!oh->class->enable_preprogram)
1869 return 0;
1871 return oh->class->enable_preprogram(oh);
1872 }
1874 /**
1875 * _enable - enable an omap_hwmod
1876 * @oh: struct omap_hwmod *
1877 *
1878 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1879 * register target. Returns -EINVAL if the hwmod is in the wrong
1880 * state or passes along the return value of _wait_target_ready().
1881 */
1882 static int _enable(struct omap_hwmod *oh)
1883 {
1884 int r;
1886 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1888 /*
1889 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1890 * state at init.
1891 */
1892 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1893 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1894 return 0;
1895 }
1897 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1898 oh->_state != _HWMOD_STATE_IDLE &&
1899 oh->_state != _HWMOD_STATE_DISABLED) {
1900 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1901 oh->name);
1902 return -EINVAL;
1903 }
1905 /*
1906 * If an IP block contains HW reset lines and all of them are
1907 * asserted, we let integration code associated with that
1908 * block handle the enable. We've received very little
1909 * information on what those driver authors need, and until
1910 * detailed information is provided and the driver code is
1911 * posted to the public lists, this is probably the best we
1912 * can do.
1913 */
1914 if (_are_all_hardreset_lines_asserted(oh))
1915 return 0;
1917 _add_initiator_dep(oh, mpu_oh);
1919 if (oh->clkdm) {
1920 /*
1921 * A clockdomain must be in SW_SUP before enabling
1922 * completely the module. The clockdomain can be set
1923 * in HW_AUTO only when the module become ready.
1924 */
1925 clkdm_deny_idle(oh->clkdm);
1926 r = clkdm_hwmod_enable(oh->clkdm, oh);
1927 if (r) {
1928 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1929 oh->name, oh->clkdm->name, r);
1930 return r;
1931 }
1932 }
1934 _enable_clocks(oh);
1935 if (soc_ops.enable_module)
1936 soc_ops.enable_module(oh);
1937 if (oh->flags & HWMOD_BLOCK_WFI)
1938 cpu_idle_poll_ctrl(true);
1940 if (soc_ops.update_context_lost)
1941 soc_ops.update_context_lost(oh);
1943 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1944 -EINVAL;
1945 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1946 clkdm_allow_idle(oh->clkdm);
1948 if (!r) {
1949 oh->_state = _HWMOD_STATE_ENABLED;
1951 /* Access the sysconfig only if the target is ready */
1952 if (oh->class->sysc) {
1953 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1954 _update_sysc_cache(oh);
1955 _enable_sysc(oh);
1956 }
1957 r = _enable_preprogram(oh);
1958 } else {
1959 if (soc_ops.disable_module)
1960 soc_ops.disable_module(oh);
1961 _disable_clocks(oh);
1962 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1963 oh->name, r);
1965 if (oh->clkdm)
1966 clkdm_hwmod_disable(oh->clkdm, oh);
1967 }
1969 return r;
1970 }
1972 /**
1973 * _idle - idle an omap_hwmod
1974 * @oh: struct omap_hwmod *
1975 *
1976 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1977 * no further work. Returns -EINVAL if the hwmod is in the wrong
1978 * state or returns 0.
1979 */
1980 static int _idle(struct omap_hwmod *oh)
1981 {
1982 if (oh->flags & HWMOD_NO_IDLE) {
1983 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1984 return 0;
1985 }
1987 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1989 if (_are_all_hardreset_lines_asserted(oh))
1990 return 0;
1992 if (oh->_state != _HWMOD_STATE_ENABLED) {
1993 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1994 oh->name);
1995 return -EINVAL;
1996 }
1998 if (oh->class->sysc)
1999 _idle_sysc(oh);
2000 _del_initiator_dep(oh, mpu_oh);
2002 /*
2003 * If HWMOD_CLKDM_NOAUTO is set then we don't
2004 * deny idle the clkdm again since idle was already denied
2005 * in _enable()
2006 */
2007 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2008 clkdm_deny_idle(oh->clkdm);
2010 if (oh->flags & HWMOD_BLOCK_WFI)
2011 cpu_idle_poll_ctrl(false);
2012 if (soc_ops.disable_module)
2013 soc_ops.disable_module(oh);
2015 /*
2016 * The module must be in idle mode before disabling any parents
2017 * clocks. Otherwise, the parent clock might be disabled before
2018 * the module transition is done, and thus will prevent the
2019 * transition to complete properly.
2020 */
2021 _disable_clocks(oh);
2022 if (oh->clkdm) {
2023 clkdm_allow_idle(oh->clkdm);
2024 clkdm_hwmod_disable(oh->clkdm, oh);
2025 }
2027 oh->_state = _HWMOD_STATE_IDLE;
2029 return 0;
2030 }
2032 /**
2033 * _shutdown - shutdown an omap_hwmod
2034 * @oh: struct omap_hwmod *
2035 *
2036 * Shut down an omap_hwmod @oh. This should be called when the driver
2037 * used for the hwmod is removed or unloaded or if the driver is not
2038 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2039 * state or returns 0.
2040 */
2041 static int _shutdown(struct omap_hwmod *oh)
2042 {
2043 int ret, i;
2044 u8 prev_state;
2046 if (_are_all_hardreset_lines_asserted(oh))
2047 return 0;
2049 if (oh->_state != _HWMOD_STATE_IDLE &&
2050 oh->_state != _HWMOD_STATE_ENABLED) {
2051 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2052 oh->name);
2053 return -EINVAL;
2054 }
2056 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2058 if (oh->class->pre_shutdown) {
2059 prev_state = oh->_state;
2060 if (oh->_state == _HWMOD_STATE_IDLE)
2061 _enable(oh);
2062 ret = oh->class->pre_shutdown(oh);
2063 if (ret) {
2064 if (prev_state == _HWMOD_STATE_IDLE)
2065 _idle(oh);
2066 return ret;
2067 }
2068 }
2070 if (oh->class->sysc) {
2071 if (oh->_state == _HWMOD_STATE_IDLE)
2072 _enable(oh);
2073 _shutdown_sysc(oh);
2074 }
2076 /* clocks and deps are already disabled in idle */
2077 if (oh->_state == _HWMOD_STATE_ENABLED) {
2078 _del_initiator_dep(oh, mpu_oh);
2079 /* XXX what about the other system initiators here? dma, dsp */
2080 if (oh->flags & HWMOD_BLOCK_WFI)
2081 cpu_idle_poll_ctrl(false);
2082 if (soc_ops.disable_module)
2083 soc_ops.disable_module(oh);
2084 _disable_clocks(oh);
2085 if (oh->clkdm)
2086 clkdm_hwmod_disable(oh->clkdm, oh);
2087 }
2088 /* XXX Should this code also force-disable the optional clocks? */
2090 for (i = 0; i < oh->rst_lines_cnt; i++)
2091 _assert_hardreset(oh, oh->rst_lines[i].name);
2093 oh->_state = _HWMOD_STATE_DISABLED;
2095 return 0;
2096 }
2098 static int of_dev_find_hwmod(struct device_node *np,
2099 struct omap_hwmod *oh)
2100 {
2101 int count, i, res;
2102 const char *p;
2104 count = of_property_count_strings(np, "ti,hwmods");
2105 if (count < 1)
2106 return -ENODEV;
2108 for (i = 0; i < count; i++) {
2109 res = of_property_read_string_index(np, "ti,hwmods",
2110 i, &p);
2111 if (res)
2112 continue;
2113 if (!strcmp(p, oh->name)) {
2114 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2115 np->name, i, oh->name);
2116 return i;
2117 }
2118 }
2120 return -ENODEV;
2121 }
2123 /**
2124 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2125 * @np: struct device_node *
2126 * @oh: struct omap_hwmod *
2127 * @index: index of the entry found
2128 * @found: struct device_node * found or NULL
2129 *
2130 * Parse the dt blob and find out needed hwmod. Recursive function is
2131 * implemented to take care hierarchical dt blob parsing.
2132 * Return: Returns 0 on success, -ENODEV when not found.
2133 */
2134 static int of_dev_hwmod_lookup(struct device_node *np,
2135 struct omap_hwmod *oh,
2136 int *index,
2137 struct device_node **found)
2138 {
2139 struct device_node *np0 = NULL;
2140 int res;
2142 res = of_dev_find_hwmod(np, oh);
2143 if (res >= 0) {
2144 *found = np;
2145 *index = res;
2146 return 0;
2147 }
2149 for_each_child_of_node(np, np0) {
2150 struct device_node *fc;
2151 int i;
2153 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2154 if (res == 0) {
2155 *found = fc;
2156 *index = i;
2157 return 0;
2158 }
2159 }
2161 *found = NULL;
2162 *index = 0;
2164 return -ENODEV;
2165 }
2167 /**
2168 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2169 *
2170 * @oh: struct omap_hwmod *
2171 * @np: struct device_node *
2172 *
2173 * Fix up module register offsets for modules with mpu_rt_idx.
2174 * Only needed for cpsw with interconnect target module defined
2175 * in device tree while still using legacy hwmod platform data
2176 * for rev, sysc and syss registers.
2177 *
2178 * Can be removed when all cpsw hwmod platform data has been
2179 * dropped.
2180 */
2181 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2182 struct device_node *np,
2183 struct resource *res)
2184 {
2185 struct device_node *child = NULL;
2186 int error;
2188 child = of_get_next_child(np, child);
2189 if (!child)
2190 return;
2192 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2193 if (error)
2194 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2195 __func__, error);
2196 }
2198 /**
2199 * omap_hwmod_parse_module_range - map module IO range from device tree
2200 * @oh: struct omap_hwmod *
2201 * @np: struct device_node *
2202 *
2203 * Parse the device tree range an interconnect target module provides
2204 * for it's child device IP blocks. This way we can support the old
2205 * "ti,hwmods" property with just dts data without a need for platform
2206 * data for IO resources. And we don't need all the child IP device
2207 * nodes available in the dts.
2208 */
2209 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2210 struct device_node *np,
2211 struct resource *res)
2212 {
2213 struct property *prop;
2214 const __be32 *ranges;
2215 const char *name;
2216 u32 nr_addr, nr_size;
2217 u64 base, size;
2218 int len, error;
2220 if (!res)
2221 return -EINVAL;
2223 ranges = of_get_property(np, "ranges", &len);
2224 if (!ranges)
2225 return -ENOENT;
2227 len /= sizeof(*ranges);
2229 if (len < 3)
2230 return -EINVAL;
2232 of_property_for_each_string(np, "compatible", prop, name)
2233 if (!strncmp("ti,sysc-", name, 8))
2234 break;
2236 if (!name)
2237 return -ENOENT;
2239 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2240 if (error)
2241 return -ENOENT;
2243 error = of_property_read_u32(np, "#size-cells", &nr_size);
2244 if (error)
2245 return -ENOENT;
2247 if (nr_addr != 1 || nr_size != 1) {
2248 pr_err("%s: invalid range for %s->%s\n", __func__,
2249 oh->name, np->name);
2250 return -EINVAL;
2251 }
2253 ranges++;
2254 base = of_translate_address(np, ranges++);
2255 size = be32_to_cpup(ranges);
2257 pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
2258 oh ? oh->name : "", np->name, base, size);
2260 if (oh && oh->mpu_rt_idx) {
2261 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2263 return 0;
2264 }
2266 res->start = base;
2267 res->end = base + size - 1;
2268 res->flags = IORESOURCE_MEM;
2270 return 0;
2271 }
2273 /**
2274 * _setup_reidle- check hwmod @oh and add to reidle list
2275 * @oh: struct omap_hwmod *
2276 * @n: (unused)
2277 *
2278 * Check hwmod for HWMOD_NEEDS_REIDLE flag and add to list if
2279 * necessary. Return 0 on success.
2280 */
2281 static int _setup_reidle(struct omap_hwmod *oh, void *data)
2282 {
2283 int ret;
2285 if (oh->flags & HWMOD_NEEDS_REIDLE) {
2286 ret = omap_hwmod_enable_reidle(oh);
2288 if (!ret)
2289 return ret;
2290 }
2292 return 0;
2293 }
2295 /**
2296 * _init_mpu_rt_base - populate the virtual address for a hwmod
2297 * @oh: struct omap_hwmod * to locate the virtual address
2298 * @data: (unused, caller should pass NULL)
2299 * @index: index of the reg entry iospace in device tree
2300 * @np: struct device_node * of the IP block's device node in the DT data
2301 *
2302 * Cache the virtual address used by the MPU to access this IP block's
2303 * registers. This address is needed early so the OCP registers that
2304 * are part of the device's address space can be ioremapped properly.
2305 *
2306 * If SYSC access is not needed, the registers will not be remapped
2307 * and non-availability of MPU access is not treated as an error.
2308 *
2309 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2310 * -ENXIO on absent or invalid register target address space.
2311 */
2312 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2313 int index, struct device_node *np)
2314 {
2315 void __iomem *va_start = NULL;
2316 struct resource res;
2317 int error;
2319 if (!oh)
2320 return -EINVAL;
2322 _save_mpu_port_index(oh);
2324 /* if we don't need sysc access we don't need to ioremap */
2325 if (!oh->class->sysc)
2326 return 0;
2328 /* we can't continue without MPU PORT if we need sysc access */
2329 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2330 return -ENXIO;
2332 if (!np) {
2333 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2334 return -ENXIO;
2335 }
2337 /* Do we have a dts range for the interconnect target module? */
2338 error = omap_hwmod_parse_module_range(oh, np, &res);
2339 if (!error)
2340 va_start = ioremap(res.start, resource_size(&res));
2342 /* No ranges, rely on device reg entry */
2343 if (!va_start)
2344 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2345 if (!va_start) {
2346 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2347 oh->name, index, np);
2348 return -ENXIO;
2349 }
2351 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2352 oh->name, va_start);
2354 oh->_mpu_rt_va = va_start;
2355 return 0;
2356 }
2358 /**
2359 * _init - initialize internal data for the hwmod @oh
2360 * @oh: struct omap_hwmod *
2361 * @n: (unused)
2362 *
2363 * Look up the clocks and the address space used by the MPU to access
2364 * registers belonging to the hwmod @oh. @oh must already be
2365 * registered at this point. This is the first of two phases for
2366 * hwmod initialization. Code called here does not touch any hardware
2367 * registers, it simply prepares internal data structures. Returns 0
2368 * upon success or if the hwmod isn't registered or if the hwmod's
2369 * address space is not defined, or -EINVAL upon failure.
2370 */
2371 static int __init _init(struct omap_hwmod *oh, void *data)
2372 {
2373 int r, index;
2374 struct device_node *np = NULL;
2375 struct device_node *bus;
2377 if (oh->_state != _HWMOD_STATE_REGISTERED)
2378 return 0;
2380 bus = of_find_node_by_name(NULL, "ocp");
2381 if (!bus)
2382 return -ENODEV;
2384 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2385 if (r)
2386 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2387 else if (np && index)
2388 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2389 oh->name, np->name);
2391 r = _init_mpu_rt_base(oh, NULL, index, np);
2392 if (r < 0) {
2393 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2394 oh->name);
2395 return 0;
2396 }
2398 r = _init_clocks(oh, np);
2399 if (r < 0) {
2400 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2401 return -EINVAL;
2402 }
2404 if (np) {
2405 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2406 oh->flags |= HWMOD_INIT_NO_RESET;
2407 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2408 oh->flags |= HWMOD_INIT_NO_IDLE;
2409 if (of_find_property(np, "ti,no-idle", NULL))
2410 oh->flags |= HWMOD_NO_IDLE;
2411 }
2413 oh->_state = _HWMOD_STATE_INITIALIZED;
2415 return 0;
2416 }
2418 /**
2419 * _setup_iclk_autoidle - configure an IP block's interface clocks
2420 * @oh: struct omap_hwmod *
2421 *
2422 * Set up the module's interface clocks. XXX This function is still mostly
2423 * a stub; implementing this properly requires iclk autoidle usecounting in
2424 * the clock code. No return value.
2425 */
2426 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2427 {
2428 struct omap_hwmod_ocp_if *os;
2430 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2431 return;
2433 list_for_each_entry(os, &oh->slave_ports, node) {
2434 if (!os->_clk)
2435 continue;
2437 if (os->flags & OCPIF_SWSUP_IDLE) {
2438 /* XXX omap_iclk_deny_idle(c); */
2439 } else {
2440 /* XXX omap_iclk_allow_idle(c); */
2441 clk_enable(os->_clk);
2442 }
2443 }
2445 return;
2446 }
2448 /**
2449 * _setup_reset - reset an IP block during the setup process
2450 * @oh: struct omap_hwmod *
2451 *
2452 * Reset the IP block corresponding to the hwmod @oh during the setup
2453 * process. The IP block is first enabled so it can be successfully
2454 * reset. Returns 0 upon success or a negative error code upon
2455 * failure.
2456 */
2457 static int __init _setup_reset(struct omap_hwmod *oh)
2458 {
2459 int r;
2461 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2462 return -EINVAL;
2464 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2465 return -EPERM;
2467 if (oh->rst_lines_cnt == 0) {
2468 r = _enable(oh);
2469 if (r) {
2470 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2471 oh->name, oh->_state);
2472 return -EINVAL;
2473 }
2474 }
2476 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2477 r = _reset(oh);
2479 return r;
2480 }
2482 /**
2483 * _setup_postsetup - transition to the appropriate state after _setup
2484 * @oh: struct omap_hwmod *
2485 *
2486 * Place an IP block represented by @oh into a "post-setup" state --
2487 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2488 * this function is called at the end of _setup().) The postsetup
2489 * state for an IP block can be changed by calling
2490 * omap_hwmod_enter_postsetup_state() early in the boot process,
2491 * before one of the omap_hwmod_setup*() functions are called for the
2492 * IP block.
2493 *
2494 * The IP block stays in this state until a PM runtime-based driver is
2495 * loaded for that IP block. A post-setup state of IDLE is
2496 * appropriate for almost all IP blocks with runtime PM-enabled
2497 * drivers, since those drivers are able to enable the IP block. A
2498 * post-setup state of ENABLED is appropriate for kernels with PM
2499 * runtime disabled. The DISABLED state is appropriate for unusual IP
2500 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2501 * included, since the WDTIMER starts running on reset and will reset
2502 * the MPU if left active.
2503 *
2504 * This post-setup mechanism is deprecated. Once all of the OMAP
2505 * drivers have been converted to use PM runtime, and all of the IP
2506 * block data and interconnect data is available to the hwmod code, it
2507 * should be possible to replace this mechanism with a "lazy reset"
2508 * arrangement. In a "lazy reset" setup, each IP block is enabled
2509 * when the driver first probes, then all remaining IP blocks without
2510 * drivers are either shut down or enabled after the drivers have
2511 * loaded. However, this cannot take place until the above
2512 * preconditions have been met, since otherwise the late reset code
2513 * has no way of knowing which IP blocks are in use by drivers, and
2514 * which ones are unused.
2515 *
2516 * No return value.
2517 */
2518 static void __init _setup_postsetup(struct omap_hwmod *oh)
2519 {
2520 u8 postsetup_state;
2522 if (oh->rst_lines_cnt > 0)
2523 return;
2525 postsetup_state = oh->_postsetup_state;
2526 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2527 postsetup_state = _HWMOD_STATE_ENABLED;
2529 /*
2530 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2531 * it should be set by the core code as a runtime flag during startup
2532 */
2533 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2534 (postsetup_state == _HWMOD_STATE_IDLE)) {
2535 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2536 postsetup_state = _HWMOD_STATE_ENABLED;
2537 }
2539 if (postsetup_state == _HWMOD_STATE_IDLE)
2540 _idle(oh);
2541 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2542 _shutdown(oh);
2543 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2544 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2545 oh->name, postsetup_state);
2547 return;
2548 }
2550 /**
2551 * _setup - prepare IP block hardware for use
2552 * @oh: struct omap_hwmod *
2553 * @n: (unused, pass NULL)
2554 *
2555 * Configure the IP block represented by @oh. This may include
2556 * enabling the IP block, resetting it, and placing it into a
2557 * post-setup state, depending on the type of IP block and applicable
2558 * flags. IP blocks are reset to prevent any previous configuration
2559 * by the bootloader or previous operating system from interfering
2560 * with power management or other parts of the system. The reset can
2561 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2562 * two phases for hwmod initialization. Code called here generally
2563 * affects the IP block hardware, or system integration hardware
2564 * associated with the IP block. Returns 0.
2565 */
2566 static int _setup(struct omap_hwmod *oh, void *data)
2567 {
2568 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2569 return 0;
2571 if (oh->parent_hwmod) {
2572 int r;
2574 r = _enable(oh->parent_hwmod);
2575 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2576 oh->name, oh->parent_hwmod->name);
2577 }
2579 _setup_iclk_autoidle(oh);
2581 if (!_setup_reset(oh))
2582 _setup_postsetup(oh);
2584 if (oh->parent_hwmod) {
2585 u8 postsetup_state;
2587 postsetup_state = oh->parent_hwmod->_postsetup_state;
2589 if (postsetup_state == _HWMOD_STATE_IDLE)
2590 _idle(oh->parent_hwmod);
2591 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2592 _shutdown(oh->parent_hwmod);
2593 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2594 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2595 oh->parent_hwmod->name, postsetup_state);
2596 }
2598 return 0;
2599 }
2601 /**
2602 * _register - register a struct omap_hwmod
2603 * @oh: struct omap_hwmod *
2604 *
2605 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2606 * already has been registered by the same name; -EINVAL if the
2607 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2608 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2609 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2610 * success.
2611 *
2612 * XXX The data should be copied into bootmem, so the original data
2613 * should be marked __initdata and freed after init. This would allow
2614 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2615 * that the copy process would be relatively complex due to the large number
2616 * of substructures.
2617 */
2618 static int __init _register(struct omap_hwmod *oh)
2619 {
2620 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2621 (oh->_state != _HWMOD_STATE_UNKNOWN))
2622 return -EINVAL;
2624 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2626 if (_lookup(oh->name))
2627 return -EEXIST;
2629 list_add_tail(&oh->node, &omap_hwmod_list);
2631 INIT_LIST_HEAD(&oh->slave_ports);
2632 spin_lock_init(&oh->_lock);
2633 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2635 oh->_state = _HWMOD_STATE_REGISTERED;
2637 /*
2638 * XXX Rather than doing a strcmp(), this should test a flag
2639 * set in the hwmod data, inserted by the autogenerator code.
2640 */
2641 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2642 mpu_oh = oh;
2644 return 0;
2645 }
2647 /**
2648 * _add_link - add an interconnect between two IP blocks
2649 * @oi: pointer to a struct omap_hwmod_ocp_if record
2650 *
2651 * Add struct omap_hwmod_link records connecting the slave IP block
2652 * specified in @oi->slave to @oi. This code is assumed to run before
2653 * preemption or SMP has been enabled, thus avoiding the need for
2654 * locking in this code. Changes to this assumption will require
2655 * additional locking. Returns 0.
2656 */
2657 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2658 {
2659 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2660 oi->slave->name);
2662 list_add(&oi->node, &oi->slave->slave_ports);
2663 oi->slave->slaves_cnt++;
2665 return 0;
2666 }
2668 /**
2669 * _register_link - register a struct omap_hwmod_ocp_if
2670 * @oi: struct omap_hwmod_ocp_if *
2671 *
2672 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2673 * has already been registered; -EINVAL if @oi is NULL or if the
2674 * record pointed to by @oi is missing required fields; or 0 upon
2675 * success.
2676 *
2677 * XXX The data should be copied into bootmem, so the original data
2678 * should be marked __initdata and freed after init. This would allow
2679 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2680 */
2681 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2682 {
2683 if (!oi || !oi->master || !oi->slave || !oi->user)
2684 return -EINVAL;
2686 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2687 return -EEXIST;
2689 pr_debug("omap_hwmod: registering link from %s to %s\n",
2690 oi->master->name, oi->slave->name);
2692 /*
2693 * Register the connected hwmods, if they haven't been
2694 * registered already
2695 */
2696 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2697 _register(oi->master);
2699 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2700 _register(oi->slave);
2702 _add_link(oi);
2704 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2706 return 0;
2707 }
2709 /* Static functions intended only for use in soc_ops field function pointers */
2711 /**
2712 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2713 * @oh: struct omap_hwmod *
2714 *
2715 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2716 * does not have an IDLEST bit or if the module successfully leaves
2717 * slave idle; otherwise, pass along the return value of the
2718 * appropriate *_cm*_wait_module_ready() function.
2719 */
2720 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2721 {
2722 if (!oh)
2723 return -EINVAL;
2725 if (oh->flags & HWMOD_NO_IDLEST)
2726 return 0;
2728 if (!_find_mpu_rt_port(oh))
2729 return 0;
2731 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2733 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2734 oh->prcm.omap2.idlest_reg_id,
2735 oh->prcm.omap2.idlest_idle_bit);
2736 }
2738 /**
2739 * _omap4_wait_target_ready - wait for a module to leave slave idle
2740 * @oh: struct omap_hwmod *
2741 *
2742 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2743 * does not have an IDLEST bit or if the module successfully leaves
2744 * slave idle; otherwise, pass along the return value of the
2745 * appropriate *_cm*_wait_module_ready() function.
2746 */
2747 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2748 {
2749 if (!oh)
2750 return -EINVAL;
2752 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2753 return 0;
2755 if (!_find_mpu_rt_port(oh))
2756 return 0;
2758 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2759 return 0;
2761 if (!_omap4_has_clkctrl_clock(oh))
2762 return 0;
2764 /* XXX check module SIDLEMODE, hardreset status */
2766 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2767 oh->clkdm->cm_inst,
2768 oh->prcm.omap4.clkctrl_offs, 0);
2769 }
2771 /**
2772 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2773 * @oh: struct omap_hwmod * to assert hardreset
2774 * @ohri: hardreset line data
2775 *
2776 * Call omap2_prm_assert_hardreset() with parameters extracted from
2777 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2778 * use as an soc_ops function pointer. Passes along the return value
2779 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2780 * for removal when the PRM code is moved into drivers/.
2781 */
2782 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2783 struct omap_hwmod_rst_info *ohri)
2784 {
2785 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2786 oh->prcm.omap2.module_offs, 0);
2787 }
2789 /**
2790 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2791 * @oh: struct omap_hwmod * to deassert hardreset
2792 * @ohri: hardreset line data
2793 *
2794 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2795 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2796 * use as an soc_ops function pointer. Passes along the return value
2797 * from omap2_prm_deassert_hardreset(). XXX This function is
2798 * scheduled for removal when the PRM code is moved into drivers/.
2799 */
2800 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2801 struct omap_hwmod_rst_info *ohri)
2802 {
2803 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2804 oh->prcm.omap2.module_offs, 0, 0);
2805 }
2807 /**
2808 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2809 * @oh: struct omap_hwmod * to test hardreset
2810 * @ohri: hardreset line data
2811 *
2812 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2813 * from the hwmod @oh and the hardreset line data @ohri. Only
2814 * intended for use as an soc_ops function pointer. Passes along the
2815 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2816 * function is scheduled for removal when the PRM code is moved into
2817 * drivers/.
2818 */
2819 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2820 struct omap_hwmod_rst_info *ohri)
2821 {
2822 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2823 oh->prcm.omap2.module_offs, 0);
2824 }
2826 /**
2827 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2828 * @oh: struct omap_hwmod * to assert hardreset
2829 * @ohri: hardreset line data
2830 *
2831 * Call omap4_prminst_assert_hardreset() with parameters extracted
2832 * from the hwmod @oh and the hardreset line data @ohri. Only
2833 * intended for use as an soc_ops function pointer. Passes along the
2834 * return value from omap4_prminst_assert_hardreset(). XXX This
2835 * function is scheduled for removal when the PRM code is moved into
2836 * drivers/.
2837 */
2838 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2839 struct omap_hwmod_rst_info *ohri)
2840 {
2841 if (!oh->clkdm)
2842 return -EINVAL;
2844 return omap_prm_assert_hardreset(ohri->rst_shift,
2845 oh->clkdm->pwrdm.ptr->prcm_partition,
2846 oh->clkdm->pwrdm.ptr->prcm_offs,
2847 oh->prcm.omap4.rstctrl_offs);
2848 }
2850 /**
2851 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2852 * @oh: struct omap_hwmod * to deassert hardreset
2853 * @ohri: hardreset line data
2854 *
2855 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2856 * from the hwmod @oh and the hardreset line data @ohri. Only
2857 * intended for use as an soc_ops function pointer. Passes along the
2858 * return value from omap4_prminst_deassert_hardreset(). XXX This
2859 * function is scheduled for removal when the PRM code is moved into
2860 * drivers/.
2861 */
2862 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2863 struct omap_hwmod_rst_info *ohri)
2864 {
2865 if (!oh->clkdm)
2866 return -EINVAL;
2868 if (ohri->st_shift)
2869 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2870 oh->name, ohri->name);
2871 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2872 oh->clkdm->pwrdm.ptr->prcm_partition,
2873 oh->clkdm->pwrdm.ptr->prcm_offs,
2874 oh->prcm.omap4.rstctrl_offs,
2875 oh->prcm.omap4.rstctrl_offs +
2876 OMAP4_RST_CTRL_ST_OFFSET);
2877 }
2879 /**
2880 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2881 * @oh: struct omap_hwmod * to test hardreset
2882 * @ohri: hardreset line data
2883 *
2884 * Call omap4_prminst_is_hardreset_asserted() with parameters
2885 * extracted from the hwmod @oh and the hardreset line data @ohri.
2886 * Only intended for use as an soc_ops function pointer. Passes along
2887 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2888 * This function is scheduled for removal when the PRM code is moved
2889 * into drivers/.
2890 */
2891 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2892 struct omap_hwmod_rst_info *ohri)
2893 {
2894 if (!oh->clkdm)
2895 return -EINVAL;
2897 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2898 oh->clkdm->pwrdm.ptr->
2899 prcm_partition,
2900 oh->clkdm->pwrdm.ptr->prcm_offs,
2901 oh->prcm.omap4.rstctrl_offs);
2902 }
2904 /**
2905 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2906 * @oh: struct omap_hwmod * to disable control for
2907 *
2908 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2909 * will be using its main_clk to enable/disable the module. Returns
2910 * 0 if successful.
2911 */
2912 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2913 {
2914 if (!oh)
2915 return -EINVAL;
2917 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2919 return 0;
2920 }
2922 /**
2923 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2924 * @oh: struct omap_hwmod * to deassert hardreset
2925 * @ohri: hardreset line data
2926 *
2927 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2928 * from the hwmod @oh and the hardreset line data @ohri. Only
2929 * intended for use as an soc_ops function pointer. Passes along the
2930 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2931 * function is scheduled for removal when the PRM code is moved into
2932 * drivers/.
2933 */
2934 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2935 struct omap_hwmod_rst_info *ohri)
2936 {
2937 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2938 oh->clkdm->pwrdm.ptr->prcm_partition,
2939 oh->clkdm->pwrdm.ptr->prcm_offs,
2940 oh->prcm.omap4.rstctrl_offs,
2941 oh->prcm.omap4.rstst_offs);
2942 }
2944 /**
2945 * _reidle - enable then idle a single hwmod
2946 *
2947 * enables and then immediately reidles an hwmod, as certain hwmods may
2948 * not have their sysconfig registers programmed in an idle friendly state
2949 * by default
2950 */
2951 static void _reidle(struct omap_hwmod *oh)
2952 {
2953 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
2955 omap_hwmod_enable(oh);
2956 omap_hwmod_softreset(oh);
2957 omap_hwmod_idle(oh);
2958 }
2960 /**
2961 * _reidle_all - enable then idle all hwmods in oh_reidle_list
2962 *
2963 * Called by pm_notifier to make sure flagged modules do not block suspend
2964 * after context loss.
2965 */
2966 static int _reidle_all(void)
2967 {
2968 struct omap_hwmod_list *oh_list_item = NULL;
2970 list_for_each_entry(oh_list_item, &oh_reidle_list, oh_list) {
2971 _reidle(oh_list_item->oh);
2972 }
2974 return 0;
2975 }
2977 static int _omap_device_pm_notifier(struct notifier_block *self,
2978 unsigned long action, void *dev)
2979 {
2980 switch (action) {
2981 case PM_POST_SUSPEND:
2982 _reidle_all();
2983 }
2985 return NOTIFY_DONE;
2986 }
2988 static struct notifier_block pm_nb = {
2989 .notifier_call = _omap_device_pm_notifier,
2990 };
2992 /* Public functions */
2994 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2995 {
2996 if (oh->flags & HWMOD_16BIT_REG)
2997 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2998 else
2999 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
3000 }
3002 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3003 {
3004 if (oh->flags & HWMOD_16BIT_REG)
3005 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
3006 else
3007 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
3008 }
3010 /**
3011 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3012 * @oh: struct omap_hwmod *
3013 *
3014 * This is a public function exposed to drivers. Some drivers may need to do
3015 * some settings before and after resetting the device. Those drivers after
3016 * doing the necessary settings could use this function to start a reset by
3017 * setting the SYSCONFIG.SOFTRESET bit.
3018 */
3019 int omap_hwmod_softreset(struct omap_hwmod *oh)
3020 {
3021 u32 v;
3022 int ret;
3024 if (!oh || !(oh->_sysc_cache))
3025 return -EINVAL;
3027 v = oh->_sysc_cache;
3028 ret = _set_softreset(oh, &v);
3029 if (ret)
3030 goto error;
3031 _write_sysconfig(v, oh);
3033 ret = _clear_softreset(oh, &v);
3034 if (ret)
3035 goto error;
3036 _write_sysconfig(v, oh);
3038 error:
3039 return ret;
3040 }
3042 /**
3043 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3044 * @name: name of the omap_hwmod to look up
3045 *
3046 * Given a @name of an omap_hwmod, return a pointer to the registered
3047 * struct omap_hwmod *, or NULL upon error.
3048 */
3049 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3050 {
3051 struct omap_hwmod *oh;
3053 if (!name)
3054 return NULL;
3056 oh = _lookup(name);
3058 return oh;
3059 }
3061 /**
3062 * omap_hwmod_for_each - call function for each registered omap_hwmod
3063 * @fn: pointer to a callback function
3064 * @data: void * data to pass to callback function
3065 *
3066 * Call @fn for each registered omap_hwmod, passing @data to each
3067 * function. @fn must return 0 for success or any other value for
3068 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3069 * will stop and the non-zero return value will be passed to the
3070 * caller of omap_hwmod_for_each(). @fn is called with
3071 * omap_hwmod_for_each() held.
3072 */
3073 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3074 void *data)
3075 {
3076 struct omap_hwmod *temp_oh;
3077 int ret = 0;
3079 if (!fn)
3080 return -EINVAL;
3082 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3083 ret = (*fn)(temp_oh, data);
3084 if (ret)
3085 break;
3086 }
3088 return ret;
3089 }
3091 /**
3092 * omap_hwmod_register_links - register an array of hwmod links
3093 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3094 *
3095 * Intended to be called early in boot before the clock framework is
3096 * initialized. If @ois is not null, will register all omap_hwmods
3097 * listed in @ois that are valid for this chip. Returns -EINVAL if
3098 * omap_hwmod_init() hasn't been called before calling this function,
3099 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3100 * success.
3101 */
3102 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3103 {
3104 int r, i;
3106 if (!inited)
3107 return -EINVAL;
3109 if (!ois)
3110 return 0;
3112 if (ois[0] == NULL) /* Empty list */
3113 return 0;
3115 i = 0;
3116 do {
3117 r = _register_link(ois[i]);
3118 WARN(r && r != -EEXIST,
3119 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3120 ois[i]->master->name, ois[i]->slave->name, r);
3121 } while (ois[++i]);
3123 return 0;
3124 }
3126 /**
3127 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3128 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3129 *
3130 * If the hwmod data corresponding to the MPU subsystem IP block
3131 * hasn't been initialized and set up yet, do so now. This must be
3132 * done first since sleep dependencies may be added from other hwmods
3133 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3134 * return value.
3135 */
3136 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3137 {
3138 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3139 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3140 __func__, MPU_INITIATOR_NAME);
3141 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3142 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3143 }
3145 /**
3146 * omap_hwmod_setup_one - set up a single hwmod
3147 * @oh_name: const char * name of the already-registered hwmod to set up
3148 *
3149 * Initialize and set up a single hwmod. Intended to be used for a
3150 * small number of early devices, such as the timer IP blocks used for
3151 * the scheduler clock. Must be called after omap2_clk_init().
3152 * Resolves the struct clk names to struct clk pointers for each
3153 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3154 * -EINVAL upon error or 0 upon success.
3155 */
3156 int __init omap_hwmod_setup_one(const char *oh_name)
3157 {
3158 struct omap_hwmod *oh;
3160 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3162 oh = _lookup(oh_name);
3163 if (!oh) {
3164 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3165 return -EINVAL;
3166 }
3168 _ensure_mpu_hwmod_is_setup(oh);
3170 _init(oh, NULL);
3171 _setup(oh, NULL);
3173 return 0;
3174 }
3176 static void omap_hwmod_check_one(struct device *dev,
3177 const char *name, s8 v1, u8 v2)
3178 {
3179 if (v1 < 0)
3180 return;
3182 if (v1 != v2)
3183 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3184 }
3186 /**
3187 * omap_hwmod_check_sysc - check sysc against platform sysc
3188 * @dev: struct device
3189 * @data: module data
3190 * @sysc_fields: new sysc configuration
3191 */
3192 static int omap_hwmod_check_sysc(struct device *dev,
3193 const struct ti_sysc_module_data *data,
3194 struct sysc_regbits *sysc_fields)
3195 {
3196 const struct sysc_regbits *regbits = data->cap->regbits;
3198 omap_hwmod_check_one(dev, "dmadisable_shift",
3199 regbits->dmadisable_shift,
3200 sysc_fields->dmadisable_shift);
3201 omap_hwmod_check_one(dev, "midle_shift",
3202 regbits->midle_shift,
3203 sysc_fields->midle_shift);
3204 omap_hwmod_check_one(dev, "sidle_shift",
3205 regbits->sidle_shift,
3206 sysc_fields->sidle_shift);
3207 omap_hwmod_check_one(dev, "clkact_shift",
3208 regbits->clkact_shift,
3209 sysc_fields->clkact_shift);
3210 omap_hwmod_check_one(dev, "enwkup_shift",
3211 regbits->enwkup_shift,
3212 sysc_fields->enwkup_shift);
3213 omap_hwmod_check_one(dev, "srst_shift",
3214 regbits->srst_shift,
3215 sysc_fields->srst_shift);
3216 omap_hwmod_check_one(dev, "autoidle_shift",
3217 regbits->autoidle_shift,
3218 sysc_fields->autoidle_shift);
3220 return 0;
3221 }
3223 /**
3224 * omap_hwmod_init_regbits - init sysconfig specific register bits
3225 * @dev: struct device
3226 * @data: module data
3227 * @sysc_fields: new sysc configuration
3228 */
3229 static int omap_hwmod_init_regbits(struct device *dev,
3230 const struct ti_sysc_module_data *data,
3231 struct sysc_regbits **sysc_fields)
3232 {
3233 *sysc_fields = NULL;
3235 switch (data->cap->type) {
3236 case TI_SYSC_OMAP2:
3237 case TI_SYSC_OMAP2_TIMER:
3238 *sysc_fields = &omap_hwmod_sysc_type1;
3239 break;
3240 case TI_SYSC_OMAP3_SHAM:
3241 *sysc_fields = &omap3_sham_sysc_fields;
3242 break;
3243 case TI_SYSC_OMAP3_AES:
3244 *sysc_fields = &omap3xxx_aes_sysc_fields;
3245 break;
3246 case TI_SYSC_OMAP4:
3247 case TI_SYSC_OMAP4_TIMER:
3248 *sysc_fields = &omap_hwmod_sysc_type2;
3249 break;
3250 case TI_SYSC_OMAP4_SIMPLE:
3251 *sysc_fields = &omap_hwmod_sysc_type3;
3252 break;
3253 case TI_SYSC_OMAP34XX_SR:
3254 *sysc_fields = &omap34xx_sr_sysc_fields;
3255 break;
3256 case TI_SYSC_OMAP36XX_SR:
3257 *sysc_fields = &omap36xx_sr_sysc_fields;
3258 break;
3259 case TI_SYSC_OMAP4_SR:
3260 *sysc_fields = &omap36xx_sr_sysc_fields;
3261 break;
3262 case TI_SYSC_OMAP4_MCASP:
3263 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3264 break;
3265 case TI_SYSC_OMAP4_USB_HOST_FS:
3266 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3267 break;
3268 default:
3269 return -EINVAL;
3270 }
3272 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3273 }
3275 /**
3276 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3277 * @dev: struct device
3278 * @data: module data
3279 * @rev_offs: revision register offset
3280 * @sysc_offs: sysc register offset
3281 * @syss_offs: syss register offset
3282 */
3283 int omap_hwmod_init_reg_offs(struct device *dev,
3284 const struct ti_sysc_module_data *data,
3285 s32 *rev_offs, s32 *sysc_offs, s32 *syss_offs)
3286 {
3287 *rev_offs = -ENODEV;
3288 *sysc_offs = 0;
3289 *syss_offs = 0;
3291 if (data->offsets[SYSC_REVISION] >= 0)
3292 *rev_offs = data->offsets[SYSC_REVISION];
3294 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3295 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3297 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3298 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3300 return 0;
3301 }
3303 /**
3304 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3305 * @dev: struct device
3306 * @data: module data
3307 * @sysc_flags: module configuration
3308 */
3309 int omap_hwmod_init_sysc_flags(struct device *dev,
3310 const struct ti_sysc_module_data *data,
3311 u32 *sysc_flags)
3312 {
3313 *sysc_flags = 0;
3315 switch (data->cap->type) {
3316 case TI_SYSC_OMAP2:
3317 case TI_SYSC_OMAP2_TIMER:
3318 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3319 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3320 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3321 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3322 *sysc_flags |= SYSC_HAS_EMUFREE;
3323 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3324 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3325 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3326 *sysc_flags |= SYSC_HAS_SOFTRESET;
3327 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3328 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3329 break;
3330 case TI_SYSC_OMAP4:
3331 case TI_SYSC_OMAP4_TIMER:
3332 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3333 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3334 *sysc_flags |= SYSC_HAS_DMADISABLE;
3335 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3336 *sysc_flags |= SYSC_HAS_EMUFREE;
3337 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3338 *sysc_flags |= SYSC_HAS_SOFTRESET;
3339 break;
3340 case TI_SYSC_OMAP34XX_SR:
3341 case TI_SYSC_OMAP36XX_SR:
3342 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3343 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3344 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3345 break;
3346 default:
3347 if (data->cap->regbits->emufree_shift >= 0)
3348 *sysc_flags |= SYSC_HAS_EMUFREE;
3349 if (data->cap->regbits->enwkup_shift >= 0)
3350 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3351 if (data->cap->regbits->srst_shift >= 0)
3352 *sysc_flags |= SYSC_HAS_SOFTRESET;
3353 if (data->cap->regbits->autoidle_shift >= 0)
3354 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3355 break;
3356 }
3358 if (data->cap->regbits->midle_shift >= 0 &&
3359 data->cfg->midlemodes)
3360 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3362 if (data->cap->regbits->sidle_shift >= 0 &&
3363 data->cfg->sidlemodes)
3364 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3366 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3367 *sysc_flags |= SYSC_NO_CACHE;
3368 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3369 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3371 if (data->cfg->syss_mask & 1)
3372 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3374 return 0;
3375 }
3377 /**
3378 * omap_hwmod_init_idlemodes - initialize module idle modes
3379 * @dev: struct device
3380 * @data: module data
3381 * @idlemodes: module supported idle modes
3382 */
3383 int omap_hwmod_init_idlemodes(struct device *dev,
3384 const struct ti_sysc_module_data *data,
3385 u32 *idlemodes)
3386 {
3387 *idlemodes = 0;
3389 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3390 *idlemodes |= MSTANDBY_FORCE;
3391 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3392 *idlemodes |= MSTANDBY_NO;
3393 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3394 *idlemodes |= MSTANDBY_SMART;
3395 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3396 *idlemodes |= MSTANDBY_SMART_WKUP;
3398 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3399 *idlemodes |= SIDLE_FORCE;
3400 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3401 *idlemodes |= SIDLE_NO;
3402 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3403 *idlemodes |= SIDLE_SMART;
3404 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3405 *idlemodes |= SIDLE_SMART_WKUP;
3407 return 0;
3408 }
3410 /**
3411 * omap_hwmod_check_module - check new module against platform data
3412 * @dev: struct device
3413 * @oh: module
3414 * @data: new module data
3415 * @sysc_fields: sysc register bits
3416 * @rev_offs: revision register offset
3417 * @sysc_offs: sysconfig register offset
3418 * @syss_offs: sysstatus register offset
3419 * @sysc_flags: sysc specific flags
3420 * @idlemodes: sysc supported idlemodes
3421 */
3422 static int omap_hwmod_check_module(struct device *dev,
3423 struct omap_hwmod *oh,
3424 const struct ti_sysc_module_data *data,
3425 struct sysc_regbits *sysc_fields,
3426 s32 rev_offs, s32 sysc_offs,
3427 s32 syss_offs, u32 sysc_flags,
3428 u32 idlemodes)
3429 {
3430 if (!oh->class->sysc)
3431 return -ENODEV;
3433 if (sysc_fields != oh->class->sysc->sysc_fields)
3434 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3435 oh->class->sysc->sysc_fields);
3437 if (rev_offs != oh->class->sysc->rev_offs)
3438 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3439 oh->class->sysc->rev_offs);
3440 if (sysc_offs != oh->class->sysc->sysc_offs)
3441 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3442 oh->class->sysc->sysc_offs);
3443 if (syss_offs != oh->class->sysc->syss_offs)
3444 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3445 oh->class->sysc->syss_offs);
3447 if (sysc_flags != oh->class->sysc->sysc_flags)
3448 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3449 oh->class->sysc->sysc_flags);
3451 if (idlemodes != oh->class->sysc->idlemodes)
3452 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3453 oh->class->sysc->idlemodes);
3455 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3456 dev_warn(dev, "srst_udelay %i != %i\n",
3457 data->cfg->srst_udelay,
3458 oh->class->sysc->srst_udelay);
3460 return 0;
3461 }
3463 /**
3464 * omap_hwmod_allocate_module - allocate new module
3465 * @dev: struct device
3466 * @oh: module
3467 * @sysc_fields: sysc register bits
3468 * @rev_offs: revision register offset
3469 * @sysc_offs: sysconfig register offset
3470 * @syss_offs: sysstatus register offset
3471 * @sysc_flags: sysc specific flags
3472 * @idlemodes: sysc supported idlemodes
3473 *
3474 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3475 */
3476 int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3477 const struct ti_sysc_module_data *data,
3478 struct sysc_regbits *sysc_fields,
3479 s32 rev_offs, s32 sysc_offs, s32 syss_offs,
3480 u32 sysc_flags, u32 idlemodes)
3481 {
3482 struct omap_hwmod_class_sysconfig *sysc;
3483 struct omap_hwmod_class *class;
3484 void __iomem *regs = NULL;
3485 unsigned long flags;
3487 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3488 if (!sysc)
3489 return -ENOMEM;
3491 sysc->sysc_fields = sysc_fields;
3492 sysc->rev_offs = rev_offs;
3493 sysc->sysc_offs = sysc_offs;
3494 sysc->syss_offs = syss_offs;
3495 sysc->sysc_flags = sysc_flags;
3496 sysc->idlemodes = idlemodes;
3497 sysc->srst_udelay = data->cfg->srst_udelay;
3499 if (!oh->_mpu_rt_va) {
3500 regs = ioremap(data->module_pa,
3501 data->module_size);
3502 if (!regs)
3503 return -ENOMEM;
3504 }
3506 /*
3507 * We need new oh->class as the other devices in the same class
3508 * may not yet have ioremapped their registers.
3509 */
3510 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3511 if (!class)
3512 return -ENOMEM;
3514 class->sysc = sysc;
3516 spin_lock_irqsave(&oh->_lock, flags);
3517 if (regs)
3518 oh->_mpu_rt_va = regs;
3519 oh->class = class;
3520 oh->_state = _HWMOD_STATE_INITIALIZED;
3521 _setup(oh, NULL);
3522 spin_unlock_irqrestore(&oh->_lock, flags);
3524 return 0;
3525 }
3527 /**
3528 * omap_hwmod_init_module - initialize new module
3529 * @dev: struct device
3530 * @data: module data
3531 * @cookie: cookie for the caller to use for later calls
3532 */
3533 int omap_hwmod_init_module(struct device *dev,
3534 const struct ti_sysc_module_data *data,
3535 struct ti_sysc_cookie *cookie)
3536 {
3537 struct omap_hwmod *oh;
3538 struct sysc_regbits *sysc_fields;
3539 s32 rev_offs, sysc_offs, syss_offs;
3540 u32 sysc_flags, idlemodes;
3541 int error;
3543 if (!dev || !data)
3544 return -EINVAL;
3546 oh = _lookup(data->name);
3547 if (!oh)
3548 return -ENODEV;
3550 cookie->data = oh;
3552 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3553 if (error)
3554 return error;
3556 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3557 &sysc_offs, &syss_offs);
3558 if (error)
3559 return error;
3561 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3562 if (error)
3563 return error;
3565 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3566 if (error)
3567 return error;
3569 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3570 oh->flags |= HWMOD_INIT_NO_IDLE;
3571 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3572 oh->flags |= HWMOD_INIT_NO_RESET;
3574 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3575 rev_offs, sysc_offs, syss_offs,
3576 sysc_flags, idlemodes);
3577 if (!error)
3578 return error;
3580 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3581 rev_offs, sysc_offs, syss_offs,
3582 sysc_flags, idlemodes);
3583 }
3585 /**
3586 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3587 *
3588 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3589 * early concole so that hwmod core doesn't reset and keep it in idle
3590 * that specific uart.
3591 */
3592 #ifdef CONFIG_SERIAL_EARLYCON
3593 static void __init omap_hwmod_setup_earlycon_flags(void)
3594 {
3595 struct device_node *np;
3596 struct omap_hwmod *oh;
3597 const char *uart;
3599 np = of_find_node_by_path("/chosen");
3600 if (np) {
3601 uart = of_get_property(np, "stdout-path", NULL);
3602 if (uart) {
3603 np = of_find_node_by_path(uart);
3604 if (np) {
3605 uart = of_get_property(np, "ti,hwmods", NULL);
3606 oh = omap_hwmod_lookup(uart);
3607 if (!oh) {
3608 uart = of_get_property(np->parent,
3609 "ti,hwmods",
3610 NULL);
3611 oh = omap_hwmod_lookup(uart);
3612 }
3613 if (oh)
3614 oh->flags |= DEBUG_OMAPUART_FLAGS;
3615 }
3616 }
3617 }
3618 }
3619 #endif
3621 /**
3622 * omap_hwmod_setup_all - set up all registered IP blocks
3623 *
3624 * Initialize and set up all IP blocks registered with the hwmod code.
3625 * Must be called after omap2_clk_init(). Resolves the struct clk
3626 * names to struct clk pointers for each registered omap_hwmod. Also
3627 * calls _setup() on each hwmod. Returns 0 upon success.
3628 */
3629 static int __init omap_hwmod_setup_all(void)
3630 {
3631 _ensure_mpu_hwmod_is_setup(NULL);
3633 omap_hwmod_for_each(_init, NULL);
3634 #ifdef CONFIG_SERIAL_EARLYCON
3635 omap_hwmod_setup_earlycon_flags();
3636 #endif
3637 omap_hwmod_for_each(_setup, NULL);
3639 return 0;
3640 }
3641 omap_postcore_initcall(omap_hwmod_setup_all);
3643 /**
3644 * omap_hwmod_enable_reidle - add an omap_hwmod to reidle list
3645 * @oh: struct omap_hwmod *
3646 *
3647 * Adds the omap_hwmod to the oh_reidle_list so it will gets enabled then idled
3648 * after each suspend cycle. Returns 0 on success.
3649 */
3650 int omap_hwmod_enable_reidle(struct omap_hwmod *oh)
3651 {
3652 struct omap_hwmod_list *oh_list_item = NULL;
3654 oh_list_item = kzalloc(sizeof(*oh_list_item), GFP_KERNEL);
3656 if (!oh_list_item)
3657 return -ENOMEM;
3659 oh_list_item->oh = oh;
3660 list_add(&oh_list_item->oh_list, &oh_reidle_list);
3662 pr_debug("omap_hwmod: %s: added to reidle list\n", oh->name);
3664 return 0;
3665 }
3667 /**
3668 * omap_hwmod_disable_reidle - remove an omap_hwmod from reidle list
3669 * @oh: struct omap_hwmod *
3670 *
3671 * Remove the omap_hwmod from the oh_reidle_list. Returns 0 on success.
3672 */
3673 int omap_hwmod_disable_reidle(struct omap_hwmod *oh)
3674 {
3675 struct omap_hwmod_list *li, *oh_list_item = NULL;
3677 list_for_each_entry_safe(oh_list_item, li, &oh_reidle_list, oh_list) {
3678 if (oh_list_item->oh == oh) {
3679 list_del(&oh_list_item->oh_list);
3680 pr_debug("omap_hwmod: %s: removed from reidle list\n",
3681 oh->name);
3682 kfree(oh_list_item);
3683 }
3684 }
3686 return 0;
3687 }
3689 /**
3690 * omap_hwmod_enable - enable an omap_hwmod
3691 * @oh: struct omap_hwmod *
3692 *
3693 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3694 * Returns -EINVAL on error or passes along the return value from _enable().
3695 */
3696 int omap_hwmod_enable(struct omap_hwmod *oh)
3697 {
3698 int r;
3699 unsigned long flags;
3701 if (!oh)
3702 return -EINVAL;
3704 spin_lock_irqsave(&oh->_lock, flags);
3705 r = _enable(oh);
3706 spin_unlock_irqrestore(&oh->_lock, flags);
3708 return r;
3709 }
3711 /**
3712 * omap_hwmod_idle - idle an omap_hwmod
3713 * @oh: struct omap_hwmod *
3714 *
3715 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3716 * Returns -EINVAL on error or passes along the return value from _idle().
3717 */
3718 int omap_hwmod_idle(struct omap_hwmod *oh)
3719 {
3720 int r;
3721 unsigned long flags;
3723 if (!oh)
3724 return -EINVAL;
3726 spin_lock_irqsave(&oh->_lock, flags);
3727 r = _idle(oh);
3728 spin_unlock_irqrestore(&oh->_lock, flags);
3730 return r;
3731 }
3733 /**
3734 * omap_hwmod_shutdown - shutdown an omap_hwmod
3735 * @oh: struct omap_hwmod *
3736 *
3737 * Shutdown an omap_hwmod @oh. Intended to be called by
3738 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3739 * the return value from _shutdown().
3740 */
3741 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3742 {
3743 int r;
3744 unsigned long flags;
3746 if (!oh)
3747 return -EINVAL;
3749 spin_lock_irqsave(&oh->_lock, flags);
3750 r = _shutdown(oh);
3751 spin_unlock_irqrestore(&oh->_lock, flags);
3753 return r;
3754 }
3756 /*
3757 * IP block data retrieval functions
3758 */
3760 /**
3761 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3762 * @oh: struct omap_hwmod *
3763 *
3764 * Return the powerdomain pointer associated with the OMAP module
3765 * @oh's main clock. If @oh does not have a main clk, return the
3766 * powerdomain associated with the interface clock associated with the
3767 * module's MPU port. (XXX Perhaps this should use the SDMA port
3768 * instead?) Returns NULL on error, or a struct powerdomain * on
3769 * success.
3770 */
3771 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3772 {
3773 struct clk *c;
3774 struct omap_hwmod_ocp_if *oi;
3775 struct clockdomain *clkdm;
3776 struct clk_hw_omap *clk;
3778 if (!oh)
3779 return NULL;
3781 if (oh->clkdm)
3782 return oh->clkdm->pwrdm.ptr;
3784 if (oh->_clk) {
3785 c = oh->_clk;
3786 } else {
3787 oi = _find_mpu_rt_port(oh);
3788 if (!oi)
3789 return NULL;
3790 c = oi->_clk;
3791 }
3793 clk = to_clk_hw_omap(__clk_get_hw(c));
3794 clkdm = clk->clkdm;
3795 if (!clkdm)
3796 return NULL;
3798 return clkdm->pwrdm.ptr;
3799 }
3801 /**
3802 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3803 * @oh: struct omap_hwmod *
3804 *
3805 * Returns the virtual address corresponding to the beginning of the
3806 * module's register target, in the address range that is intended to
3807 * be used by the MPU. Returns the virtual address upon success or NULL
3808 * upon error.
3809 */
3810 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3811 {
3812 if (!oh)
3813 return NULL;
3815 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3816 return NULL;
3818 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3819 return NULL;
3821 return oh->_mpu_rt_va;
3822 }
3824 /*
3825 * XXX what about functions for drivers to save/restore ocp_sysconfig
3826 * for context save/restore operations?
3827 */
3829 /**
3830 * omap_hwmod_enable_wakeup - allow device to wake up the system
3831 * @oh: struct omap_hwmod *
3832 *
3833 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3834 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3835 * this IP block if it has dynamic mux entries. Eventually this
3836 * should set PRCM wakeup registers to cause the PRCM to receive
3837 * wakeup events from the module. Does not set any wakeup routing
3838 * registers beyond this point - if the module is to wake up any other
3839 * module or subsystem, that must be set separately. Called by
3840 * omap_device code. Returns -EINVAL on error or 0 upon success.
3841 */
3842 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3843 {
3844 unsigned long flags;
3845 u32 v;
3847 spin_lock_irqsave(&oh->_lock, flags);
3849 if (oh->class->sysc &&
3850 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3851 v = oh->_sysc_cache;
3852 _enable_wakeup(oh, &v);
3853 _write_sysconfig(v, oh);
3854 }
3856 spin_unlock_irqrestore(&oh->_lock, flags);
3858 return 0;
3859 }
3861 /**
3862 * omap_hwmod_disable_wakeup - prevent device from waking the system
3863 * @oh: struct omap_hwmod *
3864 *
3865 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3866 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3867 * events for this IP block if it has dynamic mux entries. Eventually
3868 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3869 * wakeup events from the module. Does not set any wakeup routing
3870 * registers beyond this point - if the module is to wake up any other
3871 * module or subsystem, that must be set separately. Called by
3872 * omap_device code. Returns -EINVAL on error or 0 upon success.
3873 */
3874 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3875 {
3876 unsigned long flags;
3877 u32 v;
3879 spin_lock_irqsave(&oh->_lock, flags);
3881 if (oh->class->sysc &&
3882 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3883 v = oh->_sysc_cache;
3884 _disable_wakeup(oh, &v);
3885 _write_sysconfig(v, oh);
3886 }
3888 spin_unlock_irqrestore(&oh->_lock, flags);
3890 return 0;
3891 }
3893 /**
3894 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3895 * contained in the hwmod module.
3896 * @oh: struct omap_hwmod *
3897 * @name: name of the reset line to lookup and assert
3898 *
3899 * Some IP like dsp, ipu or iva contain processor that require
3900 * an HW reset line to be assert / deassert in order to enable fully
3901 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3902 * yet supported on this OMAP; otherwise, passes along the return value
3903 * from _assert_hardreset().
3904 */
3905 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3906 {
3907 int ret;
3908 unsigned long flags;
3910 if (!oh)
3911 return -EINVAL;
3913 spin_lock_irqsave(&oh->_lock, flags);
3914 ret = _assert_hardreset(oh, name);
3915 spin_unlock_irqrestore(&oh->_lock, flags);
3917 return ret;
3918 }
3920 /**
3921 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3922 * contained in the hwmod module.
3923 * @oh: struct omap_hwmod *
3924 * @name: name of the reset line to look up and deassert
3925 *
3926 * Some IP like dsp, ipu or iva contain processor that require
3927 * an HW reset line to be assert / deassert in order to enable fully
3928 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3929 * yet supported on this OMAP; otherwise, passes along the return value
3930 * from _deassert_hardreset().
3931 */
3932 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3933 {
3934 int ret;
3935 unsigned long flags;
3937 if (!oh)
3938 return -EINVAL;
3940 spin_lock_irqsave(&oh->_lock, flags);
3941 ret = _deassert_hardreset(oh, name);
3942 spin_unlock_irqrestore(&oh->_lock, flags);
3944 return ret;
3945 }
3947 /**
3948 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3949 * @classname: struct omap_hwmod_class name to search for
3950 * @fn: callback function pointer to call for each hwmod in class @classname
3951 * @user: arbitrary context data to pass to the callback function
3952 *
3953 * For each omap_hwmod of class @classname, call @fn.
3954 * If the callback function returns something other than
3955 * zero, the iterator is terminated, and the callback function's return
3956 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3957 * if @classname or @fn are NULL, or passes back the error code from @fn.
3958 */
3959 int omap_hwmod_for_each_by_class(const char *classname,
3960 int (*fn)(struct omap_hwmod *oh,
3961 void *user),
3962 void *user)
3963 {
3964 struct omap_hwmod *temp_oh;
3965 int ret = 0;
3967 if (!classname || !fn)
3968 return -EINVAL;
3970 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3971 __func__, classname);
3973 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3974 if (!strcmp(temp_oh->class->name, classname)) {
3975 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3976 __func__, temp_oh->name);
3977 ret = (*fn)(temp_oh, user);
3978 if (ret)
3979 break;
3980 }
3981 }
3983 if (ret)
3984 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3985 __func__, ret);
3987 return ret;
3988 }
3990 /**
3991 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3992 * @oh: struct omap_hwmod *
3993 * @state: state that _setup() should leave the hwmod in
3994 *
3995 * Sets the hwmod state that @oh will enter at the end of _setup()
3996 * (called by omap_hwmod_setup_*()). See also the documentation
3997 * for _setup_postsetup(), above. Returns 0 upon success or
3998 * -EINVAL if there is a problem with the arguments or if the hwmod is
3999 * in the wrong state.
4000 */
4001 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4002 {
4003 int ret;
4004 unsigned long flags;
4006 if (!oh)
4007 return -EINVAL;
4009 if (state != _HWMOD_STATE_DISABLED &&
4010 state != _HWMOD_STATE_ENABLED &&
4011 state != _HWMOD_STATE_IDLE)
4012 return -EINVAL;
4014 spin_lock_irqsave(&oh->_lock, flags);
4016 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4017 ret = -EINVAL;
4018 goto ohsps_unlock;
4019 }
4021 oh->_postsetup_state = state;
4022 ret = 0;
4024 ohsps_unlock:
4025 spin_unlock_irqrestore(&oh->_lock, flags);
4027 return ret;
4028 }
4030 /**
4031 * omap_hwmod_get_context_loss_count - get lost context count
4032 * @oh: struct omap_hwmod *
4033 *
4034 * Returns the context loss count of associated @oh
4035 * upon success, or zero if no context loss data is available.
4036 *
4037 * On OMAP4, this queries the per-hwmod context loss register,
4038 * assuming one exists. If not, or on OMAP2/3, this queries the
4039 * enclosing powerdomain context loss count.
4040 */
4041 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4042 {
4043 struct powerdomain *pwrdm;
4044 int ret = 0;
4046 if (soc_ops.get_context_lost)
4047 return soc_ops.get_context_lost(oh);
4049 pwrdm = omap_hwmod_get_pwrdm(oh);
4050 if (pwrdm)
4051 ret = pwrdm_get_context_loss_count(pwrdm);
4053 return ret;
4054 }
4056 /**
4057 * omap_hwmod_init - initialize the hwmod code
4058 *
4059 * Sets up some function pointers needed by the hwmod code to operate on the
4060 * currently-booted SoC. Intended to be called once during kernel init
4061 * before any hwmods are registered. No return value.
4062 */
4063 void __init omap_hwmod_init(void)
4064 {
4065 if (cpu_is_omap24xx()) {
4066 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4067 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4068 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4069 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4070 } else if (cpu_is_omap34xx()) {
4071 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4072 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4073 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4074 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4075 soc_ops.init_clkdm = _init_clkdm;
4076 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4077 soc_ops.enable_module = _omap4_enable_module;
4078 soc_ops.disable_module = _omap4_disable_module;
4079 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4080 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4081 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4082 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4083 soc_ops.init_clkdm = _init_clkdm;
4084 soc_ops.update_context_lost = _omap4_update_context_lost;
4085 soc_ops.get_context_lost = _omap4_get_context_lost;
4086 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4087 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4088 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4089 soc_is_am43xx()) {
4090 soc_ops.enable_module = _omap4_enable_module;
4091 soc_ops.disable_module = _omap4_disable_module;
4092 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4093 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4094 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4095 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4096 soc_ops.init_clkdm = _init_clkdm;
4097 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4098 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4099 } else {
4100 WARN(1, "omap_hwmod: unknown SoC type\n");
4101 }
4103 _init_clkctrl_providers();
4105 inited = true;
4106 }
4108 /**
4109 * omap_hwmod_setup_reidle - add hwmods to reidle list and register notifier
4110 *
4111 * Returns 0 on success.
4112 */
4113 int omap_hwmod_setup_reidle(void)
4114 {
4115 omap_hwmod_for_each(_setup_reidle, NULL);
4117 if (!list_empty(&oh_reidle_list))
4118 register_pm_notifier(&pm_nb);
4120 return 0;
4121 }
4123 /**
4124 * omap_hwmod_get_main_clk - get pointer to main clock name
4125 * @oh: struct omap_hwmod *
4126 *
4127 * Returns the main clock name assocated with @oh upon success,
4128 * or NULL if @oh is NULL.
4129 */
4130 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4131 {
4132 if (!oh)
4133 return NULL;
4135 return oh->main_clk;
4136 }
4138 /**
4139 * omap_hwmod_save_context - Saves the HW reset line state of submodules
4140 * @oh: struct omap_hwmod *
4141 * @unused: (unused, caller should pass NULL)
4142 *
4143 * Saves the HW reset line state of all the submodules in the hwmod
4144 */
4145 static int omap_hwmod_save_context(struct omap_hwmod *oh, void *unused)
4146 {
4147 int i;
4149 for (i = 0; i < oh->rst_lines_cnt; i++)
4150 oh->rst_lines[i].context =
4151 _read_hardreset(oh, oh->rst_lines[i].name);
4152 return 0;
4153 }
4155 /**
4156 * omap_hwmod_restore_context - Restores the HW reset line state of submodules
4157 * @oh: struct omap_hwmod *
4158 * @unused: (unused, caller should pass NULL)
4159 *
4160 * Restores the HW reset line state of all the submodules in the hwmod
4161 */
4162 static int omap_hwmod_restore_context(struct omap_hwmod *oh, void *unused)
4163 {
4164 int i;
4166 for (i = 0; i < oh->rst_lines_cnt; i++)
4167 if (oh->rst_lines[i].context)
4168 _assert_hardreset(oh, oh->rst_lines[i].name);
4169 else
4170 _deassert_hardreset(oh, oh->rst_lines[i].name);
4172 if (oh->_state == _HWMOD_STATE_ENABLED) {
4173 if (soc_ops.enable_module)
4174 soc_ops.enable_module(oh);
4175 } else {
4176 if (oh->flags & HWMOD_NEEDS_REIDLE)
4177 _reidle(oh);
4178 else if (soc_ops.disable_module)
4179 soc_ops.disable_module(oh);
4180 }
4182 return 0;
4183 }
4185 /**
4186 * omap_hwmods_save_context - Saves the HW reset line state for all hwmods
4187 *
4188 * Saves the HW reset line state of all the registered hwmods
4189 */
4190 void omap_hwmods_save_context(void)
4191 {
4192 omap_hwmod_for_each(omap_hwmod_save_context, NULL);
4193 }
4195 /**
4196 * omap_hwmods_restore_context - Restores the HW reset line state for all hwmods
4197 *
4198 * Restores the HW reset line state of all the registered hwmods
4199 */
4200 void omap_hwmods_restore_context(void)
4201 {
4202 omap_hwmod_for_each(omap_hwmod_restore_context, NULL);
4203 }