arch/arm/mach-omap2/pm33xx-core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AM33XX Arch Power Management Routines
   4  *
   5  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
   6  *      Dave Gerlach
   7  */
   8
   9 #include <linux/cpuidle.h>
  10 #include <linux/platform_data/pm33xx.h>
  11 #include <asm/cpuidle.h>
  12 #include <asm/smp_scu.h>
  13 #include <asm/suspend.h>
  14 #include <linux/errno.h>
  15 #include <linux/clk.h>
  16 #include <linux/platform_data/gpio-omap.h>
  17 #include <linux/pinctrl/pinmux.h>
  18 #include <linux/wkup_m3_ipc.h>
  19 #include <linux/of.h>
  20 #include <linux/rtc.h>
  21
  22 #include "cm33xx.h"
  23 #include "common.h"
  24 #include "control.h"
  25 #include "clockdomain.h"
  26 #include "iomap.h"
  27 #include "omap_hwmod.h"
  28 #include "pm.h"
  29 #include "powerdomain.h"
  30 #include "prm33xx.h"
  31 #include "soc.h"
  32 #include "sram.h"
  33 #include "omap-secure.h"
  34
  35 static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;
  36 static struct clockdomain *gfx_l4ls_clkdm;
  37 static void __iomem *scu_base;
  38 static struct omap_hwmod *rtc_oh;
  39
  40 static int (*idle_fn)(u32 wfi_flags);
  41
  42 struct amx3_idle_state {
  43         int wfi_flags;
  44 };
  45
  46 static struct amx3_idle_state *idle_states;
  47
  48 static int __init am43xx_map_scu(void)
  49 {
  50         scu_base = ioremap(scu_a9_get_base(), SZ_256);
  51
  52         if (!scu_base)
  53                 return -ENOMEM;
  54
  55         return 0;
  56 }
  57
  58 static int am33xx_check_off_mode_enable(void)
  59 {
  60         if (enable_off_mode)
  61                 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");
  62
  63         /* off mode not supported on am335x so return 0 always */
  64         return 0;
  65 }
  66
  67 static int am43xx_check_off_mode_enable(void)
  68 {
  69         /*
  70          * Check for am437x-sk-evm which due to HW design cannot support
  71          * this mode reliably.
  72          */
  73         if (of_machine_is_compatible("ti,am437x-sk-evm") && enable_off_mode) {
  74                 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");
  75                 return 0;
  76         }
  77
  78         return enable_off_mode;
  79 }
  80
  81 static int amx3_common_init(int (*idle)(u32 wfi_flags))
  82 {
  83         gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
  84         per_pwrdm = pwrdm_lookup("per_pwrdm");
  85         mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
  86
  87         if ((!gfx_pwrdm) || (!per_pwrdm) || (!mpu_pwrdm))
  88                 return -ENODEV;
  89
  90         (void)clkdm_for_each(omap_pm_clkdms_setup, NULL);
  91
  92         /* CEFUSE domain can be turned off post bootup */
  93         cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm");
  94         if (cefuse_pwrdm)
  95                 omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF);
  96         else
  97                 pr_err("PM: Failed to get cefuse_pwrdm\n");
  98
  99         idle_fn = idle;
 100
 101         return 0;
 102 }
 103
 104 static int am33xx_suspend_init(int (*idle)(u32 wfi_flags))
 105 {
 106         int ret;
 107
 108         gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
 109
 110         if (!gfx_l4ls_clkdm) {
 111                 pr_err("PM: Cannot lookup gfx_l4ls_clkdm clockdomains\n");
 112                 return -ENODEV;
 113         }
 114
 115         ret = amx3_common_init(idle);
 116
 117         return ret;
 118 }
 119
 120 static int am43xx_suspend_init(int (*idle)(u32 wfi_flags))
 121 {
 122         int ret = 0;
 123
 124         ret = am43xx_map_scu();
 125         if (ret) {
 126                 pr_err("PM: Could not ioremap SCU\n");
 127                 return ret;
 128         }
 129
 130         ret = amx3_common_init(idle);
 131
 132         return ret;
 133 }
 134
 135 static int amx3_suspend_deinit(void)
 136 {
 137         idle_fn = NULL;
 138         return 0;
 139 }
 140
 141 static void amx3_pre_suspend_common(void)
 142 {
 143         omap_set_pwrdm_state(gfx_pwrdm, PWRDM_POWER_OFF);
 144 }
 145
 146 static void amx3_post_suspend_common(void)
 147 {
 148         int status;
 149         /*
 150          * Because gfx_pwrdm is the only one under MPU control,
 151          * comment on transition status
 152          */
 153         status = pwrdm_read_pwrst(gfx_pwrdm);
 154         if (status != PWRDM_POWER_OFF)
 155                 pr_err("PM: GFX domain did not transition: %x\n", status);
 156 }
 157
 158 static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long),
 159                           unsigned long args)
 160 {
 161         int ret = 0;
 162
 163         amx3_pre_suspend_common();
 164         ret = cpu_suspend(args, fn);
 165         amx3_post_suspend_common();
 166
 167         /*
 168          * BUG: GFX_L4LS clock domain needs to be woken up to
 169          * ensure thet L4LS clock domain does not get stuck in
 170          * transition. If that happens L3 module does not get
 171          * disabled, thereby leading to PER power domain
 172          * transition failing
 173          */
 174
 175         clkdm_wakeup(gfx_l4ls_clkdm);
 176         clkdm_sleep(gfx_l4ls_clkdm);
 177
 178         return ret;
 179 }
 180
 181 static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long),
 182                           unsigned long args)
 183 {
 184         int ret = 0;
 185
 186         /* Suspend secure side on HS devices */
 187         if (omap_type() != OMAP2_DEVICE_TYPE_GP)
 188                 omap_secure_dispatcher(AM43xx_PPA_SVC_PM_SUSPEND,
 189                                        FLAG_START_CRITICAL,
 190                                        0, 0, 0, 0, 0);
 191
 192         amx3_pre_suspend_common();
 193         scu_power_mode(scu_base, SCU_PM_POWEROFF);
 194         ret = cpu_suspend(args, fn);
 195         scu_power_mode(scu_base, SCU_PM_NORMAL);
 196
 197         if (!am43xx_check_off_mode_enable())
 198                 amx3_post_suspend_common();
 199
 200         /* Resume secure side on HS devices */
 201         if (omap_type() != OMAP2_DEVICE_TYPE_GP)
 202                 omap_secure_dispatcher(AM43xx_PPA_SVC_PM_RESUME,
 203                                        FLAG_START_CRITICAL,
 204                                        0, 0, 0, 0, 0);
 205
 206         return ret;
 207 }
 208
 209 static int am33xx_cpu_suspend(int (*fn)(unsigned long), unsigned long args)
 210 {
 211         int ret = 0;
 212
 213         if (omap_irq_pending() || need_resched())
 214                 return ret;
 215
 216         ret = cpu_suspend(args, fn);
 217
 218         return ret;
 219 }
 220
 221 static int am43xx_cpu_suspend(int (*fn)(unsigned long), unsigned long args)
 222 {
 223         int ret = 0;
 224
 225         if (!scu_base)
 226                 return 0;
 227
 228         scu_power_mode(scu_base, SCU_PM_DORMANT);
 229         ret = cpu_suspend(args, fn);
 230         scu_power_mode(scu_base, SCU_PM_NORMAL);
 231
 232         return ret;
 233 }
 234
 235 static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void)
 236 {
 237         if (soc_is_am33xx())
 238                 return &am33xx_pm_sram;
 239         else if (soc_is_am437x())
 240                 return &am43xx_pm_sram;
 241         else
 242                 return NULL;
 243 }
 244
 245 void __iomem *am43xx_get_rtc_base_addr(void)
 246 {
 247         rtc_oh = omap_hwmod_lookup("rtc");
 248
 249         return omap_hwmod_get_mpu_rt_va(rtc_oh);
 250 }
 251
 252 static void am43xx_save_context(void)
 253 {
 254 }
 255
 256 static void am33xx_save_context(void)
 257 {
 258         omap_intc_save_context();
 259 }
 260
 261 static void am33xx_restore_context(void)
 262 {
 263         omap_intc_restore_context();
 264 }
 265
 266 static void am43xx_restore_context(void)
 267 {
 268         /*
 269          * HACK: restore dpll_per_clkdcoldo register contents, to avoid
 270          * breaking suspend-resume
 271          */
 272         writel_relaxed(0x0, AM33XX_L4_WK_IO_ADDRESS(0x44df2e14));
 273 }
 274
 275 static void am43xx_prepare_rtc_suspend(void)
 276 {
 277         omap_hwmod_enable(rtc_oh);
 278 }
 279
 280 static void am43xx_prepare_rtc_resume(void)
 281 {
 282         omap_hwmod_idle(rtc_oh);
 283 }
 284
 285 static struct am33xx_pm_platform_data am33xx_ops = {
 286         .init = am33xx_suspend_init,
 287         .deinit = amx3_suspend_deinit,
 288         .soc_suspend = am33xx_suspend,
 289         .cpu_suspend = am33xx_cpu_suspend,
 290         .get_sram_addrs = amx3_get_sram_addrs,
 291         .save_context = am33xx_save_context,
 292         .restore_context = am33xx_restore_context,
 293         .prepare_rtc_suspend = am43xx_prepare_rtc_suspend,
 294         .prepare_rtc_resume = am43xx_prepare_rtc_resume,
 295         .check_off_mode_enable = am33xx_check_off_mode_enable,
 296         .get_rtc_base_addr = am43xx_get_rtc_base_addr,
 297 };
 298
 299 static struct am33xx_pm_platform_data am43xx_ops = {
 300         .init = am43xx_suspend_init,
 301         .deinit = amx3_suspend_deinit,
 302         .soc_suspend = am43xx_suspend,
 303         .cpu_suspend = am43xx_cpu_suspend,
 304         .get_sram_addrs = amx3_get_sram_addrs,
 305         .save_context = am43xx_save_context,
 306         .restore_context = am43xx_restore_context,
 307         .prepare_rtc_suspend = am43xx_prepare_rtc_suspend,
 308         .prepare_rtc_resume = am43xx_prepare_rtc_resume,
 309         .check_off_mode_enable = am43xx_check_off_mode_enable,
 310         .get_rtc_base_addr = am43xx_get_rtc_base_addr,
 311 };
 312
 313 static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void)
 314 {
 315         if (soc_is_am33xx())
 316                 return &am33xx_ops;
 317         else if (soc_is_am437x())
 318                 return &am43xx_ops;
 319         else
 320                 return NULL;
 321 }
 322
 323 int __init amx3_common_pm_init(void)
 324 {
 325         struct am33xx_pm_platform_data *pdata;
 326         struct platform_device_info devinfo;
 327
 328         pdata = am33xx_pm_get_pdata();
 329
 330         memset(&devinfo, 0, sizeof(devinfo));
 331         devinfo.name = "pm33xx";
 332         devinfo.data = pdata;
 333         devinfo.size_data = sizeof(*pdata);
 334         devinfo.id = -1;
 335         platform_device_register_full(&devinfo);
 336
 337         return 0;
 338 }
 339
 340 static int __init amx3_idle_init(struct device_node *cpu_node, int cpu)
 341 {
 342         struct device_node *state_node;
 343         struct amx3_idle_state states[CPUIDLE_STATE_MAX];
 344         int i;
 345         int state_count = 1;
 346
 347         for (i = 0; ; i++) {
 348                 state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i);
 349                 if (!state_node)
 350                         break;
 351
 352                 if (!of_device_is_available(state_node))
 353                         continue;
 354
 355                 if (i == CPUIDLE_STATE_MAX) {
 356                         pr_warn("%s: cpuidle states reached max possible\n",
 357                                 __func__);
 358                         break;
 359                 }
 360
 361                 states[state_count].wfi_flags = 0;
 362
 363                 if (of_property_read_bool(state_node, "ti,idle-wkup-m3"))
 364                         states[state_count].wfi_flags |= WFI_FLAG_WAKE_M3 |
 365                                                          WFI_FLAG_FLUSH_CACHE;
 366
 367                 state_count++;
 368         }
 369
 370         idle_states = kcalloc(state_count, sizeof(*idle_states), GFP_KERNEL);
 371         if (!idle_states)
 372                 return -ENOMEM;
 373
 374         for (i = 1; i < state_count; i++)
 375                 idle_states[i].wfi_flags = states[i].wfi_flags;
 376
 377         return 0;
 378 }
 379
 380 static int amx3_idle_enter(unsigned long index)
 381 {
 382         struct amx3_idle_state *idle_state = &idle_states[index];
 383
 384         if (!idle_state)
 385                 return -EINVAL;
 386
 387         if (idle_fn)
 388                 idle_fn(idle_state->wfi_flags);
 389
 390         return 0;
 391 }
 392
 393 static struct cpuidle_ops amx3_cpuidle_ops __initdata = {
 394         .init = amx3_idle_init,
 395         .suspend = amx3_idle_enter,
 396 };
 397
 398 CPUIDLE_METHOD_OF_DECLARE(pm33xx_idle, "ti,am3352", &amx3_cpuidle_ops);
 399 CPUIDLE_METHOD_OF_DECLARE(pm43xx_idle, "ti,am4372", &amx3_cpuidle_ops);