arch/arm/mach-omap2/scrm44xx.h

   1 /*
   2  * OMAP44xx SCRM registers and bitfields
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  *
   6  * Benoit Cousson (b-cousson@ti.com)
   7  *
   8  * This file is automatically generated from the OMAP hardware databases.
   9  * We respectfully ask that any modifications to this file be coordinated
  10  * with the public linux-omap@vger.kernel.org mailing list and the
  11  * authors above to ensure that the autogeneration scripts are kept
  12  * up-to-date with the file contents.
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License version 2 as
  16  * published by the Free Software Foundation.
  17  */
  18
  19 #ifndef __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H
  20 #define __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H
  21
  22 #define OMAP4_SCRM_BASE                         0x4a30a000
  23
  24 #define OMAP44XX_SCRM_REGADDR(reg)      \
  25                 OMAP2_L4_IO_ADDRESS(OMAP4_SCRM_BASE + (reg))
  26
  27 /* Registers offset */
  28 #define OMAP4_SCRM_REVISION_SCRM_OFFSET         0x0000
  29 #define OMAP4_SCRM_REVISION_SCRM                OMAP44XX_SCRM_REGADDR(0x0000)
  30 #define OMAP4_SCRM_CLKSETUPTIME_OFFSET          0x0100
  31 #define OMAP4_SCRM_CLKSETUPTIME                 OMAP44XX_SCRM_REGADDR(0x0100)
  32 #define OMAP4_SCRM_PMICSETUPTIME_OFFSET         0x0104
  33 #define OMAP4_SCRM_PMICSETUPTIME                OMAP44XX_SCRM_REGADDR(0x0104)
  34 #define OMAP4_SCRM_ALTCLKSRC_OFFSET             0x0110
  35 #define OMAP4_SCRM_ALTCLKSRC                    OMAP44XX_SCRM_REGADDR(0x0110)
  36 #define OMAP4_SCRM_MODEMCLKM_OFFSET             0x0118
  37 #define OMAP4_SCRM_MODEMCLKM                    OMAP44XX_SCRM_REGADDR(0x0118)
  38 #define OMAP4_SCRM_D2DCLKM_OFFSET               0x011c
  39 #define OMAP4_SCRM_D2DCLKM                      OMAP44XX_SCRM_REGADDR(0x011c)
  40 #define OMAP4_SCRM_EXTCLKREQ_OFFSET             0x0200
  41 #define OMAP4_SCRM_EXTCLKREQ                    OMAP44XX_SCRM_REGADDR(0x0200)
  42 #define OMAP4_SCRM_ACCCLKREQ_OFFSET             0x0204
  43 #define OMAP4_SCRM_ACCCLKREQ                    OMAP44XX_SCRM_REGADDR(0x0204)
  44 #define OMAP4_SCRM_PWRREQ_OFFSET                0x0208
  45 #define OMAP4_SCRM_PWRREQ                       OMAP44XX_SCRM_REGADDR(0x0208)
  46 #define OMAP4_SCRM_AUXCLKREQ0_OFFSET            0x0210
  47 #define OMAP4_SCRM_AUXCLKREQ0                   OMAP44XX_SCRM_REGADDR(0x0210)
  48 #define OMAP4_SCRM_AUXCLKREQ1_OFFSET            0x0214
  49 #define OMAP4_SCRM_AUXCLKREQ1                   OMAP44XX_SCRM_REGADDR(0x0214)
  50 #define OMAP4_SCRM_AUXCLKREQ2_OFFSET            0x0218
  51 #define OMAP4_SCRM_AUXCLKREQ2                   OMAP44XX_SCRM_REGADDR(0x0218)
  52 #define OMAP4_SCRM_AUXCLKREQ3_OFFSET            0x021c
  53 #define OMAP4_SCRM_AUXCLKREQ3                   OMAP44XX_SCRM_REGADDR(0x021c)
  54 #define OMAP4_SCRM_AUXCLKREQ4_OFFSET            0x0220
  55 #define OMAP4_SCRM_AUXCLKREQ4                   OMAP44XX_SCRM_REGADDR(0x0220)
  56 #define OMAP4_SCRM_AUXCLKREQ5_OFFSET            0x0224
  57 #define OMAP4_SCRM_AUXCLKREQ5                   OMAP44XX_SCRM_REGADDR(0x0224)
  58 #define OMAP4_SCRM_D2DCLKREQ_OFFSET             0x0234
  59 #define OMAP4_SCRM_D2DCLKREQ                    OMAP44XX_SCRM_REGADDR(0x0234)
  60 #define OMAP4_SCRM_AUXCLK0_OFFSET               0x0310
  61 #define OMAP4_SCRM_AUXCLK0                      OMAP44XX_SCRM_REGADDR(0x0310)
  62 #define OMAP4_SCRM_AUXCLK1_OFFSET               0x0314
  63 #define OMAP4_SCRM_AUXCLK1                      OMAP44XX_SCRM_REGADDR(0x0314)
  64 #define OMAP4_SCRM_AUXCLK2_OFFSET               0x0318
  65 #define OMAP4_SCRM_AUXCLK2                      OMAP44XX_SCRM_REGADDR(0x0318)
  66 #define OMAP4_SCRM_AUXCLK3_OFFSET               0x031c
  67 #define OMAP4_SCRM_AUXCLK3                      OMAP44XX_SCRM_REGADDR(0x031c)
  68 #define OMAP4_SCRM_AUXCLK4_OFFSET               0x0320
  69 #define OMAP4_SCRM_AUXCLK4                      OMAP44XX_SCRM_REGADDR(0x0320)
  70 #define OMAP4_SCRM_AUXCLK5_OFFSET               0x0324
  71 #define OMAP4_SCRM_AUXCLK5                      OMAP44XX_SCRM_REGADDR(0x0324)
  72 #define OMAP4_SCRM_RSTTIME_OFFSET               0x0400
  73 #define OMAP4_SCRM_RSTTIME                      OMAP44XX_SCRM_REGADDR(0x0400)
  74 #define OMAP4_SCRM_MODEMRSTCTRL_OFFSET          0x0418
  75 #define OMAP4_SCRM_MODEMRSTCTRL                 OMAP44XX_SCRM_REGADDR(0x0418)
  76 #define OMAP4_SCRM_D2DRSTCTRL_OFFSET            0x041c
  77 #define OMAP4_SCRM_D2DRSTCTRL                   OMAP44XX_SCRM_REGADDR(0x041c)
  78 #define OMAP4_SCRM_EXTPWRONRSTCTRL_OFFSET       0x0420
  79 #define OMAP4_SCRM_EXTPWRONRSTCTRL              OMAP44XX_SCRM_REGADDR(0x0420)
  80 #define OMAP4_SCRM_EXTWARMRSTST_OFFSET          0x0510
  81 #define OMAP4_SCRM_EXTWARMRSTST                 OMAP44XX_SCRM_REGADDR(0x0510)
  82 #define OMAP4_SCRM_APEWARMRSTST_OFFSET          0x0514
  83 #define OMAP4_SCRM_APEWARMRSTST                 OMAP44XX_SCRM_REGADDR(0x0514)
  84 #define OMAP4_SCRM_MODEMWARMRSTST_OFFSET        0x0518
  85 #define OMAP4_SCRM_MODEMWARMRSTST               OMAP44XX_SCRM_REGADDR(0x0518)
  86 #define OMAP4_SCRM_D2DWARMRSTST_OFFSET          0x051c
  87 #define OMAP4_SCRM_D2DWARMRSTST                 OMAP44XX_SCRM_REGADDR(0x051c)
  88
  89 /* Registers shifts and masks */
  90
  91 /* REVISION_SCRM */
  92 #define OMAP4_REV_SHIFT                         0
  93 #define OMAP4_REV_MASK                          (0xff << 0)
  94
  95 /* CLKSETUPTIME */
  96 #define OMAP4_DOWNTIME_SHIFT                    16
  97 #define OMAP4_DOWNTIME_MASK                     (0x3f << 16)
  98 #define OMAP4_SETUPTIME_SHIFT                   0
  99 #define OMAP4_SETUPTIME_MASK                    (0xfff << 0)
 100
 101 /* PMICSETUPTIME */
 102 #define OMAP4_WAKEUPTIME_SHIFT                  16
 103 #define OMAP4_WAKEUPTIME_MASK                   (0x3f << 16)
 104 #define OMAP4_SLEEPTIME_SHIFT                   0
 105 #define OMAP4_SLEEPTIME_MASK                    (0x3f << 0)
 106
 107 /* ALTCLKSRC */
 108 #define OMAP4_ENABLE_EXT_SHIFT                  3
 109 #define OMAP4_ENABLE_EXT_MASK                   (1 << 3)
 110 #define OMAP4_ENABLE_INT_SHIFT                  2
 111 #define OMAP4_ENABLE_INT_MASK                   (1 << 2)
 112 #define OMAP4_ALTCLKSRC_MODE_SHIFT              0
 113 #define OMAP4_ALTCLKSRC_MODE_MASK               (0x3 << 0)
 114
 115 /* MODEMCLKM */
 116 #define OMAP4_CLK_32KHZ_SHIFT                   0
 117 #define OMAP4_CLK_32KHZ_MASK                    (1 << 0)
 118
 119 /* D2DCLKM */
 120 #define OMAP4_SYSCLK_SHIFT                      1
 121 #define OMAP4_SYSCLK_MASK                       (1 << 1)
 122
 123 /* EXTCLKREQ */
 124 #define OMAP4_POLARITY_SHIFT                    0
 125 #define OMAP4_POLARITY_MASK                     (1 << 0)
 126
 127 /* AUXCLKREQ0 */
 128 #define OMAP4_MAPPING_SHIFT                     2
 129 #define OMAP4_MAPPING_MASK                      (0x7 << 2)
 130 #define OMAP4_MAPPING_WIDTH                     3
 131 #define OMAP4_ACCURACY_SHIFT                    1
 132 #define OMAP4_ACCURACY_MASK                     (1 << 1)
 133
 134 /* AUXCLK0 */
 135 #define OMAP4_CLKDIV_SHIFT                      16
 136 #define OMAP4_CLKDIV_MASK                       (0xf << 16)
 137 #define OMAP4_CLKDIV_WIDTH                      4
 138 #define OMAP4_DISABLECLK_SHIFT                  9
 139 #define OMAP4_DISABLECLK_MASK                   (1 << 9)
 140 #define OMAP4_ENABLE_SHIFT                      8
 141 #define OMAP4_ENABLE_MASK                       (1 << 8)
 142 #define OMAP4_SRCSELECT_SHIFT                   1
 143 #define OMAP4_SRCSELECT_MASK                    (0x3 << 1)
 144
 145 /* RSTTIME */
 146 #define OMAP4_RSTTIME_SHIFT                     0
 147 #define OMAP4_RSTTIME_MASK                      (0xf << 0)
 148
 149 /* MODEMRSTCTRL */
 150 #define OMAP4_WARMRST_SHIFT                     1
 151 #define OMAP4_WARMRST_MASK                      (1 << 1)
 152 #define OMAP4_COLDRST_SHIFT                     0
 153 #define OMAP4_COLDRST_MASK                      (1 << 0)
 154
 155 /* EXTPWRONRSTCTRL */
 156 #define OMAP4_PWRONRST_SHIFT                    1
 157 #define OMAP4_PWRONRST_MASK                     (1 << 1)
 158 #define OMAP4_ENABLE_EXTPWRONRSTCTRL_SHIFT      0
 159 #define OMAP4_ENABLE_EXTPWRONRSTCTRL_MASK       (1 << 0)
 160
 161 /* EXTWARMRSTST */
 162 #define OMAP4_EXTWARMRSTST_SHIFT                0
 163 #define OMAP4_EXTWARMRSTST_MASK                 (1 << 0)
 164
 165 /* APEWARMRSTST */
 166 #define OMAP4_APEWARMRSTST_SHIFT                1
 167 #define OMAP4_APEWARMRSTST_MASK                 (1 << 1)
 168
 169 /* MODEMWARMRSTST */
 170 #define OMAP4_MODEMWARMRSTST_SHIFT              2
 171 #define OMAP4_MODEMWARMRSTST_MASK               (1 << 2)
 172
 173 /* D2DWARMRSTST */
 174 #define OMAP4_D2DWARMRSTST_SHIFT                3
 175 #define OMAP4_D2DWARMRSTST_MASK                 (1 << 3)
 176
 177 #endif