soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling
[rpmsg/hwspinlock.git] / drivers / soc / ti / knav_qmss.h
1 /*
2  * Keystone Navigator QMSS driver internal header
3  *
4  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5  * Author:      Sandeep Nair <sandeep_n@ti.com>
6  *              Cyril Chemparathy <cyril@ti.com>
7  *              Santosh Shilimkar <santosh.shilimkar@ti.com>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * version 2 as published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  * General Public License for more details.
17  */
19 #ifndef __KNAV_QMSS_H__
20 #define __KNAV_QMSS_H__
22 #include <linux/percpu.h>
24 #define THRESH_GTE      BIT(7)
25 #define THRESH_LT       0
27 #define PDSP_CTRL_PC_MASK       0xffff0000
28 #define PDSP_CTRL_SOFT_RESET    BIT(0)
29 #define PDSP_CTRL_ENABLE        BIT(1)
30 #define PDSP_CTRL_RUNNING       BIT(15)
32 #define ACC_MAX_CHANNEL         48
33 #define ACC_DEFAULT_PERIOD      25 /* usecs */
35 #define ACC_CHANNEL_INT_BASE            2
37 #define ACC_LIST_ENTRY_TYPE             1
38 #define ACC_LIST_ENTRY_WORDS            (1 << ACC_LIST_ENTRY_TYPE)
39 #define ACC_LIST_ENTRY_QUEUE_IDX        0
40 #define ACC_LIST_ENTRY_DESC_IDX (ACC_LIST_ENTRY_WORDS - 1)
42 #define ACC_CMD_DISABLE_CHANNEL 0x80
43 #define ACC_CMD_ENABLE_CHANNEL  0x81
44 #define ACC_CFG_MULTI_QUEUE             BIT(21)
46 #define ACC_INTD_OFFSET_EOI             (0x0010)
47 #define ACC_INTD_OFFSET_COUNT(ch)       (0x0300 + 4 * (ch))
48 #define ACC_INTD_OFFSET_STATUS(ch)      (0x0200 + 4 * ((ch) / 32))
50 #define RANGE_MAX_IRQS                  64
52 #define ACC_DESCS_MAX           SZ_1K
53 #define ACC_DESCS_MASK          (ACC_DESCS_MAX - 1)
54 #define DESC_SIZE_MASK          0xful
55 #define DESC_PTR_MASK           (~DESC_SIZE_MASK)
57 #define KNAV_NAME_SIZE                  32
59 enum knav_acc_result {
60         ACC_RET_IDLE,
61         ACC_RET_SUCCESS,
62         ACC_RET_INVALID_COMMAND,
63         ACC_RET_INVALID_CHANNEL,
64         ACC_RET_INACTIVE_CHANNEL,
65         ACC_RET_ACTIVE_CHANNEL,
66         ACC_RET_INVALID_QUEUE,
67         ACC_RET_INVALID_RET,
68 };
70 struct knav_reg_config {
71         u32             revision;
72         u32             __pad1;
73         u32             divert;
74         u32             link_ram_base0;
75         u32             link_ram_size0;
76         u32             link_ram_base1;
77         u32             __pad2[2];
78         u32             starvation[0];
79 };
81 struct knav_reg_region {
82         u32             base;
83         u32             start_index;
84         u32             size_count;
85         u32             __pad;
86 };
88 struct knav_reg_pdsp_regs {
89         u32             control;
90         u32             status;
91         u32             cycle_count;
92         u32             stall_count;
93 };
95 struct knav_reg_acc_command {
96         u32             command;
97         u32             queue_mask;
98         u32             list_dma;
99         u32             queue_num;
100         u32             timer_config;
101 };
103 struct knav_link_ram_block {
104         dma_addr_t       dma;
105         void            *virt;
106         size_t           size;
107 };
109 struct knav_acc_info {
110         u32                      pdsp_id;
111         u32                      start_channel;
112         u32                      list_entries;
113         u32                      pacing_mode;
114         u32                      timer_count;
115         int                      mem_size;
116         int                      list_size;
117         struct knav_pdsp_info   *pdsp;
118 };
120 struct knav_acc_channel {
121         u32                     channel;
122         u32                     list_index;
123         u32                     open_mask;
124         u32                     *list_cpu[2];
125         dma_addr_t              list_dma[2];
126         char                    name[KNAV_NAME_SIZE];
127         atomic_t                retrigger_count;
128 };
130 struct knav_pdsp_info {
131         const char                                      *name;
132         struct knav_reg_pdsp_regs  __iomem              *regs;
133         union {
134                 void __iomem                            *command;
135                 struct knav_reg_acc_command __iomem     *acc_command;
136                 u32 __iomem                             *qos_command;
137         };
138         void __iomem                                    *intd;
139         u32 __iomem                                     *iram;
140         u32                                             id;
141         struct list_head                                list;
142         bool                                            loaded;
143         bool                                            started;
144 };
146 struct knav_qmgr_info {
147         unsigned                        start_queue;
148         unsigned                        num_queues;
149         struct knav_reg_config __iomem  *reg_config;
150         struct knav_reg_region __iomem  *reg_region;
151         struct knav_reg_queue __iomem   *reg_push, *reg_pop, *reg_peek;
152         void __iomem                    *reg_status;
153         struct list_head                list;
154 };
156 #define KNAV_NUM_LINKRAM        2
158 /**
159  * struct knav_queue_stats:     queue statistics
160  * pushes:                      number of push operations
161  * pops:                        number of pop operations
162  * push_errors:                 number of push errors
163  * pop_errors:                  number of pop errors
164  * notifies:                    notifier counts
165  */
166 struct knav_queue_stats {
167         unsigned int pushes;
168         unsigned int pops;
169         unsigned int push_errors;
170         unsigned int pop_errors;
171         unsigned int notifies;
172 };
174 /**
175  * struct knav_reg_queue:       queue registers
176  * @entry_count:                valid entries in the queue
177  * @byte_count:                 total byte count in thhe queue
178  * @packet_size:                packet size for the queue
179  * @ptr_size_thresh:            packet pointer size threshold
180  */
181 struct knav_reg_queue {
182         u32             entry_count;
183         u32             byte_count;
184         u32             packet_size;
185         u32             ptr_size_thresh;
186 };
188 /**
189  * struct knav_region:          qmss region info
190  * @dma_start, dma_end:         start and end dma address
191  * @virt_start, virt_end:       start and end virtual address
192  * @desc_size:                  descriptor size
193  * @used_desc:                  consumed descriptors
194  * @id:                         region number
195  * @num_desc:                   total descriptors
196  * @link_index:                 index of the first descriptor
197  * @name:                       region name
198  * @list:                       instance in the device's region list
199  * @pools:                      list of descriptor pools in the region
200  */
201 struct knav_region {
202         dma_addr_t              dma_start, dma_end;
203         void                    *virt_start, *virt_end;
204         unsigned                desc_size;
205         unsigned                used_desc;
206         unsigned                id;
207         unsigned                num_desc;
208         unsigned                link_index;
209         const char              *name;
210         struct list_head        list;
211         struct list_head        pools;
212 };
214 /**
215  * struct knav_pool:            qmss pools
216  * @dev:                        device pointer
217  * @region:                     qmss region info
218  * @queue:                      queue registers
219  * @kdev:                       qmss device pointer
220  * @region_offset:              offset from the base
221  * @num_desc:                   total descriptors
222  * @desc_size:                  descriptor size
223  * @region_id:                  region number
224  * @name:                       pool name
225  * @list:                       list head
226  * @region_inst:                instance in the region's pool list
227  */
228 struct knav_pool {
229         struct device                   *dev;
230         struct knav_region              *region;
231         struct knav_queue               *queue;
232         struct knav_device              *kdev;
233         int                             region_offset;
234         int                             num_desc;
235         int                             desc_size;
236         int                             region_id;
237         const char                      *name;
238         struct list_head                list;
239         struct list_head                region_inst;
240 };
242 /**
243  * struct knav_queue_inst:              qmss queue instace properties
244  * @descs:                              descriptor pointer
245  * @desc_head, desc_tail, desc_count:   descriptor counters
246  * @acc:                                accumulator channel pointer
247  * @kdev:                               qmss device pointer
248  * @range:                              range info
249  * @qmgr:                               queue manager info
250  * @id:                                 queue instace id
251  * @irq_num:                            irq line number
252  * @notify_needed:                      notifier needed based on queue type
253  * @num_notifiers:                      total notifiers
254  * @handles:                            list head
255  * @name:                               queue instance name
256  * @irq_name:                           irq line name
257  */
258 struct knav_queue_inst {
259         u32                             *descs;
260         atomic_t                        desc_head, desc_tail, desc_count;
261         struct knav_acc_channel *acc;
262         struct knav_device              *kdev;
263         struct knav_range_info          *range;
264         struct knav_qmgr_info           *qmgr;
265         u32                             id;
266         int                             irq_num;
267         int                             notify_needed;
268         atomic_t                        num_notifiers;
269         struct list_head                handles;
270         const char                      *name;
271         const char                      *irq_name;
272 };
274 /**
275  * struct knav_queue:                   qmss queue properties
276  * @reg_push, reg_pop, reg_peek:        push, pop queue registers
277  * @inst:                               qmss queue instace properties
278  * @notifier_fn:                        notifier function
279  * @notifier_fn_arg:                    notifier function argument
280  * @notifier_enabled:                   notier enabled for a give queue
281  * @rcu:                                rcu head
282  * @flags:                              queue flags
283  * @list:                               list head
284  */
285 struct knav_queue {
286         struct knav_reg_queue __iomem   *reg_push, *reg_pop, *reg_peek;
287         struct knav_queue_inst          *inst;
288         struct knav_queue_stats __percpu        *stats;
289         knav_queue_notify_fn            notifier_fn;
290         void                            *notifier_fn_arg;
291         atomic_t                        notifier_enabled;
292         struct rcu_head                 rcu;
293         unsigned                        flags;
294         struct list_head                list;
295 };
297 enum qmss_version {
298         QMSS,
299         QMSS_66AK2G,
300 };
302 struct knav_device {
303         struct device                           *dev;
304         unsigned                                base_id;
305         unsigned                                num_queues;
306         unsigned                                num_queues_in_use;
307         unsigned                                inst_shift;
308         struct knav_link_ram_block              link_rams[KNAV_NUM_LINKRAM];
309         void                                    *instances;
310         struct list_head                        regions;
311         struct list_head                        queue_ranges;
312         struct list_head                        pools;
313         struct list_head                        pdsps;
314         struct list_head                        qmgrs;
315         enum qmss_version                       version;
316 };
318 struct knav_range_ops {
319         int     (*init_range)(struct knav_range_info *range);
320         int     (*free_range)(struct knav_range_info *range);
321         int     (*init_queue)(struct knav_range_info *range,
322                               struct knav_queue_inst *inst);
323         int     (*open_queue)(struct knav_range_info *range,
324                               struct knav_queue_inst *inst, unsigned flags);
325         int     (*close_queue)(struct knav_range_info *range,
326                                struct knav_queue_inst *inst);
327         int     (*set_notify)(struct knav_range_info *range,
328                               struct knav_queue_inst *inst, bool enabled);
329 };
331 struct knav_irq_info {
332         int     irq;
333         u32     cpu_map;
334 };
336 struct knav_range_info {
337         const char                      *name;
338         struct knav_device              *kdev;
339         unsigned                        queue_base;
340         unsigned                        num_queues;
341         void                            *queue_base_inst;
342         unsigned                        flags;
343         struct list_head                list;
344         struct knav_range_ops           *ops;
345         struct knav_acc_info            acc_info;
346         struct knav_acc_channel *acc;
347         unsigned                        num_irqs;
348         struct knav_irq_info            irqs[RANGE_MAX_IRQS];
349 };
351 #define RANGE_RESERVED          BIT(0)
352 #define RANGE_HAS_IRQ           BIT(1)
353 #define RANGE_HAS_ACCUMULATOR   BIT(2)
354 #define RANGE_MULTI_QUEUE       BIT(3)
356 #define for_each_region(kdev, region)                           \
357         list_for_each_entry(region, &kdev->regions, list)
359 #define first_region(kdev)                                      \
360         list_first_entry_or_null(&kdev->regions, \
361                                  struct knav_region, list)
363 #define for_each_queue_range(kdev, range)                       \
364         list_for_each_entry(range, &kdev->queue_ranges, list)
366 #define first_queue_range(kdev)                                 \
367         list_first_entry_or_null(&kdev->queue_ranges, \
368                                  struct knav_range_info, list)
370 #define for_each_pool(kdev, pool)                               \
371         list_for_each_entry(pool, &kdev->pools, list)
373 #define for_each_pdsp(kdev, pdsp)                               \
374         list_for_each_entry(pdsp, &kdev->pdsps, list)
376 #define for_each_qmgr(kdev, qmgr)                               \
377         list_for_each_entry(qmgr, &kdev->qmgrs, list)
379 static inline struct knav_pdsp_info *
380 knav_find_pdsp(struct knav_device *kdev, unsigned pdsp_id)
382         struct knav_pdsp_info *pdsp;
384         for_each_pdsp(kdev, pdsp)
385                 if (pdsp_id == pdsp->id)
386                         return pdsp;
387         return NULL;
390 extern int knav_init_acc_range(struct knav_device *kdev,
391                                         struct device_node *node,
392                                         struct knav_range_info *range);
393 extern void knav_queue_notify(struct knav_queue_inst *inst);
395 #endif /* __KNAV_QMSS_H__ */