1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AM33XX Power Management Routines
4 *
5 * Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
6 * Vaibhav Bedia, Dave Gerlach
7 */
9 #include <linux/clk.h>
10 #include <linux/cpu.h>
11 #include <linux/err.h>
12 #include <linux/genalloc.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/module.h>
17 #include <linux/nvmem-consumer.h>
18 #include <linux/of.h>
19 #include <linux/platform_data/pm33xx.h>
20 #include <linux/platform_device.h>
21 #include <linux/rtc.h>
22 #include <linux/sizes.h>
23 #include <linux/sram.h>
24 #include <linux/suspend.h>
25 #include <linux/ti-emif-sram.h>
26 #include <linux/wkup_m3_ipc.h>
28 #include <asm/proc-fns.h>
29 #include <asm/suspend.h>
30 #include <asm/system_misc.h>
32 #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
33 (unsigned long)pm_sram->do_wfi)
35 #define RTC_SCRATCH_RESUME_REG 0
36 #define RTC_SCRATCH_MAGIC_REG 1
37 #define RTC_REG_BOOT_MAGIC 0x8cd0 /* RTC */
38 #define GIC_INT_SET_PENDING_BASE 0x200
39 #define AM43XX_GIC_DIST_BASE 0x48241000
41 static u32 rtc_magic_val;
43 static int (*am33xx_do_wfi_sram)(unsigned long unused);
44 static phys_addr_t am33xx_do_wfi_sram_phys;
46 static struct gen_pool *sram_pool, *sram_pool_data;
47 static unsigned long ocmcram_location, ocmcram_location_data;
49 static struct rtc_device *omap_rtc;
50 static void __iomem *gic_dist_base;
52 static struct am33xx_pm_platform_data *pm_ops;
53 static struct am33xx_pm_sram_addr *pm_sram;
55 static struct device *pm33xx_dev;
56 static struct wkup_m3_ipc *m3_ipc;
58 #ifdef CONFIG_SUSPEND
60 static int rtc_only_idle;
61 static int retrigger_irq;
63 static unsigned long suspend_wfi_flags;
65 static struct wkup_m3_wakeup_src wakeup_src = {.irq_nr = 0,
66 .src = "Unknown",
67 };
69 static struct wkup_m3_wakeup_src rtc_alarm_wakeup = {
70 .irq_nr = 108, .src = "RTC Alarm",
71 };
73 static struct wkup_m3_wakeup_src rtc_ext_wakeup = {
74 .irq_nr = 0, .src = "Ext wakeup",
75 };
77 #endif
79 static u32 sram_suspend_address(unsigned long addr)
80 {
81 return ((unsigned long)am33xx_do_wfi_sram +
82 AMX3_PM_SRAM_SYMBOL_OFFSET(addr));
83 }
85 static int am33xx_push_sram_idle(void)
86 {
87 struct am33xx_pm_ro_sram_data ro_sram_data;
88 int ret;
89 u32 table_addr, ro_data_addr;
90 void *copy_addr;
92 ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data;
93 ro_sram_data.amx3_pm_sram_data_phys =
94 gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data);
95 ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr();
97 /* Save physical address to calculate resume offset during pm init */
98 am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool,
99 ocmcram_location);
101 am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location,
102 pm_sram->do_wfi,
103 *pm_sram->do_wfi_sz);
104 if (!am33xx_do_wfi_sram) {
105 dev_err(pm33xx_dev,
106 "PM: %s: am33xx_do_wfi copy to sram failed\n",
107 __func__);
108 return -ENODEV;
109 }
111 table_addr =
112 sram_suspend_address((unsigned long)pm_sram->emif_sram_table);
113 ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr);
114 if (ret) {
115 dev_dbg(pm33xx_dev,
116 "PM: %s: EMIF function copy failed\n", __func__);
117 return -EPROBE_DEFER;
118 }
120 ro_data_addr =
121 sram_suspend_address((unsigned long)pm_sram->ro_sram_data);
122 copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr,
123 &ro_sram_data,
124 sizeof(ro_sram_data));
125 if (!copy_addr) {
126 dev_err(pm33xx_dev,
127 "PM: %s: ro_sram_data copy to sram failed\n",
128 __func__);
129 return -ENODEV;
130 }
132 return 0;
133 }
135 static int __init am43xx_map_gic(void)
136 {
137 gic_dist_base = ioremap(AM43XX_GIC_DIST_BASE, SZ_4K);
139 if (!gic_dist_base)
140 return -ENOMEM;
142 return 0;
143 }
145 #ifdef CONFIG_SUSPEND
147 static int rtc_only_idle;
148 static int retrigger_irq;
150 struct wkup_m3_wakeup_src rtc_wake_src(void)
151 {
152 u32 i;
154 i = __raw_readl(pm_ops->get_rtc_base_addr() + 0x44) & 0x40;
156 if (i) {
157 retrigger_irq = rtc_alarm_wakeup.irq_nr;
158 return rtc_alarm_wakeup;
159 }
161 retrigger_irq = rtc_ext_wakeup.irq_nr;
163 return rtc_ext_wakeup;
164 }
166 int am33xx_rtc_only_idle(unsigned long wfi_flags)
167 {
168 rtc_power_off_program(omap_rtc);
169 am33xx_do_wfi_sram(wfi_flags);
170 return 0;
171 }
173 static int am33xx_pm_suspend(suspend_state_t suspend_state)
174 {
175 int i, ret = 0;
177 if (suspend_state == PM_SUSPEND_MEM &&
178 pm_ops->check_off_mode_enable()) {
179 pm_ops->prepare_rtc_suspend();
180 pm_ops->save_context();
181 suspend_wfi_flags |= WFI_FLAG_RTC_ONLY;
182 clk_save_context();
183 ret = pm_ops->soc_suspend(suspend_state, am33xx_rtc_only_idle,
184 suspend_wfi_flags);
186 suspend_wfi_flags &= ~WFI_FLAG_RTC_ONLY;
188 if (!ret) {
189 clk_restore_context();
190 pm_ops->restore_context();
191 m3_ipc->ops->set_rtc_only(m3_ipc);
192 am33xx_push_sram_idle();
193 }
194 } else {
195 ret = pm_ops->soc_suspend(suspend_state, am33xx_do_wfi_sram,
196 suspend_wfi_flags);
197 }
199 if (ret) {
200 dev_err(pm33xx_dev, "PM: Kernel suspend failure\n");
201 } else {
202 i = m3_ipc->ops->request_pm_status(m3_ipc);
204 switch (i) {
205 case 0:
206 dev_info(pm33xx_dev,
207 "PM: Successfully put all powerdomains to target state\n");
208 break;
209 case 1:
210 dev_err(pm33xx_dev,
211 "PM: Could not transition all powerdomains to target state\n");
212 ret = -1;
213 break;
214 default:
215 dev_err(pm33xx_dev,
216 "PM: CM3 returned unknown result = %d\n", i);
217 ret = -1;
218 }
220 /* print the wakeup reason */
221 if (rtc_only_idle) {
222 wakeup_src = rtc_wake_src();
223 pr_info("PM: Wakeup source %s\n", wakeup_src.src);
224 } else {
225 pr_info("PM: Wakeup source %s\n",
226 m3_ipc->ops->request_wake_src(m3_ipc));
227 }
228 }
230 if (suspend_state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable())
231 pm_ops->prepare_rtc_resume();
233 return ret;
234 }
236 static int am33xx_pm_enter(suspend_state_t suspend_state)
237 {
238 int ret = 0;
240 switch (suspend_state) {
241 case PM_SUSPEND_MEM:
242 case PM_SUSPEND_STANDBY:
243 ret = am33xx_pm_suspend(suspend_state);
244 break;
245 default:
246 ret = -EINVAL;
247 }
249 return ret;
250 }
252 static int am33xx_pm_begin(suspend_state_t state)
253 {
254 int ret = -EINVAL;
256 if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) {
257 nvmem_device_write(omap_rtc->nvmem, RTC_SCRATCH_MAGIC_REG * 4,
258 4, (void *)&rtc_magic_val);
259 rtc_only_idle = 1;
260 } else {
261 rtc_only_idle = 0;
262 }
264 cpu_idle_poll_ctrl(true);
266 switch (state) {
267 case PM_SUSPEND_MEM:
268 ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_DEEPSLEEP);
269 break;
270 case PM_SUSPEND_STANDBY:
271 ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_STANDBY);
272 break;
273 }
275 return ret;
276 }
278 static void am33xx_pm_end(void)
279 {
280 u32 val = 0;
282 m3_ipc->ops->finish_low_power(m3_ipc);
283 if (rtc_only_idle) {
284 if (retrigger_irq)
285 /*
286 * 32 bits of Interrupt Set-Pending correspond to 32
287 * 32 interupts. Compute the bit offset of the
288 * Interrupt and set that particular bit
289 * Compute the register offset by dividing interrupt
290 * number by 32 and mutiplying by 4
291 */
292 writel_relaxed(1 << (retrigger_irq & 31),
293 gic_dist_base + GIC_INT_SET_PENDING_BASE
294 + retrigger_irq / 32 * 4);
295 nvmem_device_write(omap_rtc->nvmem,
296 RTC_SCRATCH_MAGIC_REG * 4,
297 4, (void *)&val);
298 }
300 rtc_only_idle = 0;
302 cpu_idle_poll_ctrl(false);
303 }
305 static int am33xx_pm_valid(suspend_state_t state)
306 {
307 switch (state) {
308 case PM_SUSPEND_STANDBY:
309 case PM_SUSPEND_MEM:
310 return 1;
311 default:
312 return 0;
313 }
314 }
316 static const struct platform_suspend_ops am33xx_pm_ops = {
317 .begin = am33xx_pm_begin,
318 .end = am33xx_pm_end,
319 .enter = am33xx_pm_enter,
320 .valid = am33xx_pm_valid,
321 };
322 #endif /* CONFIG_SUSPEND */
324 static void am33xx_pm_set_ipc_ops(void)
325 {
326 u32 resume_address;
327 int temp;
329 temp = ti_emif_get_mem_type();
330 if (temp < 0) {
331 dev_err(pm33xx_dev, "PM: Cannot determine memory type, no PM available\n");
332 return;
333 }
334 m3_ipc->ops->set_mem_type(m3_ipc, temp);
336 /* Physical resume address to be used by ROM code */
337 resume_address = am33xx_do_wfi_sram_phys +
338 *pm_sram->resume_offset + 0x4;
340 m3_ipc->ops->set_resume_address(m3_ipc, (void *)resume_address);
341 }
343 static void am33xx_pm_free_sram(void)
344 {
345 gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz);
346 gen_pool_free(sram_pool_data, ocmcram_location_data,
347 sizeof(struct am33xx_pm_ro_sram_data));
348 }
350 /*
351 * Push the minimal suspend-resume code to SRAM
352 */
353 static int am33xx_pm_alloc_sram(void)
354 {
355 struct device_node *np;
356 int ret = 0;
358 np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu");
359 if (!np) {
360 np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
361 if (!np) {
362 dev_err(pm33xx_dev, "PM: %s: Unable to find device node for mpu\n",
363 __func__);
364 return -ENODEV;
365 }
366 }
368 sram_pool = of_gen_pool_get(np, "pm-sram", 0);
369 if (!sram_pool) {
370 dev_err(pm33xx_dev, "PM: %s: Unable to get sram pool for ocmcram\n",
371 __func__);
372 ret = -ENODEV;
373 goto mpu_put_node;
374 }
376 sram_pool_data = of_gen_pool_get(np, "pm-sram", 1);
377 if (!sram_pool_data) {
378 dev_err(pm33xx_dev, "PM: %s: Unable to get sram data pool for ocmcram\n",
379 __func__);
380 ret = -ENODEV;
381 goto mpu_put_node;
382 }
384 ocmcram_location = gen_pool_alloc(sram_pool, *pm_sram->do_wfi_sz);
385 if (!ocmcram_location) {
386 dev_err(pm33xx_dev, "PM: %s: Unable to allocate memory from ocmcram\n",
387 __func__);
388 ret = -ENOMEM;
389 goto mpu_put_node;
390 }
392 ocmcram_location_data = gen_pool_alloc(sram_pool_data,
393 sizeof(struct emif_regs_amx3));
394 if (!ocmcram_location_data) {
395 dev_err(pm33xx_dev, "PM: Unable to allocate memory from ocmcram\n");
396 gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz);
397 ret = -ENOMEM;
398 }
400 mpu_put_node:
401 of_node_put(np);
402 return ret;
403 }
405 static int am33xx_pm_rtc_setup(void)
406 {
407 struct device_node *np;
408 unsigned long val = 0;
410 np = of_find_node_by_name(NULL, "rtc");
412 if (of_device_is_available(np)) {
413 omap_rtc = rtc_class_open("rtc0");
414 if (!omap_rtc) {
415 pr_warn("PM: rtc0 not available");
416 return -EPROBE_DEFER;
417 }
419 nvmem_device_read(omap_rtc->nvmem, RTC_SCRATCH_MAGIC_REG * 4,
420 4, (void *)&rtc_magic_val);
421 if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC)
422 pr_warn("PM: bootloader does not support rtc-only!\n");
424 nvmem_device_write(omap_rtc->nvmem, RTC_SCRATCH_MAGIC_REG * 4,
425 4, (void *)&val);
426 val = pm_sram->resume_address;
427 nvmem_device_write(omap_rtc->nvmem, RTC_SCRATCH_RESUME_REG * 4,
428 4, (void *)&val);
429 } else {
430 pr_warn("PM: no-rtc available, rtc-only mode disabled.\n");
431 }
433 return 0;
434 }
436 static int am33xx_pm_probe(struct platform_device *pdev)
437 {
438 struct device *dev = &pdev->dev;
439 int ret;
441 if (!of_machine_is_compatible("ti,am33xx") &&
442 !of_machine_is_compatible("ti,am43"))
443 return -ENODEV;
445 pm_ops = dev->platform_data;
446 if (!pm_ops) {
447 dev_err(dev, "PM: Cannot get core PM ops!\n");
448 return -ENODEV;
449 }
451 ret = am43xx_map_gic();
452 if (ret) {
453 pr_err("PM: Could not ioremap GIC base\n");
454 return ret;
455 }
457 pm_sram = pm_ops->get_sram_addrs();
458 if (!pm_sram) {
459 dev_err(dev, "PM: Cannot get PM asm function addresses!!\n");
460 return -ENODEV;
461 }
463 m3_ipc = wkup_m3_ipc_get();
464 if (!m3_ipc) {
465 pr_err("PM: Cannot get wkup_m3_ipc handle\n");
466 return -EPROBE_DEFER;
467 }
469 pm33xx_dev = dev;
471 ret = am33xx_pm_alloc_sram();
472 if (ret)
473 return ret;
475 ret = am33xx_pm_rtc_setup();
476 if (ret)
477 goto err_free_sram;
479 ret = am33xx_push_sram_idle();
480 if (ret)
481 goto err_free_sram;
483 am33xx_pm_set_ipc_ops();
485 #ifdef CONFIG_SUSPEND
486 suspend_set_ops(&am33xx_pm_ops);
488 /*
489 * For a system suspend we must flush the caches, we want
490 * the DDR in self-refresh, we want to save the context
491 * of the EMIF, and we want the wkup_m3 to handle low-power
492 * transition.
493 */
494 suspend_wfi_flags |= WFI_FLAG_FLUSH_CACHE;
495 suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH;
496 suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF;
497 suspend_wfi_flags |= WFI_FLAG_WAKE_M3;
498 #endif /* CONFIG_SUSPEND */
500 ret = pm_ops->init(NULL);
501 if (ret) {
502 dev_err(dev, "Unable to call core pm init!\n");
503 ret = -ENODEV;
504 goto err_put_wkup_m3_ipc;
505 }
507 return 0;
509 err_put_wkup_m3_ipc:
510 wkup_m3_ipc_put(m3_ipc);
511 err_free_sram:
512 am33xx_pm_free_sram();
513 pm33xx_dev = NULL;
514 return ret;
515 }
517 static int am33xx_pm_remove(struct platform_device *pdev)
518 {
519 suspend_set_ops(NULL);
520 wkup_m3_ipc_put(m3_ipc);
521 am33xx_pm_free_sram();
522 return 0;
523 }
525 static struct platform_driver am33xx_pm_driver = {
526 .driver = {
527 .name = "pm33xx",
528 },
529 .probe = am33xx_pm_probe,
530 .remove = am33xx_pm_remove,
531 };
532 module_platform_driver(am33xx_pm_driver);
534 MODULE_ALIAS("platform:pm33xx");
535 MODULE_LICENSE("GPL v2");
536 MODULE_DESCRIPTION("am33xx power management driver");