soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling
authorDave Gerlach <d-gerlach@ti.com>
Fri, 2 Nov 2018 10:29:08 +0000 (15:59 +0530)
committerTero Kristo <t-kristo@ti.com>
Tue, 6 Nov 2018 13:25:14 +0000 (15:25 +0200)
commitbc9dcd4b1b24f950568ab4e23db8681c77f0aad1
tree76db1e5b77e740d24bf91a451676b7a53439eb14
parentdb6105b707cdb1d97d37ff6d12b36c691cf4b354
soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling

Allow loading of a binary containing i2c scaling sequences to be
provided to the wkup_m3 firmware in order to properly scale voltage
rails on the PMIC during low power modes like DeepSleep0. Proper binary
format is determined by the FW in use.

Code expects firmware to have 0x0C57 present as the first two bytes
followed by one byte defining offset to sleep sequence followed by one
byte defining offset to wake sequence and then lastly both sequences.
Each sequence is a series of I2C transfers in the form:

u8 length | u8 chip address | u8 byte0/reg address | u8 byte1 | u8 byteN
..

The length indicates the number of bytes to transfer, including the
register address. The length of each transfer is limited by the I2C
buffer size of 32 bytes.

Based on previous work by Russ Dill.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt
drivers/soc/ti/wkup_m3_ipc.c
include/linux/wkup_m3_ipc.h