| author | Murali Karicheri <m-karicheri2@ti.com> | |
| Fri, 29 May 2015 16:04:13 +0000 (12:04 -0400) | ||
| committer | Olof Johansson <olof@lixom.net> | |
| Fri, 31 Jul 2015 20:30:11 +0000 (22:30 +0200) | ||
| commit | c1bfa985ded82cacdfc6403e78f329c44e35534a | |
| tree | 87012dc0f962eab0f2d9ec36d0c5592d68d849e4 | tree | snapshot (tar.xz tar.gz zip) |
| parent | a7dae1551b55eff5308e5aa0e0149e57533ecb50 | commit | diff |
ARM: dts: keystone: fix dt bindings to use post div register for mainpll
All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
| arch/arm/boot/dts/k2e-clocks.dtsi | diff | blob | history | |
| arch/arm/boot/dts/k2hk-clocks.dtsi | diff | blob | history | |
| arch/arm/boot/dts/k2l-clocks.dtsi | diff | blob | history |