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raw | patch | inline | side by side (parent: b9a0d35)
raw | patch | inline | side by side (parent: b9a0d35)
author | Tero Kristo <t-kristo@ti.com> | |
Fri, 24 Jun 2016 08:28:09 +0000 (13:58 +0530) | ||
committer | Mark Brown <broonie@kernel.org> | |
Mon, 27 Jun 2016 16:56:43 +0000 (17:56 +0100) |
The reset value for this register seems broken on certain versions of
tps65218 chip, so make sure the dcdc3 settings is proper. Needed for
proper functionality of rtc+ddr / rtc-only modes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
tps65218 chip, so make sure the dcdc3 settings is proper. Needed for
proper functionality of rtc+ddr / rtc-only modes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/regulator/tps65218-regulator.c | patch | blob | history |
index 8eca1eb4f21979e9ca6a93a2624227d32139553d..d1e631d64a20aa34b991c817dc1bc93a6963d9e0 100644 (file)
if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1)
return -EINVAL;
- if (!tps->info[rid]->strobe)
- return -EINVAL;
+ if (!tps->info[rid]->strobe) {
+ if (rid == TPS65218_DCDC_3)
+ tps->info[rid]->strobe = 3;
+ else
+ return -EINVAL;
+ }
return tps65218_set_bits(tps, dev->desc->bypass_reg,
dev->desc->bypass_mask,