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raw | patch | inline | side by side (parent: e4be7ba)
raw | patch | inline | side by side (parent: e4be7ba)
author | Florian Fainelli <f.fainelli@gmail.com> | |
Wed, 22 Nov 2017 01:37:46 +0000 (17:37 -0800) | ||
committer | David S. Miller <davem@davemloft.net> | |
Thu, 23 Nov 2017 17:49:05 +0000 (02:49 +0900) |
The PHY on BCM7278 has an additional bit that needs to be cleared:
IDDQ_GLOBAL_PWR, without doing this, the PHY remains stuck in reset out
of suspend/resume cycles.
Fixes: 0fe9933804eb ("net: dsa: bcm_sf2: Add support for BCM7278 integrated switch")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
IDDQ_GLOBAL_PWR, without doing this, the PHY remains stuck in reset out
of suspend/resume cycles.
Fixes: 0fe9933804eb ("net: dsa: bcm_sf2: Add support for BCM7278 integrated switch")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/bcm_sf2.c | patch | blob | history |
index 93faa1fed6f266017415753fbe383227f22e4a96..ea01f24f15e77f4b9765d3bed76ce71527e39dad 100644 (file)
reg = reg_readl(priv, REG_SPHY_CNTRL);
if (enable) {
reg |= PHY_RESET;
- reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | CK25_DIS);
+ reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | IDDQ_GLOBAL_PWR | CK25_DIS);
reg_writel(priv, reg, REG_SPHY_CNTRL);
udelay(21);
reg = reg_readl(priv, REG_SPHY_CNTRL);