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raw | patch | inline | side by side (parent: 01c5d96)
raw | patch | inline | side by side (parent: 01c5d96)
author | Kishon Vijay Abraham I <kishon@ti.com> | |
Fri, 27 Apr 2018 12:09:03 +0000 (17:39 +0530) | ||
committer | Tony Lindgren <tony@atomide.com> | |
Thu, 3 May 2018 17:32:19 +0000 (10:32 -0700) |
Use sdhci-omap programming model based on the generic sdhci
library for programming the eMMC/SD/SDIO controller.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
library for programming the eMMC/SD/SDIO controller.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index 6204a266212a2516183d2d33b6898be81bd09f92..ad953113cefbda10f32bf03c6b11e0551dad8834 100644 (file)
vmmc-supply = <&vdd_3v3>;
vqmmc-supply = <&vdd_3v3>;
bus-width = <8>;
- ti,non-removable;
- cap-mmc-dual-data-rate;
+ non-removable;
+ no-1-8-v;
};
&sata {
index c76ea6579a8159091385ac0512010b9ca982922b..70a71c641066be2b9c0f01824e9a0e173ae55457 100644 (file)
pinctrl-1 = <&mmc1_pins_hs>;
vmmc-supply = <&ldo1_reg>;
+ no-1-8-v;
};
&mmc2 {
index 43a6d0590f7c6facb9fb2490ce72ba33dba871fc..ad87f1ae904db15c313678c5b59c68bb78fdb733 100644 (file)
vmmc-supply = <&v3_3d>;
vqmmc-supply = <&v3_3d>;
bus-width = <8>;
- ti,non-removable;
+ non-removable;
max-frequency = <96000000>;
+ no-1-8-v;
};
&dcan1 {
index 704947cbef48c43d893cdf832a3704a516db2efb..0894593860d6dd622b169c10c9f5a9c75354483a 100644 (file)
vmmc-supply = <&evm_1v8_sw>;
vqmmc-supply = <&evm_1v8_sw>;
bus-width = <8>;
+ non-removable;
pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
index f4ddd86f2c774a452cb4d711c434fa0f283310d6..ae2f8dd46328e8afd5499f8c05279cd540d632cf 100644 (file)
};
mmc1: mmc@4809c000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-sdhci";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
- ti,dual-volt;
- ti,needs-special-reset;
- dmas = <&sdma_xbar 61>, <&sdma_xbar 62>;
- dma-names = "tx", "rx";
status = "disabled";
pbias-supply = <&pbias_mmc_reg>;
max-frequency = <192000000>;
};
mmc2: mmc@480b4000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-sdhci";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
- ti,needs-special-reset;
- dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
- dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
+ /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
+ sdhci-caps-mask = <0x7 0x0>;
};
mmc3: mmc@480ad000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-sdhci";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
- ti,needs-special-reset;
- dmas = <&sdma_xbar 77>, <&sdma_xbar 78>;
- dma-names = "tx", "rx";
status = "disabled";
/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
max-frequency = <64000000>;
+ /* SDMA is not supported */
+ sdhci-caps-mask = <0x0 0x400000>;
};
mmc4: mmc@480d1000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-sdhci";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
- ti,needs-special-reset;
- dmas = <&sdma_xbar 57>, <&sdma_xbar 58>;
- dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
+ /* SDMA is not supported */
+ sdhci-caps-mask = <0x0 0x400000>;
};
mmu0_dsp1: mmu@40d01000 {
index b81214051a892e814017fd97bb8374a3581655bd..df174f5c15d1d4161721ef9ec06b91806f56e548 100644 (file)
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_default>;
bus-width = <8>;
- ti,non-removable;
+ non-removable;
max-frequency = <192000000>;
};
index ad154c7b063273264389418e6c269281f0651abd..c07f0051844dcace1d6093371d89c037cc4a7b6b 100644 (file)
&mmc1 {
status = "okay";
vmmc-supply = <&vio_3v3_sd>;
- vmmc_aux-supply = <&ldo4_reg>;
+ vqmmc-supply = <&ldo4_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
vmmc-supply = <&vio_1v8>;
vqmmc-supply = <&vio_1v8>;
bus-width = <8>;
+ non-removable;
pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_default>;