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raw | patch | inline | side by side (parent: dd8d7bf)
author | Suman Anna <s-anna@ti.com> | |
Fri, 29 Jun 2018 20:27:36 +0000 (15:27 -0500) | ||
committer | Suman Anna <s-anna@ti.com> | |
Tue, 11 Dec 2018 18:09:23 +0000 (12:09 -0600) |
The Main NavSS block on AM65x SoCs contains a HwSpinlock IP instance
that is similar to the IP on some OMAP SoCs. Add the DT node for this
on AM65x SoCs. The node is present within the NavSS block, and is
added as a child node under the cbass_main node.
NOTE:
The node should be moved into a navss_main interconnect node if the
local interconnect of Main NavSS is represented as a child node of
the cbass_main interconnect node in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
that is similar to the IP on some OMAP SoCs. Add the DT node for this
on AM65x SoCs. The node is present within the NavSS block, and is
added as a child node under the cbass_main node.
NOTE:
The node should be moved into a navss_main interconnect node if the
local interconnect of Main NavSS is represented as a child node of
the cbass_main interconnect node in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | patch | blob | history |
index 60096565744d24dab3e28425fd5ee11c9ea3d4b2..07fc0b1f43ba14b0b5ddd2d0c8f729f805431373 100644 (file)
clocks = <&k3_clks 58 0>;
clock-names = "gpio";
};
clocks = <&k3_clks 58 0>;
clock-names = "gpio";
};
+
+ hwspinlock: spinlock@30e00000 {
+ compatible = "ti,am654-hwspinlock";
+ reg = <0x00 0x30e00000 0x00 0x1000>;
+ #hwlock-cells = <1>;
+ };
};
};