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raw | patch | inline | side by side (parent: 03bd31a)
author | Suman Anna <s-anna@ti.com> | |
Fri, 15 May 2015 16:00:35 +0000 (11:00 -0500) | ||
committer | Suman Anna <s-anna@ti.com> | |
Sun, 3 Mar 2019 23:39:53 +0000 (17:39 -0600) |
The DSP processor subsystems in DRA7xx have two MMUs, one for the
processor port and another for an EDMA port. Both these MMUs share
a common reset line, and the reset management is done through the
pdata quirks for the MMU associated with the processor port, so the
DSP EDMA MMUs didn't need any pdata ops. The OMAP IOMMU driver now
requires the device_enable/idle platform data ops on all the IOMMU
devices to be able to enable/disable the clocks and maintain the
reference count and the omap_hwmod state machine. So, add the iommu
pdata quirks for the DSP EDMA MMUs.
Signed-off-by: Suman Anna <s-anna@ti.com>
processor port and another for an EDMA port. Both these MMUs share
a common reset line, and the reset management is done through the
pdata quirks for the MMU associated with the processor port, so the
DSP EDMA MMUs didn't need any pdata ops. The OMAP IOMMU driver now
requires the device_enable/idle platform data ops on all the IOMMU
devices to be able to enable/disable the clocks and maintain the
reference count and the omap_hwmod state machine. So, add the iommu
pdata quirks for the DSP EDMA MMUs.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm/mach-omap2/pdata-quirks.c | patch | blob | history |
index 4a5458722888f5469ea7d52d6fb1feaff6d3aa2c..7a39919a92a877c9838dacb5e27664ac431984ca 100644 (file)
.set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
};
+static struct iommu_platform_data dra7_dsp_mmu_edma_pdata = {
+ .device_enable = omap_device_enable,
+ .device_idle = omap_device_idle,
+};
+
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
&dra7_ipu1_dsp_iommu_pdata),
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
&dra7_ipu1_dsp_iommu_pdata),
+ OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d02000, "40d02000.mmu",
+ &dra7_dsp_mmu_edma_pdata),
+ OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41502000, "41502000.mmu",
+ &dra7_dsp_mmu_edma_pdata),
OF_DEV_AUXDATA("ti,dra7-iommu", 0x55082000, "55082000.mmu",
&omap4_iommu_pdata),
OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",