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raw | patch | inline | side by side (parent: 7c107af)
author | Lokesh Vutla <lokeshvutla@ti.com> | |
Fri, 23 Nov 2018 09:38:05 +0000 (15:08 +0530) | ||
committer | Tero Kristo <t-kristo@ti.com> | |
Tue, 27 Nov 2018 07:11:47 +0000 (09:11 +0200) |
Add DT nodes for the interrupt routers and aggregators in the AM65x SoC.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | patch | blob | history | |
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | patch | blob | history |
index adcd6341e40c02aabef992516a075eb2a14245a8..f5c9cde3cf99605fc38a5eff526fd036dfce468c 100644 (file)
clock-frequency = <48000000>;
current-speed = <115200>;
};
+
+ main_intr: interrupt-controller0 {
+ compatible = "ti,sci-intr";
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ #interrupt-cells = <3>;
+ ti,sci = <&dmsc>;
+ ti,sci-dst-id = <56>;
+ ti,sci-rm-range-girq = <0x1>;
+ };
+
+ main_navss_intr: interrupt-controller1 {
+ compatible = "ti,sci-intr";
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ #interrupt-cells = <3>;
+ ti,sci = <&dmsc>;
+ ti,sci-dst-id = <56>;
+ ti,sci-rm-range-girq = <0x0>,
+ <0x2>;
+ };
+
+ main_udmass_inta: interrupt-controller@33d00000 {
+ compatible = "ti,sci-inta";
+ reg = <0x0 0x33d00000 0x0 0x100000>;
+ interrupt-controller;
+ interrupt-parent = <&main_navss_intr>;
+ #interrupt-cells = <3>;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <179>;
+ ti,sci-rm-range-vint = <0x0>;
+ ti,sci-rm-range-global-event = <0x1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
index 1f591ef8bb9e0e9a95a43e1380dd21c1e6f6e217..a58b35eac0916d5f7f954b4edcb43647ea61c448 100644 (file)
clock-frequency = <48000000>;
current-speed = <115200>;
};
+
+ wkup_intr: interrupt-controller2 {
+ compatible = "ti,sci-intr";
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ #interrupt-cells = <3>;
+ ti,sci = <&dmsc>;
+ ti,sci-dst-id = <56>;
+ ti,sci-rm-range-girq = <0x4>;
+ };
};