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raw | patch | inline | side by side (parent: 84c0830)
author | Suman Anna <s-anna@ti.com> | |
Mon, 30 Sep 2019 18:36:11 +0000 (13:36 -0500) | ||
committer | Suman Anna <s-anna@ti.com> | |
Mon, 13 Jan 2020 19:30:55 +0000 (13:30 -0600) |
A 1 MB of carveout memory at 0xa2000000 is reserved currently for achieving
IPC between the two MCU R5F cores when running in split-mode. The PDK IPC
RTOS code though is currently accessing some memory beyond this 1 MB, used
to also achieve IPC with the A53 cores running RTOS (Linux uses a separate
1 MB region per core as part of the overall 16 MB region). Reserve an
additional 1 MB of memory temporarily until the RTOS code logic is fixed
up to avoid memory corruptions with the linux kernel.
Signed-off-by: Suman Anna <s-anna@ti.com>
IPC between the two MCU R5F cores when running in split-mode. The PDK IPC
RTOS code though is currently accessing some memory beyond this 1 MB, used
to also achieve IPC with the A53 cores running RTOS (Linux uses a separate
1 MB region per core as part of the overall 16 MB region). Reserve an
additional 1 MB of memory temporarily until the RTOS code logic is fixed
up to avoid memory corruptions with the linux kernel.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | patch | blob | history |
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 0300d9c0af58363485bdeee5a15c47c8928d1043..6215273cc76618a872e1a35cc9bb29734c9a3e9d 100644 (file)
};
rtos_ipc_memory_region: ipc-memories@a2000000 {
- reg = <0x00 0xa2000000 0x00 0x00100000>;
+ reg = <0x00 0xa2000000 0x00 0x00200000>;
alignment = <0x1000>;
no-map;
};