1 /*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/am4.h>
15 / {
16 compatible = "ti,am4372", "ti,am43";
17 interrupt-parent = <&wakeupgen>;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 chosen { };
22 memory@0 {
23 device_type = "memory";
24 reg = <0 0>;
25 };
27 aliases {
28 i2c0 = &i2c0;
29 i2c1 = &i2c1;
30 i2c2 = &i2c2;
31 serial0 = &uart0;
32 serial1 = &uart1;
33 serial2 = &uart2;
34 serial3 = &uart3;
35 serial4 = &uart4;
36 serial5 = &uart5;
37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
39 spi0 = &qspi;
40 };
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 cpu: cpu@0 {
46 compatible = "arm,cortex-a9";
47 enable-method = "ti,am4372";
48 device_type = "cpu";
49 reg = <0>;
51 clocks = <&dpll_mpu_ck>;
52 clock-names = "cpu";
54 operating-points-v2 = <&cpu0_opp_table>;
56 clock-latency = <300000>; /* From omap-cpufreq driver */
57 cpu-idle-states = <&mpu_gate>;
58 };
60 idle-states {
61 mpu_gate: mpu_gate {
62 compatible = "arm,idle-state";
63 entry-latency-us = <40>;
64 exit-latency-us = <100>;
65 min-residency-us = <300>;
66 local-timer-stop;
67 };
68 };
69 };
71 cpu0_opp_table: opp-table {
72 compatible = "operating-points-v2-ti-cpu";
73 syscon = <&scm_conf>;
75 opp50-300000000 {
76 opp-hz = /bits/ 64 <300000000>;
77 opp-microvolt = <950000 931000 969000>;
78 opp-supported-hw = <0xFF 0x01>;
79 opp-suspend;
80 };
82 opp100-600000000 {
83 opp-hz = /bits/ 64 <600000000>;
84 opp-microvolt = <1100000 1078000 1122000>;
85 opp-supported-hw = <0xFF 0x04>;
86 };
88 opp120-720000000 {
89 opp-hz = /bits/ 64 <720000000>;
90 opp-microvolt = <1200000 1176000 1224000>;
91 opp-supported-hw = <0xFF 0x08>;
92 };
94 oppturbo-800000000 {
95 opp-hz = /bits/ 64 <800000000>;
96 opp-microvolt = <1260000 1234800 1285200>;
97 opp-supported-hw = <0xFF 0x10>;
98 };
100 oppnitro-1000000000 {
101 opp-hz = /bits/ 64 <1000000000>;
102 opp-microvolt = <1325000 1298500 1351500>;
103 opp-supported-hw = <0xFF 0x20>;
104 };
105 };
107 soc {
108 compatible = "ti,omap-infra";
109 mpu {
110 compatible = "ti,omap4-mpu";
111 ti,hwmods = "mpu";
112 pm-sram = <&pm_sram_code
113 &pm_sram_data>;
114 };
115 };
117 gic: interrupt-controller@48241000 {
118 compatible = "arm,cortex-a9-gic";
119 interrupt-controller;
120 #interrupt-cells = <3>;
121 reg = <0x48241000 0x1000>,
122 <0x48240100 0x0100>;
123 interrupt-parent = <&gic>;
124 };
126 wakeupgen: interrupt-controller@48281000 {
127 compatible = "ti,omap4-wugen-mpu";
128 interrupt-controller;
129 #interrupt-cells = <3>;
130 reg = <0x48281000 0x1000>;
131 interrupt-parent = <&gic>;
132 };
134 scu: scu@48240000 {
135 compatible = "arm,cortex-a9-scu";
136 reg = <0x48240000 0x100>;
137 };
139 global_timer: timer@48240200 {
140 compatible = "arm,cortex-a9-global-timer";
141 reg = <0x48240200 0x100>;
142 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
143 interrupt-parent = <&gic>;
144 clocks = <&mpu_periphclk>;
145 };
147 local_timer: timer@48240600 {
148 compatible = "arm,cortex-a9-twd-timer";
149 reg = <0x48240600 0x100>;
150 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
151 interrupt-parent = <&gic>;
152 clocks = <&mpu_periphclk>;
153 };
155 l2-cache-controller@48242000 {
156 compatible = "arm,pl310-cache";
157 reg = <0x48242000 0x1000>;
158 cache-unified;
159 cache-level = <2>;
160 };
162 ocp@44000000 {
163 compatible = "ti,am4372-l3-noc", "simple-bus";
164 #address-cells = <1>;
165 #size-cells = <1>;
166 ranges;
167 ti,hwmods = "l3_main";
168 ti,no-idle;
169 reg = <0x44000000 0x400000
170 0x44800000 0x400000>;
171 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
172 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
174 l4_wkup: l4_wkup@44c00000 {
175 compatible = "ti,am4-l4-wkup", "simple-bus";
176 #address-cells = <1>;
177 #size-cells = <1>;
178 ranges = <0 0x44c00000 0x287000>;
180 wkup_m3: wkup_m3@100000 {
181 compatible = "ti,am4372-wkup-m3";
182 reg = <0x100000 0x4000>,
183 <0x180000 0x2000>;
184 reg-names = "umem", "dmem";
185 ti,hwmods = "wkup_m3";
186 ti,pm-firmware = "am335x-pm-firmware.elf";
187 };
189 prcm: prcm@1f0000 {
190 compatible = "ti,am4-prcm", "simple-bus";
191 reg = <0x1f0000 0x11000>;
192 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
193 #address-cells = <1>;
194 #size-cells = <1>;
195 ranges = <0 0x1f0000 0x11000>;
197 prcm_clocks: clocks {
198 #address-cells = <1>;
199 #size-cells = <0>;
200 };
202 prcm_clockdomains: clockdomains {
203 };
204 };
206 scm: scm@210000 {
207 compatible = "ti,am4-scm", "simple-bus";
208 reg = <0x210000 0x4000>;
209 #address-cells = <1>;
210 #size-cells = <1>;
211 ranges = <0 0x210000 0x4000>;
213 am43xx_pinmux: pinmux@800 {
214 compatible = "ti,am437-padconf",
215 "pinctrl-single";
216 reg = <0x800 0x31c>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 #pinctrl-cells = <1>;
220 #interrupt-cells = <1>;
221 interrupt-controller;
222 pinctrl-single,register-width = <32>;
223 pinctrl-single,function-mask = <0xffffffff>;
224 };
226 scm_conf: scm_conf@0 {
227 compatible = "syscon";
228 reg = <0x0 0x800>;
229 #address-cells = <1>;
230 #size-cells = <1>;
232 scm_clocks: clocks {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 };
236 };
238 wkup_m3_ipc: wkup_m3_ipc@1324 {
239 compatible = "ti,am4372-wkup-m3-ipc";
240 reg = <0x1324 0x44>;
241 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
242 ti,rproc = <&wkup_m3>;
243 mboxes = <&mailbox &mbox_wkupm3>;
244 };
246 edma_xbar: dma-router@f90 {
247 compatible = "ti,am335x-edma-crossbar";
248 reg = <0xf90 0x40>;
249 #dma-cells = <3>;
250 dma-requests = <64>;
251 dma-masters = <&edma>;
252 };
254 scm_clockdomains: clockdomains {
255 };
256 };
257 };
259 emif: emif@4c000000 {
260 compatible = "ti,emif-am4372";
261 reg = <0x4c000000 0x1000000>;
262 ti,hwmods = "emif";
263 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
264 ti,no-idle;
265 sram = <&pm_sram_code
266 &pm_sram_data>;
267 };
269 edma: edma@49000000 {
270 compatible = "ti,edma3-tpcc";
271 ti,hwmods = "tpcc";
272 reg = <0x49000000 0x10000>;
273 reg-names = "edma3_cc";
274 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
275 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
277 interrupt-names = "edma3_ccint", "edma3_mperr",
278 "edma3_ccerrint";
279 dma-requests = <64>;
280 #dma-cells = <2>;
282 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
283 <&edma_tptc2 0>;
285 ti,edma-memcpy-channels = <58 59>;
286 };
288 edma_tptc0: tptc@49800000 {
289 compatible = "ti,edma3-tptc";
290 ti,hwmods = "tptc0";
291 reg = <0x49800000 0x100000>;
292 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
293 interrupt-names = "edma3_tcerrint";
294 };
296 edma_tptc1: tptc@49900000 {
297 compatible = "ti,edma3-tptc";
298 ti,hwmods = "tptc1";
299 reg = <0x49900000 0x100000>;
300 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
301 interrupt-names = "edma3_tcerrint";
302 };
304 edma_tptc2: tptc@49a00000 {
305 compatible = "ti,edma3-tptc";
306 ti,hwmods = "tptc2";
307 reg = <0x49a00000 0x100000>;
308 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
309 interrupt-names = "edma3_tcerrint";
310 };
312 uart0: serial@44e09000 {
313 compatible = "ti,am4372-uart","ti,omap2-uart";
314 reg = <0x44e09000 0x2000>;
315 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
316 ti,hwmods = "uart1";
317 };
319 uart1: serial@48022000 {
320 compatible = "ti,am4372-uart","ti,omap2-uart";
321 reg = <0x48022000 0x2000>;
322 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
323 ti,hwmods = "uart2";
324 status = "disabled";
325 };
327 uart2: serial@48024000 {
328 compatible = "ti,am4372-uart","ti,omap2-uart";
329 reg = <0x48024000 0x2000>;
330 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
331 ti,hwmods = "uart3";
332 status = "disabled";
333 };
335 uart3: serial@481a6000 {
336 compatible = "ti,am4372-uart","ti,omap2-uart";
337 reg = <0x481a6000 0x2000>;
338 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
339 ti,hwmods = "uart4";
340 status = "disabled";
341 };
343 uart4: serial@481a8000 {
344 compatible = "ti,am4372-uart","ti,omap2-uart";
345 reg = <0x481a8000 0x2000>;
346 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
347 ti,hwmods = "uart5";
348 status = "disabled";
349 };
351 uart5: serial@481aa000 {
352 compatible = "ti,am4372-uart","ti,omap2-uart";
353 reg = <0x481aa000 0x2000>;
354 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
355 ti,hwmods = "uart6";
356 status = "disabled";
357 };
359 mailbox: mailbox@480c8000 {
360 compatible = "ti,omap4-mailbox";
361 reg = <0x480C8000 0x200>;
362 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
363 ti,hwmods = "mailbox";
364 #mbox-cells = <1>;
365 ti,mbox-num-users = <4>;
366 ti,mbox-num-fifos = <8>;
367 mbox_wkupm3: wkup_m3 {
368 ti,mbox-send-noirq;
369 ti,mbox-tx = <0 0 0>;
370 ti,mbox-rx = <0 0 3>;
371 };
372 };
374 timer1: timer@44e31000 {
375 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
376 reg = <0x44e31000 0x400>;
377 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
378 ti,timer-alwon;
379 ti,hwmods = "timer1";
380 clocks = <&timer1_fck>;
381 clock-names = "fck";
382 };
384 timer2: timer@48040000 {
385 compatible = "ti,am4372-timer","ti,am335x-timer";
386 reg = <0x48040000 0x400>;
387 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
388 ti,hwmods = "timer2";
389 clocks = <&timer2_fck>;
390 clock-names = "fck";
391 };
393 timer3: timer@48042000 {
394 compatible = "ti,am4372-timer","ti,am335x-timer";
395 reg = <0x48042000 0x400>;
396 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
397 ti,hwmods = "timer3";
398 status = "disabled";
399 };
401 timer4: timer@48044000 {
402 compatible = "ti,am4372-timer","ti,am335x-timer";
403 reg = <0x48044000 0x400>;
404 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
405 ti,timer-pwm;
406 ti,hwmods = "timer4";
407 status = "disabled";
408 };
410 timer5: timer@48046000 {
411 compatible = "ti,am4372-timer","ti,am335x-timer";
412 reg = <0x48046000 0x400>;
413 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
414 ti,timer-pwm;
415 ti,hwmods = "timer5";
416 status = "disabled";
417 };
419 timer6: timer@48048000 {
420 compatible = "ti,am4372-timer","ti,am335x-timer";
421 reg = <0x48048000 0x400>;
422 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
423 ti,timer-pwm;
424 ti,hwmods = "timer6";
425 status = "disabled";
426 };
428 timer7: timer@4804a000 {
429 compatible = "ti,am4372-timer","ti,am335x-timer";
430 reg = <0x4804a000 0x400>;
431 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
432 ti,timer-pwm;
433 ti,hwmods = "timer7";
434 status = "disabled";
435 };
437 timer8: timer@481c1000 {
438 compatible = "ti,am4372-timer","ti,am335x-timer";
439 reg = <0x481c1000 0x400>;
440 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
441 ti,hwmods = "timer8";
442 status = "disabled";
443 };
445 timer9: timer@4833d000 {
446 compatible = "ti,am4372-timer","ti,am335x-timer";
447 reg = <0x4833d000 0x400>;
448 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
449 ti,hwmods = "timer9";
450 status = "disabled";
451 };
453 timer10: timer@4833f000 {
454 compatible = "ti,am4372-timer","ti,am335x-timer";
455 reg = <0x4833f000 0x400>;
456 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
457 ti,hwmods = "timer10";
458 status = "disabled";
459 };
461 timer11: timer@48341000 {
462 compatible = "ti,am4372-timer","ti,am335x-timer";
463 reg = <0x48341000 0x400>;
464 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
465 ti,hwmods = "timer11";
466 status = "disabled";
467 };
469 counter32k: counter@44e86000 {
470 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
471 reg = <0x44e86000 0x40>;
472 ti,hwmods = "counter_32k";
473 };
475 rtc: rtc@44e3e000 {
476 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
477 "ti,da830-rtc";
478 reg = <0x44e3e000 0x1000>;
479 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
480 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
481 ti,hwmods = "rtc";
482 clocks = <&clk_32768_ck>;
483 clock-names = "int-clk";
484 system-power-controller;
485 status = "disabled";
486 };
488 wdt: wdt@44e35000 {
489 compatible = "ti,am4372-wdt","ti,omap3-wdt";
490 reg = <0x44e35000 0x1000>;
491 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
492 ti,hwmods = "wd_timer2";
493 };
495 gpio0: gpio@44e07000 {
496 compatible = "ti,am4372-gpio","ti,omap4-gpio";
497 reg = <0x44e07000 0x1000>;
498 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
499 gpio-controller;
500 #gpio-cells = <2>;
501 interrupt-controller;
502 #interrupt-cells = <2>;
503 ti,hwmods = "gpio1";
504 status = "disabled";
505 };
507 gpio1: gpio@4804c000 {
508 compatible = "ti,am4372-gpio","ti,omap4-gpio";
509 reg = <0x4804c000 0x1000>;
510 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
511 gpio-controller;
512 #gpio-cells = <2>;
513 interrupt-controller;
514 #interrupt-cells = <2>;
515 ti,hwmods = "gpio2";
516 status = "disabled";
517 };
519 gpio2: gpio@481ac000 {
520 compatible = "ti,am4372-gpio","ti,omap4-gpio";
521 reg = <0x481ac000 0x1000>;
522 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
523 gpio-controller;
524 #gpio-cells = <2>;
525 interrupt-controller;
526 #interrupt-cells = <2>;
527 ti,hwmods = "gpio3";
528 status = "disabled";
529 };
531 gpio3: gpio@481ae000 {
532 compatible = "ti,am4372-gpio","ti,omap4-gpio";
533 reg = <0x481ae000 0x1000>;
534 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
535 gpio-controller;
536 #gpio-cells = <2>;
537 interrupt-controller;
538 #interrupt-cells = <2>;
539 ti,hwmods = "gpio4";
540 status = "disabled";
541 };
543 gpio4: gpio@48320000 {
544 compatible = "ti,am4372-gpio","ti,omap4-gpio";
545 reg = <0x48320000 0x1000>;
546 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
547 gpio-controller;
548 #gpio-cells = <2>;
549 interrupt-controller;
550 #interrupt-cells = <2>;
551 ti,hwmods = "gpio5";
552 status = "disabled";
553 };
555 gpio5: gpio@48322000 {
556 compatible = "ti,am4372-gpio","ti,omap4-gpio";
557 reg = <0x48322000 0x1000>;
558 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
559 gpio-controller;
560 #gpio-cells = <2>;
561 interrupt-controller;
562 #interrupt-cells = <2>;
563 ti,hwmods = "gpio6";
564 status = "disabled";
565 };
567 hwspinlock: spinlock@480ca000 {
568 compatible = "ti,omap4-hwspinlock";
569 reg = <0x480ca000 0x1000>;
570 ti,hwmods = "spinlock";
571 #hwlock-cells = <1>;
572 };
574 i2c0: i2c@44e0b000 {
575 compatible = "ti,am4372-i2c","ti,omap4-i2c";
576 reg = <0x44e0b000 0x1000>;
577 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
578 ti,hwmods = "i2c1";
579 #address-cells = <1>;
580 #size-cells = <0>;
581 status = "disabled";
582 };
584 i2c1: i2c@4802a000 {
585 compatible = "ti,am4372-i2c","ti,omap4-i2c";
586 reg = <0x4802a000 0x1000>;
587 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
588 ti,hwmods = "i2c2";
589 #address-cells = <1>;
590 #size-cells = <0>;
591 status = "disabled";
592 };
594 i2c2: i2c@4819c000 {
595 compatible = "ti,am4372-i2c","ti,omap4-i2c";
596 reg = <0x4819c000 0x1000>;
597 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
598 ti,hwmods = "i2c3";
599 #address-cells = <1>;
600 #size-cells = <0>;
601 status = "disabled";
602 };
604 spi0: spi@48030000 {
605 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
606 reg = <0x48030000 0x400>;
607 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
608 ti,hwmods = "spi0";
609 #address-cells = <1>;
610 #size-cells = <0>;
611 status = "disabled";
612 };
614 mmc1: mmc@48060000 {
615 compatible = "ti,omap4-hsmmc";
616 reg = <0x48060000 0x1000>;
617 ti,hwmods = "mmc1";
618 ti,dual-volt;
619 ti,needs-special-reset;
620 dmas = <&edma 24 0>,
621 <&edma 25 0>;
622 dma-names = "tx", "rx";
623 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
624 status = "disabled";
625 };
627 mmc2: mmc@481d8000 {
628 compatible = "ti,omap4-hsmmc";
629 reg = <0x481d8000 0x1000>;
630 ti,hwmods = "mmc2";
631 ti,needs-special-reset;
632 dmas = <&edma 2 0>,
633 <&edma 3 0>;
634 dma-names = "tx", "rx";
635 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
636 status = "disabled";
637 };
639 mmc3: mmc@47810000 {
640 compatible = "ti,omap4-hsmmc";
641 reg = <0x47810000 0x1000>;
642 ti,hwmods = "mmc3";
643 ti,needs-special-reset;
644 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
645 status = "disabled";
646 };
648 spi1: spi@481a0000 {
649 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
650 reg = <0x481a0000 0x400>;
651 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
652 ti,hwmods = "spi1";
653 #address-cells = <1>;
654 #size-cells = <0>;
655 status = "disabled";
656 };
658 spi2: spi@481a2000 {
659 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
660 reg = <0x481a2000 0x400>;
661 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
662 ti,hwmods = "spi2";
663 #address-cells = <1>;
664 #size-cells = <0>;
665 status = "disabled";
666 };
668 spi3: spi@481a4000 {
669 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
670 reg = <0x481a4000 0x400>;
671 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
672 ti,hwmods = "spi3";
673 #address-cells = <1>;
674 #size-cells = <0>;
675 status = "disabled";
676 };
678 spi4: spi@48345000 {
679 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
680 reg = <0x48345000 0x400>;
681 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
682 ti,hwmods = "spi4";
683 #address-cells = <1>;
684 #size-cells = <0>;
685 status = "disabled";
686 };
688 mac: ethernet@4a100000 {
689 compatible = "ti,am4372-cpsw","ti,cpsw";
690 reg = <0x4a100000 0x800
691 0x4a101200 0x100>;
692 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
696 #address-cells = <1>;
697 #size-cells = <1>;
698 ti,hwmods = "cpgmac0";
699 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
700 <&dpll_clksel_mac_clk>;
701 clock-names = "fck", "cpts", "50mclk";
702 assigned-clocks = <&dpll_clksel_mac_clk>;
703 assigned-clock-rates = <50000000>;
704 status = "disabled";
705 cpdma_channels = <8>;
706 ale_entries = <1024>;
707 bd_ram_size = <0x2000>;
708 mac_control = <0x20>;
709 slaves = <2>;
710 active_slave = <0>;
711 cpts_clock_mult = <0x80000000>;
712 cpts_clock_shift = <29>;
713 ranges;
714 syscon = <&scm_conf>;
716 davinci_mdio: mdio@4a101000 {
717 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
718 reg = <0x4a101000 0x100>;
719 #address-cells = <1>;
720 #size-cells = <0>;
721 ti,hwmods = "davinci_mdio";
722 bus_freq = <1000000>;
723 status = "disabled";
724 };
726 cpsw_emac0: slave@4a100200 {
727 /* Filled in by U-Boot */
728 mac-address = [ 00 00 00 00 00 00 ];
729 };
731 cpsw_emac1: slave@4a100300 {
732 /* Filled in by U-Boot */
733 mac-address = [ 00 00 00 00 00 00 ];
734 };
736 phy_sel: cpsw-phy-sel@44e10650 {
737 compatible = "ti,am43xx-cpsw-phy-sel";
738 reg= <0x44e10650 0x4>;
739 reg-names = "gmii-sel";
740 };
741 };
743 epwmss0: epwmss@48300000 {
744 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
745 reg = <0x48300000 0x10>;
746 #address-cells = <1>;
747 #size-cells = <1>;
748 ranges;
749 ti,hwmods = "epwmss0";
750 status = "disabled";
752 ecap0: ecap@48300100 {
753 compatible = "ti,am4372-ecap",
754 "ti,am3352-ecap",
755 "ti,am33xx-ecap";
756 #pwm-cells = <3>;
757 reg = <0x48300100 0x80>;
758 clocks = <&l4ls_gclk>;
759 clock-names = "fck";
760 status = "disabled";
761 };
763 ehrpwm0: pwm@48300200 {
764 compatible = "ti,am4372-ehrpwm",
765 "ti,am3352-ehrpwm",
766 "ti,am33xx-ehrpwm";
767 #pwm-cells = <3>;
768 reg = <0x48300200 0x80>;
769 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
770 clock-names = "tbclk", "fck";
771 status = "disabled";
772 };
773 };
775 epwmss1: epwmss@48302000 {
776 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
777 reg = <0x48302000 0x10>;
778 #address-cells = <1>;
779 #size-cells = <1>;
780 ranges;
781 ti,hwmods = "epwmss1";
782 status = "disabled";
784 ecap1: ecap@48302100 {
785 compatible = "ti,am4372-ecap",
786 "ti,am3352-ecap",
787 "ti,am33xx-ecap";
788 #pwm-cells = <3>;
789 reg = <0x48302100 0x80>;
790 clocks = <&l4ls_gclk>;
791 clock-names = "fck";
792 status = "disabled";
793 };
795 ehrpwm1: pwm@48302200 {
796 compatible = "ti,am4372-ehrpwm",
797 "ti,am3352-ehrpwm",
798 "ti,am33xx-ehrpwm";
799 #pwm-cells = <3>;
800 reg = <0x48302200 0x80>;
801 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
802 clock-names = "tbclk", "fck";
803 status = "disabled";
804 };
805 };
807 epwmss2: epwmss@48304000 {
808 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
809 reg = <0x48304000 0x10>;
810 #address-cells = <1>;
811 #size-cells = <1>;
812 ranges;
813 ti,hwmods = "epwmss2";
814 status = "disabled";
816 ecap2: ecap@48304100 {
817 compatible = "ti,am4372-ecap",
818 "ti,am3352-ecap",
819 "ti,am33xx-ecap";
820 #pwm-cells = <3>;
821 reg = <0x48304100 0x80>;
822 clocks = <&l4ls_gclk>;
823 clock-names = "fck";
824 status = "disabled";
825 };
827 ehrpwm2: pwm@48304200 {
828 compatible = "ti,am4372-ehrpwm",
829 "ti,am3352-ehrpwm",
830 "ti,am33xx-ehrpwm";
831 #pwm-cells = <3>;
832 reg = <0x48304200 0x80>;
833 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
834 clock-names = "tbclk", "fck";
835 status = "disabled";
836 };
837 };
839 epwmss3: epwmss@48306000 {
840 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
841 reg = <0x48306000 0x10>;
842 #address-cells = <1>;
843 #size-cells = <1>;
844 ranges;
845 ti,hwmods = "epwmss3";
846 status = "disabled";
848 ehrpwm3: pwm@48306200 {
849 compatible = "ti,am4372-ehrpwm",
850 "ti,am3352-ehrpwm",
851 "ti,am33xx-ehrpwm";
852 #pwm-cells = <3>;
853 reg = <0x48306200 0x80>;
854 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
855 clock-names = "tbclk", "fck";
856 status = "disabled";
857 };
858 };
860 epwmss4: epwmss@48308000 {
861 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
862 reg = <0x48308000 0x10>;
863 #address-cells = <1>;
864 #size-cells = <1>;
865 ranges;
866 ti,hwmods = "epwmss4";
867 status = "disabled";
869 ehrpwm4: pwm@48308200 {
870 compatible = "ti,am4372-ehrpwm",
871 "ti,am3352-ehrpwm",
872 "ti,am33xx-ehrpwm";
873 #pwm-cells = <3>;
874 reg = <0x48308200 0x80>;
875 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
876 clock-names = "tbclk", "fck";
877 status = "disabled";
878 };
879 };
881 epwmss5: epwmss@4830a000 {
882 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
883 reg = <0x4830a000 0x10>;
884 #address-cells = <1>;
885 #size-cells = <1>;
886 ranges;
887 ti,hwmods = "epwmss5";
888 status = "disabled";
890 ehrpwm5: pwm@4830a200 {
891 compatible = "ti,am4372-ehrpwm",
892 "ti,am3352-ehrpwm",
893 "ti,am33xx-ehrpwm";
894 #pwm-cells = <3>;
895 reg = <0x4830a200 0x80>;
896 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
897 clock-names = "tbclk", "fck";
898 status = "disabled";
899 };
900 };
902 tscadc: tscadc@44e0d000 {
903 compatible = "ti,am3359-tscadc";
904 reg = <0x44e0d000 0x1000>;
905 ti,hwmods = "adc_tsc";
906 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&adc_tsc_fck>;
908 clock-names = "fck";
909 status = "disabled";
910 dmas = <&edma 53 0>, <&edma 57 0>;
911 dma-names = "fifo0", "fifo1";
913 tsc {
914 compatible = "ti,am3359-tsc";
915 };
917 adc {
918 #io-channel-cells = <1>;
919 compatible = "ti,am3359-adc";
920 };
922 };
924 sham: sham@53100000 {
925 compatible = "ti,omap5-sham";
926 ti,hwmods = "sham";
927 reg = <0x53100000 0x300>;
928 dmas = <&edma 36 0>;
929 dma-names = "rx";
930 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
931 };
933 aes: aes@53501000 {
934 compatible = "ti,omap4-aes";
935 ti,hwmods = "aes";
936 reg = <0x53501000 0xa0>;
937 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
938 dmas = <&edma 6 0>,
939 <&edma 5 0>;
940 dma-names = "tx", "rx";
941 };
943 des: des@53701000 {
944 compatible = "ti,omap4-des";
945 ti,hwmods = "des";
946 reg = <0x53701000 0xa0>;
947 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
948 dmas = <&edma 34 0>,
949 <&edma 33 0>;
950 dma-names = "tx", "rx";
951 };
953 rng: rng@48310000 {
954 compatible = "ti,omap4-rng";
955 ti,hwmods = "rng";
956 reg = <0x48310000 0x2000>;
957 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
958 };
960 pruss_soc_bus: pruss-soc-bus@54426004 {
961 compatible = "ti,am4376-pruss-soc-bus";
962 reg = <0x54426004 0x4>;
963 ti,hwmods = "pruss";
964 #address-cells = <1>;
965 #size-cells = <1>;
966 ranges;
967 status = "disabled";
969 pruss1: pruss@54400000 {
970 compatible = "ti,am4376-pruss";
971 reg = <0x54400000 0x40000>;
972 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH
973 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH
974 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH
975 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH
976 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH
977 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH
978 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
979 interrupt-names = "host2", "host3", "host4",
980 "host5", "host6", "host8",
981 "host9";
982 #address-cells = <1>;
983 #size-cells = <1>;
984 ranges;
985 status = "disabled";
987 pruss1_mem: memories@54400000 {
988 reg = <0x54400000 0x2000>,
989 <0x54402000 0x2000>,
990 <0x54410000 0x8000>;
991 reg-names = "dram0", "dram1",
992 "shrdram2";
993 };
995 pruss1_cfg: cfg@54426000 {
996 compatible = "syscon";
997 reg = <0x54426000 0x2000>;
998 };
1000 pruss1_iep: iep@5442e000 {
1001 compatible = "syscon";
1002 reg = <0x5442e000 0x31c>;
1003 };
1005 pruss1_mii_rt: mii-rt@54432000 {
1006 compatible = "syscon";
1007 reg = <0x54432000 0x58>;
1008 };
1010 pruss1_intc: interrupt-controller@54420000 {
1011 compatible = "ti,am4376-pruss-intc";
1012 reg = <0x54420000 0x2000>;
1013 interrupt-controller;
1014 #interrupt-cells = <1>;
1015 };
1017 pru1_0: pru@54434000 {
1018 compatible = "ti,am4376-pru";
1019 reg = <0x54434000 0x3000>,
1020 <0x54422000 0x400>,
1021 <0x54422400 0x100>;
1022 reg-names = "iram", "control", "debug";
1023 firmware-name = "am437x-pru1_0-fw";
1024 interrupt-parent = <&pruss1_intc>;
1025 interrupts = <16>, <17>;
1026 interrupt-names = "vring", "kick";
1027 };
1029 pru1_1: pru@54438000 {
1030 compatible = "ti,am4376-pru";
1031 reg = <0x54438000 0x3000>,
1032 <0x54424000 0x400>,
1033 <0x54424400 0x100>;
1034 reg-names = "iram", "control", "debug";
1035 firmware-name = "am437x-pru1_1-fw";
1036 interrupt-parent = <&pruss1_intc>;
1037 interrupts = <18>, <19>;
1038 interrupt-names = "vring", "kick";
1039 };
1041 pruss1_mdio: mdio@54432400 {
1042 compatible = "ti,davinci_mdio";
1043 reg = <0x54432400 0x90>;
1044 clocks = <&dpll_core_m4_ck>;
1045 clock-names = "fck";
1046 bus_freq = <1000000>;
1047 #address-cells = <1>;
1048 #size-cells = <0>;
1049 status = "disabled";
1050 };
1051 };
1053 pruss0: pruss@54440000 {
1054 compatible = "ti,am4376-pruss";
1055 reg = <0x54440000 0x40000>;
1056 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH
1057 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH
1058 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH
1059 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH
1060 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH
1061 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH
1062 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1063 interrupt-names = "host2", "host3", "host4",
1064 "host5", "host6", "host8",
1065 "host9";
1066 #address-cells = <1>;
1067 #size-cells = <1>;
1068 ranges;
1069 status = "disabled";
1071 pruss0_mem: memories@54440000 {
1072 reg = <0x54440000 0x1000>,
1073 <0x54442000 0x1000>;
1074 reg-names = "dram0", "dram1";
1075 };
1077 pruss0_cfg: cfg@54466000 {
1078 compatible = "syscon";
1079 reg = <0x54466000 0x2000>;
1080 };
1082 pruss0_iep: iep@5446e000 {
1083 compatible = "syscon";
1084 reg = <0x6e000 0x31c>;
1085 };
1087 pruss0_mii_rt: mii-rt@54472000 {
1088 compatible = "syscon";
1089 reg = <0x54472000 0x58>;
1090 };
1092 pruss0_intc: interrupt-controller@54460000 {
1093 compatible = "ti,am4376-pruss-intc";
1094 reg = <0x54460000 0x2000>;
1095 interrupt-controller;
1096 #interrupt-cells = <1>;
1097 };
1099 pru0_0: pru@54474000 {
1100 compatible = "ti,am4376-pru";
1101 reg = <0x54474000 0x1000>,
1102 <0x54462000 0x400>,
1103 <0x54462400 0x100>;
1104 reg-names = "iram", "control", "debug";
1105 firmware-name = "am437x-pru0_0-fw";
1106 interrupt-parent = <&pruss0_intc>;
1107 interrupts = <16>, <17>;
1108 interrupt-names = "vring", "kick";
1109 };
1111 pru0_1: pru@54478000 {
1112 compatible = "ti,am4376-pru";
1113 reg = <0x54478000 0x1000>,
1114 <0x54464000 0x400>,
1115 <0x54464400 0x100>;
1116 reg-names = "iram", "control", "debug";
1117 firmware-name = "am437x-pru0_1-fw";
1118 interrupt-parent = <&pruss0_intc>;
1119 interrupts = <18>, <19>;
1120 interrupt-names = "vring", "kick";
1121 };
1122 };
1123 };
1125 mcasp0: mcasp@48038000 {
1126 compatible = "ti,am33xx-mcasp-audio";
1127 ti,hwmods = "mcasp0";
1128 reg = <0x48038000 0x2000>,
1129 <0x46000000 0x400000>;
1130 reg-names = "mpu", "dat";
1131 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
1132 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
1133 interrupt-names = "tx", "rx";
1134 status = "disabled";
1135 dmas = <&edma 8 2>,
1136 <&edma 9 2>;
1137 dma-names = "tx", "rx";
1138 };
1140 mcasp1: mcasp@4803c000 {
1141 compatible = "ti,am33xx-mcasp-audio";
1142 ti,hwmods = "mcasp1";
1143 reg = <0x4803C000 0x2000>,
1144 <0x46400000 0x400000>;
1145 reg-names = "mpu", "dat";
1146 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1147 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1148 interrupt-names = "tx", "rx";
1149 status = "disabled";
1150 dmas = <&edma 10 2>,
1151 <&edma 11 2>;
1152 dma-names = "tx", "rx";
1153 };
1155 elm: elm@48080000 {
1156 compatible = "ti,am3352-elm";
1157 reg = <0x48080000 0x2000>;
1158 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1159 ti,hwmods = "elm";
1160 clocks = <&l4ls_gclk>;
1161 clock-names = "fck";
1162 status = "disabled";
1163 };
1165 gpmc: gpmc@50000000 {
1166 compatible = "ti,am3352-gpmc";
1167 ti,hwmods = "gpmc";
1168 dmas = <&edma 52 0>;
1169 dma-names = "rxtx";
1170 clocks = <&l3s_gclk>;
1171 clock-names = "fck";
1172 reg = <0x50000000 0x2000>;
1173 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
1174 gpmc,num-cs = <7>;
1175 gpmc,num-waitpins = <2>;
1176 #address-cells = <2>;
1177 #size-cells = <1>;
1178 interrupt-controller;
1179 #interrupt-cells = <2>;
1180 gpio-controller;
1181 #gpio-cells = <2>;
1182 status = "disabled";
1183 };
1185 ocp2scp0: ocp2scp@483a8000 {
1186 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
1187 #address-cells = <1>;
1188 #size-cells = <1>;
1189 ranges;
1190 ti,hwmods = "ocp2scp0";
1192 usb2_phy1: phy@483a8000 {
1193 compatible = "ti,am437x-usb2";
1194 reg = <0x483a8000 0x8000>;
1195 syscon-phy-power = <&scm_conf 0x620>;
1196 clocks = <&usb_phy0_always_on_clk32k>,
1197 <&l4_per_clkctrl AM4_USB_OTG_SS0_CLKCTRL 8>;
1198 clock-names = "wkupclk", "refclk";
1199 #phy-cells = <0>;
1200 status = "disabled";
1201 };
1202 };
1204 ocp2scp1: ocp2scp@483e8000 {
1205 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
1206 #address-cells = <1>;
1207 #size-cells = <1>;
1208 ranges;
1209 ti,hwmods = "ocp2scp1";
1211 usb2_phy2: phy@483e8000 {
1212 compatible = "ti,am437x-usb2";
1213 reg = <0x483e8000 0x8000>;
1214 syscon-phy-power = <&scm_conf 0x628>;
1215 clocks = <&usb_phy1_always_on_clk32k>,
1216 <&l4_per_clkctrl AM4_USB_OTG_SS1_CLKCTRL 8>;
1217 clock-names = "wkupclk", "refclk";
1218 #phy-cells = <0>;
1219 status = "disabled";
1220 };
1221 };
1223 dwc3_1: omap_dwc3@48380000 {
1224 compatible = "ti,am437x-dwc3";
1225 ti,hwmods = "usb_otg_ss0";
1226 reg = <0x48380000 0x10000>;
1227 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1228 #address-cells = <1>;
1229 #size-cells = <1>;
1230 utmi-mode = <1>;
1231 ranges;
1233 usb1: usb@48390000 {
1234 compatible = "synopsys,dwc3";
1235 reg = <0x48390000 0x10000>;
1236 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1237 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1238 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1239 interrupt-names = "peripheral",
1240 "host",
1241 "otg";
1242 phys = <&usb2_phy1>;
1243 phy-names = "usb2-phy";
1244 maximum-speed = "high-speed";
1245 dr_mode = "otg";
1246 status = "disabled";
1247 snps,dis_u3_susphy_quirk;
1248 snps,dis_u2_susphy_quirk;
1249 };
1250 };
1252 dwc3_2: omap_dwc3@483c0000 {
1253 compatible = "ti,am437x-dwc3";
1254 ti,hwmods = "usb_otg_ss1";
1255 reg = <0x483c0000 0x10000>;
1256 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1257 #address-cells = <1>;
1258 #size-cells = <1>;
1259 utmi-mode = <1>;
1260 ranges;
1262 usb2: usb@483d0000 {
1263 compatible = "synopsys,dwc3";
1264 reg = <0x483d0000 0x10000>;
1265 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1266 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1267 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1268 interrupt-names = "peripheral",
1269 "host",
1270 "otg";
1271 phys = <&usb2_phy2>;
1272 phy-names = "usb2-phy";
1273 maximum-speed = "high-speed";
1274 dr_mode = "otg";
1275 status = "disabled";
1276 snps,dis_u3_susphy_quirk;
1277 snps,dis_u2_susphy_quirk;
1278 };
1279 };
1281 qspi: qspi@47900000 {
1282 compatible = "ti,am4372-qspi";
1283 reg = <0x47900000 0x100>,
1284 <0x30000000 0x4000000>;
1285 reg-names = "qspi_base", "qspi_mmap";
1286 #address-cells = <1>;
1287 #size-cells = <0>;
1288 ti,hwmods = "qspi";
1289 interrupts = <0 138 0x4>;
1290 num-cs = <4>;
1291 status = "disabled";
1292 };
1294 hdq: hdq@48347000 {
1295 compatible = "ti,am4372-hdq";
1296 reg = <0x48347000 0x1000>;
1297 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1298 clocks = <&func_12m_clk>;
1299 clock-names = "fck";
1300 ti,hwmods = "hdq1w";
1301 status = "disabled";
1302 };
1304 dss: dss@4832a000 {
1305 compatible = "ti,omap3-dss";
1306 reg = <0x4832a000 0x200>;
1307 status = "disabled";
1308 ti,hwmods = "dss_core";
1309 clocks = <&disp_clk>;
1310 clock-names = "fck";
1311 #address-cells = <1>;
1312 #size-cells = <1>;
1313 ranges;
1315 dispc: dispc@4832a400 {
1316 compatible = "ti,omap3-dispc";
1317 reg = <0x4832a400 0x400>;
1318 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1319 ti,hwmods = "dss_dispc";
1320 clocks = <&disp_clk>;
1321 clock-names = "fck";
1322 };
1324 rfbi: rfbi@4832a800 {
1325 compatible = "ti,omap3-rfbi";
1326 reg = <0x4832a800 0x100>;
1327 ti,hwmods = "dss_rfbi";
1328 clocks = <&disp_clk>;
1329 clock-names = "fck";
1330 status = "disabled";
1331 };
1332 };
1334 ocmcram: ocmcram@40300000 {
1335 compatible = "mmio-sram";
1336 reg = <0x40300000 0x40000>; /* 256k */
1337 ranges = <0x0 0x40300000 0x40000>;
1338 #address-cells = <1>;
1339 #size-cells = <1>;
1341 pm_sram_code: pm-sram-code@0 {
1342 compatible = "ti,sram";
1343 reg = <0x0 0x1000>;
1344 protect-exec;
1345 };
1347 pm_sram_data: pm-sram-data@1000 {
1348 compatible = "ti,sram";
1349 reg = <0x1000 0x1000>;
1350 pool;
1351 };
1352 };
1354 dcan0: can@481cc000 {
1355 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1356 ti,hwmods = "d_can0";
1357 clocks = <&dcan0_fck>;
1358 clock-names = "fck";
1359 reg = <0x481cc000 0x2000>;
1360 syscon-raminit = <&scm_conf 0x644 0>;
1361 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1362 status = "disabled";
1363 };
1365 dcan1: can@481d0000 {
1366 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1367 ti,hwmods = "d_can1";
1368 clocks = <&dcan1_fck>;
1369 clock-names = "fck";
1370 reg = <0x481d0000 0x2000>;
1371 syscon-raminit = <&scm_conf 0x644 1>;
1372 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1373 status = "disabled";
1374 };
1376 vpfe0: vpfe@48326000 {
1377 compatible = "ti,am437x-vpfe";
1378 reg = <0x48326000 0x2000>;
1379 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1380 ti,hwmods = "vpfe0";
1381 status = "disabled";
1382 };
1384 vpfe1: vpfe@48328000 {
1385 compatible = "ti,am437x-vpfe";
1386 reg = <0x48328000 0x2000>;
1387 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1388 ti,hwmods = "vpfe1";
1389 status = "disabled";
1390 };
1391 };
1392 };
1394 #include "am43xx-clocks.dtsi"