1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Keystone 2 Edison EVM device tree
4 *
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
6 */
7 /dts-v1/;
9 #include "keystone.dtsi"
10 #include "keystone-k2e.dtsi"
12 / {
13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
14 model = "Texas Instruments Keystone 2 Edison EVM";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
19 ranges;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
24 reusable;
25 status = "okay";
26 };
28 dsp_common_mpm_memory: dsp-common-mpm-memory@820000000 {
29 compatible = "ti,keystone-dsp-mem-pool";
30 reg = <0x00000008 0x20000000 0x00000000 0x10000000>;
31 no-map;
32 status = "okay";
33 };
34 };
35 };
37 &soc0 {
39 clocks {
40 refclksys: refclksys {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <100000000>;
44 clock-output-names = "refclk-sys";
45 };
47 refclkpass: refclkpass {
48 #clock-cells = <0>;
49 compatible = "fixed-clock";
50 clock-frequency = <100000000>;
51 clock-output-names = "refclk-pass";
52 };
54 refclkddr3a: refclkddr3a {
55 #clock-cells = <0>;
56 compatible = "fixed-clock";
57 clock-frequency = <100000000>;
58 clock-output-names = "refclk-ddr3a";
59 };
60 };
61 };
63 &usb_phy {
64 status = "okay";
65 };
67 &keystone_usb0 {
68 status = "okay";
69 };
71 &usb0 {
72 dr_mode = "host";
73 };
75 &usb1_phy {
76 status = "okay";
77 };
79 &keystone_usb1 {
80 status = "okay";
81 };
83 &usb1 {
84 dr_mode = "peripheral";
85 };
87 &i2c0 {
88 dtt@50 {
89 compatible = "atmel,24c1024";
90 reg = <0x50>;
91 };
92 };
94 &aemif {
95 cs0 {
96 #address-cells = <2>;
97 #size-cells = <1>;
98 clock-ranges;
99 ranges;
101 ti,cs-chipselect = <0>;
102 /* all timings in nanoseconds */
103 ti,cs-min-turnaround-ns = <12>;
104 ti,cs-read-hold-ns = <6>;
105 ti,cs-read-strobe-ns = <23>;
106 ti,cs-read-setup-ns = <9>;
107 ti,cs-write-hold-ns = <8>;
108 ti,cs-write-strobe-ns = <23>;
109 ti,cs-write-setup-ns = <8>;
111 nand@0,0 {
112 compatible = "ti,keystone-nand","ti,davinci-nand";
113 #address-cells = <1>;
114 #size-cells = <1>;
115 reg = <0 0 0x4000000
116 1 0 0x0000100>;
118 ti,davinci-chipselect = <0>;
119 ti,davinci-mask-ale = <0x2000>;
120 ti,davinci-mask-cle = <0x4000>;
121 ti,davinci-mask-chipsel = <0>;
122 nand-ecc-mode = "hw";
123 ti,davinci-ecc-bits = <4>;
124 nand-on-flash-bbt;
126 partition@0 {
127 label = "u-boot";
128 reg = <0x0 0x100000>;
129 read-only;
130 };
132 partition@100000 {
133 label = "params";
134 reg = <0x100000 0x80000>;
135 read-only;
136 };
138 partition@180000 {
139 label = "ubifs";
140 reg = <0x180000 0x1FE80000>;
141 };
142 };
143 };
144 };
146 &spi0 {
147 nor_flash: n25q128a11@0 {
148 #address-cells = <1>;
149 #size-cells = <1>;
150 compatible = "Micron,n25q128a11";
151 spi-max-frequency = <54000000>;
152 m25p,fast-read;
153 reg = <0>;
155 partition@0 {
156 label = "u-boot-spl";
157 reg = <0x0 0x80000>;
158 read-only;
159 };
161 partition@1 {
162 label = "misc";
163 reg = <0x80000 0xf80000>;
164 };
165 };
166 };
168 &mdio {
169 status = "ok";
170 ethphy0: ethernet-phy@0 {
171 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
172 reg = <0>;
173 };
175 ethphy1: ethernet-phy@1 {
176 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
177 reg = <1>;
178 };
179 };
181 &dsp0 {
182 memory-region = <&dsp_common_memory>;
183 status = "okay";
184 };