arch/arm64/boot/dts/ti/k3-am654-base-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-am654.dtsi"
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         compatible =  "ti,am654-evm", "ti,am654";
  13         model = "Texas Instruments AM654 Base Board";
  14
  15         chosen {
  16                 stdout-path = "serial2:115200n8";
  17                 bootargs = "earlycon=ns16550a,mmio32,0x02800000";
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 /* 4G RAM */
  23                 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
  24                       <0x00000008 0x80000000 0x00000000 0x80000000>;
  25         };
  26
  27         reserved-memory {
  28                 #address-cells = <2>;
  29                 #size-cells = <2>;
  30                 ranges;
  31
  32                 secure_ddr: secure_ddr@9e800000 {
  33                         reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
  34                         alignment = <0x1000>;
  35                         no-map;
  36                 };
  37
  38                 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
  39                         compatible = "shared-dma-pool";
  40                         reg = <0 0xa0000000 0 0x100000>;
  41                         no-map;
  42                 };
  43
  44                 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
  45                         compatible = "shared-dma-pool";
  46                         reg = <0 0xa0100000 0 0xf00000>;
  47                         no-map;
  48                 };
  49
  50                 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
  51                         compatible = "shared-dma-pool";
  52                         reg = <0 0xa1000000 0 0x100000>;
  53                         no-map;
  54                 };
  55
  56                 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
  57                         compatible = "shared-dma-pool";
  58                         reg = <0 0xa1100000 0 0xf00000>;
  59                         no-map;
  60                 };
  61
  62                 rtos_ipc_memory_region: ipc-memories@a2000000 {
  63                         reg = <0x00 0xa2000000 0x00 0x00200000>;
  64                         alignment = <0x1000>;
  65                         no-map;
  66                 };
  67         };
  68
  69         gpio-keys {
  70                 compatible = "gpio-keys";
  71                 autorepeat;
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&push_button_pins_default>;
  74
  75                 sw5 {
  76                         label = "GPIO Key USER1";
  77                         linux,code = <BTN_0>;
  78                         gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
  79                 };
  80
  81                 sw6 {
  82                         label = "GPIO Key USER2";
  83                         linux,code = <BTN_1>;
  84                         gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
  85                 };
  86         };
  87 };
  88
  89 &wkup_pmx0 {
  90         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
  91                 pinctrl-single,pins = <
  92                         AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
  93                         AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
  94                 >;
  95         };
  96
  97         push_button_pins_default: push_button__pins_default {
  98                 pinctrl-single,pins = <
  99                         AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
 100                         AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
 101                 >;
 102         };
 103 };
 104
 105 &main_pmx0 {
 106         main_uart0_pins_default: main-uart0-pins-default {
 107                 pinctrl-single,pins = <
 108                         AM65X_IOPAD(0x01e4, PIN_INPUT, 0)       /* (AF11) UART0_RXD */
 109                         AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)      /* (AE11) UART0_TXD */
 110                         AM65X_IOPAD(0x01ec, PIN_INPUT, 0)       /* (AG11) UART0_CTSn */
 111                         AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)      /* (AD11) UART0_RTSn */
 112                 >;
 113         };
 114
 115         main_i2c2_pins_default: main-i2c2-pins-default {
 116                 pinctrl-single,pins = <
 117                         AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
 118                         AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
 119                 >;
 120         };
 121 };
 122
 123 &main_pmx1 {
 124         main_i2c0_pins_default: main-i2c0-pins-default {
 125                 pinctrl-single,pins = <
 126                         AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
 127                         AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
 128                 >;
 129         };
 130
 131         main_i2c1_pins_default: main-i2c1-pins-default {
 132                 pinctrl-single,pins = <
 133                         AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
 134                         AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
 135                 >;
 136         };
 137 };
 138
 139 &wkup_uart0 {
 140         /* Wakeup UART is used by System firmware */
 141         status = "disabled";
 142 };
 143
 144 &main_uart0 {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&main_uart0_pins_default>;
 147 };
 148
 149 &wkup_i2c0 {
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&wkup_i2c0_pins_default>;
 152         clock-frequency = <400000>;
 153
 154         pca9554: gpio@39 {
 155                 compatible = "nxp,pca9554";
 156                 reg = <0x39>;
 157                 gpio-controller;
 158                 #gpio-cells = <2>;
 159         };
 160 };
 161
 162 &main_i2c0 {
 163         pinctrl-names = "default";
 164         pinctrl-0 = <&main_i2c0_pins_default>;
 165         clock-frequency = <400000>;
 166
 167         pca9555: gpio@21 {
 168                 compatible = "nxp,pca9555";
 169                 reg = <0x21>;
 170                 gpio-controller;
 171                 #gpio-cells = <2>;
 172         };
 173 };
 174
 175 &main_i2c1 {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&main_i2c1_pins_default>;
 178         clock-frequency = <400000>;
 179 };
 180
 181 &main_i2c2 {
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&main_i2c2_pins_default>;
 184         clock-frequency = <400000>;
 185 };
 186
 187 &mcu_r5fss0_core0 {
 188         memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 189                         <&mcu_r5fss0_core0_memory_region>;
 190 };
 191
 192 &mcu_r5fss0_core1 {
 193         memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 194                         <&mcu_r5fss0_core1_memory_region>;
 195 };