drivers/gpu/drm/arm/malidp_mw.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
   4  * Author: Brian Starkey <brian.starkey@arm.com>
   5  *
   6  * ARM Mali DP Writeback connector implementation
   7  */
   8 #include <drm/drm_atomic.h>
   9 #include <drm/drm_atomic_helper.h>
  10 #include <drm/drm_crtc.h>
  11 #include <drm/drm_crtc_helper.h>
  12 #include <drm/drm_fb_cma_helper.h>
  13 #include <drm/drm_gem_cma_helper.h>
  14 #include <drm/drmP.h>
  15 #include <drm/drm_writeback.h>
  16
  17 #include "malidp_drv.h"
  18 #include "malidp_hw.h"
  19 #include "malidp_mw.h"
  20
  21 #define to_mw_state(_state) (struct malidp_mw_connector_state *)(_state)
  22
  23 struct malidp_mw_connector_state {
  24         struct drm_connector_state base;
  25         dma_addr_t addrs[2];
  26         s32 pitches[2];
  27         u8 format;
  28         u8 n_planes;
  29         bool rgb2yuv_initialized;
  30         const s16 *rgb2yuv_coeffs;
  31 };
  32
  33 static int malidp_mw_connector_get_modes(struct drm_connector *connector)
  34 {
  35         struct drm_device *dev = connector->dev;
  36
  37         return drm_add_modes_noedid(connector, dev->mode_config.max_width,
  38                                     dev->mode_config.max_height);
  39 }
  40
  41 static enum drm_mode_status
  42 malidp_mw_connector_mode_valid(struct drm_connector *connector,
  43                                struct drm_display_mode *mode)
  44 {
  45         struct drm_device *dev = connector->dev;
  46         struct drm_mode_config *mode_config = &dev->mode_config;
  47         int w = mode->hdisplay, h = mode->vdisplay;
  48
  49         if ((w < mode_config->min_width) || (w > mode_config->max_width))
  50                 return MODE_BAD_HVALUE;
  51
  52         if ((h < mode_config->min_height) || (h > mode_config->max_height))
  53                 return MODE_BAD_VVALUE;
  54
  55         return MODE_OK;
  56 }
  57
  58 const struct drm_connector_helper_funcs malidp_mw_connector_helper_funcs = {
  59         .get_modes = malidp_mw_connector_get_modes,
  60         .mode_valid = malidp_mw_connector_mode_valid,
  61 };
  62
  63 static void malidp_mw_connector_reset(struct drm_connector *connector)
  64 {
  65         struct malidp_mw_connector_state *mw_state =
  66                 kzalloc(sizeof(*mw_state), GFP_KERNEL);
  67
  68         if (connector->state)
  69                 __drm_atomic_helper_connector_destroy_state(connector->state);
  70
  71         kfree(connector->state);
  72         __drm_atomic_helper_connector_reset(connector, &mw_state->base);
  73 }
  74
  75 static enum drm_connector_status
  76 malidp_mw_connector_detect(struct drm_connector *connector, bool force)
  77 {
  78         return connector_status_connected;
  79 }
  80
  81 static void malidp_mw_connector_destroy(struct drm_connector *connector)
  82 {
  83         drm_connector_cleanup(connector);
  84 }
  85
  86 static struct drm_connector_state *
  87 malidp_mw_connector_duplicate_state(struct drm_connector *connector)
  88 {
  89         struct malidp_mw_connector_state *mw_state, *mw_current_state;
  90
  91         if (WARN_ON(!connector->state))
  92                 return NULL;
  93
  94         mw_state = kzalloc(sizeof(*mw_state), GFP_KERNEL);
  95         if (!mw_state)
  96                 return NULL;
  97
  98         mw_current_state = to_mw_state(connector->state);
  99         mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
 100         mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
 101
 102         __drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
 103
 104         return &mw_state->base;
 105 }
 106
 107 static const struct drm_connector_funcs malidp_mw_connector_funcs = {
 108         .reset = malidp_mw_connector_reset,
 109         .detect = malidp_mw_connector_detect,
 110         .fill_modes = drm_helper_probe_single_connector_modes,
 111         .destroy = malidp_mw_connector_destroy,
 112         .atomic_duplicate_state = malidp_mw_connector_duplicate_state,
 113         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 114 };
 115
 116 static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = {
 117         47,  157,   16,
 118         -26,  -87,  112,
 119         112, -102,  -10,
 120         16,  128,  128
 121 };
 122
 123 static int
 124 malidp_mw_encoder_atomic_check(struct drm_encoder *encoder,
 125                                struct drm_crtc_state *crtc_state,
 126                                struct drm_connector_state *conn_state)
 127 {
 128         struct malidp_mw_connector_state *mw_state = to_mw_state(conn_state);
 129         struct malidp_drm *malidp = encoder->dev->dev_private;
 130         struct drm_framebuffer *fb;
 131         int i, n_planes;
 132
 133         if (!conn_state->writeback_job || !conn_state->writeback_job->fb)
 134                 return 0;
 135
 136         fb = conn_state->writeback_job->fb;
 137         if ((fb->width != crtc_state->mode.hdisplay) ||
 138             (fb->height != crtc_state->mode.vdisplay)) {
 139                 DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
 140                                 fb->width, fb->height);
 141                 return -EINVAL;
 142         }
 143
 144         mw_state->format =
 145                 malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE,
 146                                         fb->format->format);
 147         if (mw_state->format == MALIDP_INVALID_FORMAT_ID) {
 148                 struct drm_format_name_buf format_name;
 149
 150                 DRM_DEBUG_KMS("Invalid pixel format %s\n",
 151                               drm_get_format_name(fb->format->format,
 152                                                   &format_name));
 153                 return -EINVAL;
 154         }
 155
 156         n_planes = drm_format_num_planes(fb->format->format);
 157         for (i = 0; i < n_planes; i++) {
 158                 struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, i);
 159                 /* memory write buffers are never rotated */
 160                 u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0);
 161
 162                 if (fb->pitches[i] & (alignment - 1)) {
 163                         DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n",
 164                                       fb->pitches[i], i);
 165                         return -EINVAL;
 166                 }
 167                 mw_state->pitches[i] = fb->pitches[i];
 168                 mw_state->addrs[i] = obj->paddr + fb->offsets[i];
 169         }
 170         mw_state->n_planes = n_planes;
 171
 172         if (fb->format->is_yuv)
 173                 mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
 174
 175         return 0;
 176 }
 177
 178 static const struct drm_encoder_helper_funcs malidp_mw_encoder_helper_funcs = {
 179         .atomic_check = malidp_mw_encoder_atomic_check,
 180 };
 181
 182 static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats)
 183 {
 184         const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
 185         u32 *formats;
 186         int n, i;
 187
 188         formats = kcalloc(map->n_pixel_formats, sizeof(*formats),
 189                           GFP_KERNEL);
 190         if (!formats)
 191                 return NULL;
 192
 193         for (n = 0, i = 0;  i < map->n_pixel_formats; i++) {
 194                 if (map->pixel_formats[i].layer & SE_MEMWRITE)
 195                         formats[n++] = map->pixel_formats[i].format;
 196         }
 197
 198         *n_formats = n;
 199
 200         return formats;
 201 }
 202
 203 int malidp_mw_connector_init(struct drm_device *drm)
 204 {
 205         struct malidp_drm *malidp = drm->dev_private;
 206         u32 *formats;
 207         int ret, n_formats;
 208
 209         if (!malidp->dev->hw->enable_memwrite)
 210                 return 0;
 211
 212         malidp->mw_connector.encoder.possible_crtcs = 1 << drm_crtc_index(&malidp->crtc);
 213         drm_connector_helper_add(&malidp->mw_connector.base,
 214                                  &malidp_mw_connector_helper_funcs);
 215
 216         formats = get_writeback_formats(malidp, &n_formats);
 217         if (!formats)
 218                 return -ENOMEM;
 219
 220         ret = drm_writeback_connector_init(drm, &malidp->mw_connector,
 221                                            &malidp_mw_connector_funcs,
 222                                            &malidp_mw_encoder_helper_funcs,
 223                                            formats, n_formats);
 224         kfree(formats);
 225         if (ret)
 226                 return ret;
 227
 228         return 0;
 229 }
 230
 231 void malidp_mw_atomic_commit(struct drm_device *drm,
 232                              struct drm_atomic_state *old_state)
 233 {
 234         struct malidp_drm *malidp = drm->dev_private;
 235         struct drm_writeback_connector *mw_conn = &malidp->mw_connector;
 236         struct drm_connector_state *conn_state = mw_conn->base.state;
 237         struct malidp_hw_device *hwdev = malidp->dev;
 238         struct malidp_mw_connector_state *mw_state;
 239
 240         if (!conn_state)
 241                 return;
 242
 243         mw_state = to_mw_state(conn_state);
 244
 245         if (conn_state->writeback_job && conn_state->writeback_job->fb) {
 246                 struct drm_framebuffer *fb = conn_state->writeback_job->fb;
 247
 248                 DRM_DEV_DEBUG_DRIVER(drm->dev,
 249                                      "Enable memwrite %ux%u:%d %pad fmt: %u\n",
 250                                      fb->width, fb->height,
 251                                      mw_state->pitches[0],
 252                                      &mw_state->addrs[0],
 253                                      mw_state->format);
 254
 255                 drm_writeback_queue_job(mw_conn, conn_state->writeback_job);
 256                 conn_state->writeback_job = NULL;
 257                 hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
 258                                            mw_state->pitches, mw_state->n_planes,
 259                                            fb->width, fb->height, mw_state->format,
 260                                            !mw_state->rgb2yuv_initialized ?
 261                                            mw_state->rgb2yuv_coeffs : NULL);
 262                 mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;
 263         } else {
 264                 DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n");
 265                 hwdev->hw->disable_memwrite(hwdev);
 266         }
 267 }