1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
24 #include <scsi/scsi_host.h>
25 #include <linux/ktime.h>
26 #include <linux/workqueue.h>
28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29 #define CONFIG_SCSI_LPFC_DEBUG_FS
30 #endif
32 struct lpfc_sli2_slim;
34 #define ELX_MODEL_NAME_SIZE 80
36 #define LPFC_PCI_DEV_LP 0x1
37 #define LPFC_PCI_DEV_OC 0x2
39 #define LPFC_SLI_REV2 2
40 #define LPFC_SLI_REV3 3
41 #define LPFC_SLI_REV4 4
43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
45 requests */
46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
47 the NameServer before giving up. */
48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
51 cmnd for menlo needs nearly twice as for firmware
52 downloads using bsg */
54 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
55 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
56 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
57 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
58 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
59 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
60 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
61 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
63 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
64 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
65 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
66 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
67 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
68 #define LPFC_MIN_TGT_QDEPTH 10
69 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
71 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
72 collection. */
73 /*
74 * Following time intervals are used of adjusting SCSI device
75 * queue depths when there are driver resource error or Firmware
76 * resource error.
77 */
78 /* 1 Second */
79 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
81 /* Number of exchanges reserved for discovery to complete */
82 #define LPFC_DISC_IOCB_BUFF_COUNT 20
84 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
85 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
87 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
89 /* Error Attention event polling interval */
90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
92 /* Define macros for 64 bit support */
93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
95 #define getPaddr(high, low) ((dma_addr_t)( \
96 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
97 /* Provide maximum configuration definitions. */
98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
99 #define FC_MAX_ADPTMSG 64
101 #define MAX_HBAEVT 32
102 #define MAX_HBAS_NO_RESET 16
104 /* Number of MSI-X vectors the driver uses */
105 #define LPFC_MSIX_VECTORS 2
107 /* lpfc wait event data ready flag */
108 #define LPFC_DATA_READY 0 /* bit 0 */
110 /* queue dump line buffer size */
111 #define LPFC_LBUF_SZ 128
113 /* mailbox system shutdown options */
114 #define LPFC_MBX_NO_WAIT 0
115 #define LPFC_MBX_WAIT 1
117 enum lpfc_polling_flags {
118 ENABLE_FCP_RING_POLLING = 0x1,
119 DISABLE_FCP_RING_INT = 0x2
120 };
122 struct perf_prof {
123 uint16_t cmd_cpu[40];
124 uint16_t rsp_cpu[40];
125 uint16_t qh_cpu[40];
126 uint16_t wqidx[40];
127 };
129 /*
130 * Provide for FC4 TYPE x28 - NVME. The
131 * bit mask for FCP and NVME is 0x8 identically
132 * because they are 32 bit positions distance.
133 */
134 #define LPFC_FC4_TYPE_BITMASK 0x00000100
136 /* Provide DMA memory definitions the driver uses per port instance. */
137 struct lpfc_dmabuf {
138 struct list_head list;
139 void *virt; /* virtual address ptr */
140 dma_addr_t phys; /* mapped address */
141 uint32_t buffer_tag; /* used for tagged queue ring */
142 };
144 struct lpfc_nvmet_ctxbuf {
145 struct list_head list;
146 struct lpfc_nvmet_rcv_ctx *context;
147 struct lpfc_iocbq *iocbq;
148 struct lpfc_sglq *sglq;
149 };
151 struct lpfc_dma_pool {
152 struct lpfc_dmabuf *elements;
153 uint32_t max_count;
154 uint32_t current_count;
155 };
157 struct hbq_dmabuf {
158 struct lpfc_dmabuf hbuf;
159 struct lpfc_dmabuf dbuf;
160 uint16_t total_size;
161 uint16_t bytes_recv;
162 uint32_t tag;
163 struct lpfc_cq_event cq_event;
164 unsigned long time_stamp;
165 void *context;
166 };
168 struct rqb_dmabuf {
169 struct lpfc_dmabuf hbuf;
170 struct lpfc_dmabuf dbuf;
171 uint16_t total_size;
172 uint16_t bytes_recv;
173 uint16_t idx;
174 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
175 struct lpfc_queue *drq; /* ptr to associated Data RQ */
176 };
178 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
179 #define MEM_PRI 0x100
182 /****************************************************************************/
183 /* Device VPD save area */
184 /****************************************************************************/
185 typedef struct lpfc_vpd {
186 uint32_t status; /* vpd status value */
187 uint32_t length; /* number of bytes actually returned */
188 struct {
189 uint32_t rsvd1; /* Revision numbers */
190 uint32_t biuRev;
191 uint32_t smRev;
192 uint32_t smFwRev;
193 uint32_t endecRev;
194 uint16_t rBit;
195 uint8_t fcphHigh;
196 uint8_t fcphLow;
197 uint8_t feaLevelHigh;
198 uint8_t feaLevelLow;
199 uint32_t postKernRev;
200 uint32_t opFwRev;
201 uint8_t opFwName[16];
202 uint32_t sli1FwRev;
203 uint8_t sli1FwName[16];
204 uint32_t sli2FwRev;
205 uint8_t sli2FwName[16];
206 } rev;
207 struct {
208 #ifdef __BIG_ENDIAN_BITFIELD
209 uint32_t rsvd3 :19; /* Reserved */
210 uint32_t cdss : 1; /* Configure Data Security SLI */
211 uint32_t rsvd2 : 3; /* Reserved */
212 uint32_t cbg : 1; /* Configure BlockGuard */
213 uint32_t cmv : 1; /* Configure Max VPIs */
214 uint32_t ccrp : 1; /* Config Command Ring Polling */
215 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
216 uint32_t chbs : 1; /* Cofigure Host Backing store */
217 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
218 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
219 uint32_t cmx : 1; /* Configure Max XRIs */
220 uint32_t cmr : 1; /* Configure Max RPIs */
221 #else /* __LITTLE_ENDIAN */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223 uint32_t cmx : 1; /* Configure Max XRIs */
224 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
225 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
226 uint32_t chbs : 1; /* Cofigure Host Backing store */
227 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
228 uint32_t ccrp : 1; /* Config Command Ring Polling */
229 uint32_t cmv : 1; /* Configure Max VPIs */
230 uint32_t cbg : 1; /* Configure BlockGuard */
231 uint32_t rsvd2 : 3; /* Reserved */
232 uint32_t cdss : 1; /* Configure Data Security SLI */
233 uint32_t rsvd3 :19; /* Reserved */
234 #endif
235 } sli3Feat;
236 } lpfc_vpd_t;
238 struct lpfc_scsi_buf;
241 /*
242 * lpfc stat counters
243 */
244 struct lpfc_stats {
245 /* Statistics for ELS commands */
246 uint32_t elsLogiCol;
247 uint32_t elsRetryExceeded;
248 uint32_t elsXmitRetry;
249 uint32_t elsDelayRetry;
250 uint32_t elsRcvDrop;
251 uint32_t elsRcvFrame;
252 uint32_t elsRcvRSCN;
253 uint32_t elsRcvRNID;
254 uint32_t elsRcvFARP;
255 uint32_t elsRcvFARPR;
256 uint32_t elsRcvFLOGI;
257 uint32_t elsRcvPLOGI;
258 uint32_t elsRcvADISC;
259 uint32_t elsRcvPDISC;
260 uint32_t elsRcvFAN;
261 uint32_t elsRcvLOGO;
262 uint32_t elsRcvPRLO;
263 uint32_t elsRcvPRLI;
264 uint32_t elsRcvLIRR;
265 uint32_t elsRcvRLS;
266 uint32_t elsRcvRPS;
267 uint32_t elsRcvRPL;
268 uint32_t elsRcvRRQ;
269 uint32_t elsRcvRTV;
270 uint32_t elsRcvECHO;
271 uint32_t elsRcvLCB;
272 uint32_t elsRcvRDP;
273 uint32_t elsXmitFLOGI;
274 uint32_t elsXmitFDISC;
275 uint32_t elsXmitPLOGI;
276 uint32_t elsXmitPRLI;
277 uint32_t elsXmitADISC;
278 uint32_t elsXmitLOGO;
279 uint32_t elsXmitSCR;
280 uint32_t elsXmitRNID;
281 uint32_t elsXmitFARP;
282 uint32_t elsXmitFARPR;
283 uint32_t elsXmitACC;
284 uint32_t elsXmitLSRJT;
286 uint32_t frameRcvBcast;
287 uint32_t frameRcvMulti;
288 uint32_t strayXmitCmpl;
289 uint32_t frameXmitDelay;
290 uint32_t xriCmdCmpl;
291 uint32_t xriStatErr;
292 uint32_t LinkUp;
293 uint32_t LinkDown;
294 uint32_t LinkMultiEvent;
295 uint32_t NoRcvBuf;
296 uint32_t fcpCmd;
297 uint32_t fcpCmpl;
298 uint32_t fcpRspErr;
299 uint32_t fcpRemoteStop;
300 uint32_t fcpPortRjt;
301 uint32_t fcpPortBusy;
302 uint32_t fcpError;
303 uint32_t fcpLocalErr;
304 };
306 struct lpfc_hba;
309 enum discovery_state {
310 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
311 LPFC_VPORT_FAILED = 1, /* vport has failed */
312 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
313 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
314 LPFC_FDISC = 8, /* FDISC sent for vport */
315 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
316 * configured */
317 LPFC_NS_REG = 10, /* Register with NameServer */
318 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
319 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
320 * device authentication / discovery */
321 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
322 LPFC_VPORT_READY = 32,
323 };
325 enum hba_state {
326 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
327 LPFC_WARM_START = 1, /* HBA state after selective reset */
328 LPFC_INIT_START = 2, /* Initial state after board reset */
329 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
330 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
331 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
332 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
333 * CLEAR_LA */
334 LPFC_HBA_READY = 32,
335 LPFC_HBA_ERROR = -1
336 };
338 struct lpfc_vport {
339 struct lpfc_hba *phba;
340 struct list_head listentry;
341 uint8_t port_type;
342 #define LPFC_PHYSICAL_PORT 1
343 #define LPFC_NPIV_PORT 2
344 #define LPFC_FABRIC_PORT 3
345 enum discovery_state port_state;
347 uint16_t vpi;
348 uint16_t vfi;
349 uint8_t vpi_state;
350 #define LPFC_VPI_REGISTERED 0x1
352 uint32_t fc_flag; /* FC flags */
353 /* Several of these flags are HBA centric and should be moved to
354 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
355 */
356 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
357 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
358 #define FC_DISC_TMO 0x4 /* Discovery timer running */
359 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
360 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
361 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
362 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
363 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
364 #define FC_FABRIC 0x100 /* We are fabric attached */
365 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
366 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
367 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
368 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
369 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
370 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
371 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
372 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
373 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
374 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
375 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
376 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
377 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
378 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
380 uint32_t ct_flags;
381 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
382 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
383 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
384 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
385 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
387 struct list_head fc_nodes;
389 /* Keep counters for the number of entries in each list. */
390 uint16_t fc_plogi_cnt;
391 uint16_t fc_adisc_cnt;
392 uint16_t fc_reglogin_cnt;
393 uint16_t fc_prli_cnt;
394 uint16_t fc_unmap_cnt;
395 uint16_t fc_map_cnt;
396 uint16_t fc_npr_cnt;
397 uint16_t fc_unused_cnt;
398 struct serv_parm fc_sparam; /* buffer for our service parameters */
400 uint32_t fc_myDID; /* fibre channel S_ID */
401 uint32_t fc_prevDID; /* previous fibre channel S_ID */
402 struct lpfc_name fabric_portname;
403 struct lpfc_name fabric_nodename;
405 int32_t stopped; /* HBA has not been restarted since last ERATT */
406 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
408 uint32_t num_disc_nodes; /* in addition to hba_state */
409 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
411 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
412 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
413 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
414 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
415 struct lpfc_name fc_nodename; /* fc nodename */
416 struct lpfc_name fc_portname; /* fc portname */
418 struct lpfc_work_evt disc_timeout_evt;
420 struct timer_list fc_disctmo; /* Discovery rescue timer */
421 uint8_t fc_ns_retry; /* retries for fabric nameserver */
422 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
424 spinlock_t work_port_lock;
425 uint32_t work_port_events; /* Timeout to be handled */
426 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
427 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
428 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
430 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
431 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
432 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
433 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
434 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
435 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
437 struct timer_list els_tmofunc;
438 struct timer_list delayed_disc_tmo;
440 int unreg_vpi_cmpl;
442 uint8_t load_flag;
443 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
444 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
445 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
446 /* Vport Config Parameters */
447 uint32_t cfg_scan_down;
448 uint32_t cfg_lun_queue_depth;
449 uint32_t cfg_nodev_tmo;
450 uint32_t cfg_devloss_tmo;
451 uint32_t cfg_restrict_login;
452 uint32_t cfg_peer_port_login;
453 uint32_t cfg_fcp_class;
454 uint32_t cfg_use_adisc;
455 uint32_t cfg_discovery_threads;
456 uint32_t cfg_log_verbose;
457 uint32_t cfg_max_luns;
458 uint32_t cfg_enable_da_id;
459 uint32_t cfg_max_scsicmpl_time;
460 uint32_t cfg_tgt_queue_depth;
461 uint32_t cfg_first_burst_size;
462 uint32_t dev_loss_tmo_changed;
464 struct fc_vport *fc_vport;
466 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
467 struct dentry *debug_disc_trc;
468 struct dentry *debug_nodelist;
469 struct dentry *debug_nvmestat;
470 struct dentry *debug_nvmektime;
471 struct dentry *debug_cpucheck;
472 struct dentry *vport_debugfs_root;
473 struct lpfc_debugfs_trc *disc_trc;
474 atomic_t disc_trc_cnt;
475 #endif
476 uint8_t stat_data_enabled;
477 uint8_t stat_data_blocked;
478 struct list_head rcv_buffer_list;
479 unsigned long rcv_buffer_time_stamp;
480 uint32_t vport_flag;
481 #define STATIC_VPORT 1
482 #define FAWWPN_SET 2
483 #define FAWWPN_PARAM_CHG 4
485 uint16_t fdmi_num_disc;
486 uint32_t fdmi_hba_mask;
487 uint32_t fdmi_port_mask;
489 /* There is a single nvme instance per vport. */
490 struct nvme_fc_local_port *localport;
491 uint8_t nvmei_support; /* driver supports NVME Initiator */
492 uint32_t last_fcp_wqidx;
493 };
495 struct hbq_s {
496 uint16_t entry_count; /* Current number of HBQ slots */
497 uint16_t buffer_count; /* Current number of buffers posted */
498 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
499 uint32_t hbqPutIdx; /* HBQ slot to use */
500 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
501 void *hbq_virt; /* Virtual ptr to this hbq */
502 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
503 /* Callback for HBQ buffer allocation */
504 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
505 /* Callback for HBQ buffer free */
506 void (*hbq_free_buffer) (struct lpfc_hba *,
507 struct hbq_dmabuf *);
508 };
510 /* this matches the position in the lpfc_hbq_defs array */
511 #define LPFC_ELS_HBQ 0
512 #define LPFC_MAX_HBQS 1
514 enum hba_temp_state {
515 HBA_NORMAL_TEMP,
516 HBA_OVER_TEMP
517 };
519 enum intr_type_t {
520 NONE = 0,
521 INTx,
522 MSI,
523 MSIX,
524 };
526 #define LPFC_CT_CTX_MAX 64
527 struct unsol_rcv_ct_ctx {
528 uint32_t ctxt_id;
529 uint32_t SID;
530 uint32_t valid;
531 #define UNSOL_INVALID 0
532 #define UNSOL_VALID 1
533 uint16_t oxid;
534 uint16_t rxid;
535 };
537 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
538 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
539 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
540 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
541 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
542 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
543 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
544 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
545 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */
546 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G
548 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
550 enum nemb_type {
551 nemb_mse = 1,
552 nemb_hbd
553 };
555 enum mbox_type {
556 mbox_rd = 1,
557 mbox_wr
558 };
560 enum dma_type {
561 dma_mbox = 1,
562 dma_ebuf
563 };
565 enum sta_type {
566 sta_pre_addr = 1,
567 sta_pos_addr
568 };
570 struct lpfc_mbox_ext_buf_ctx {
571 uint32_t state;
572 #define LPFC_BSG_MBOX_IDLE 0
573 #define LPFC_BSG_MBOX_HOST 1
574 #define LPFC_BSG_MBOX_PORT 2
575 #define LPFC_BSG_MBOX_DONE 3
576 #define LPFC_BSG_MBOX_ABTS 4
577 enum nemb_type nembType;
578 enum mbox_type mboxType;
579 uint32_t numBuf;
580 uint32_t mbxTag;
581 uint32_t seqNum;
582 struct lpfc_dmabuf *mbx_dmabuf;
583 struct list_head ext_dmabuf_list;
584 };
586 struct lpfc_hba {
587 /* SCSI interface function jump table entries */
588 int (*lpfc_new_scsi_buf)
589 (struct lpfc_vport *, int);
590 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
591 (struct lpfc_hba *, struct lpfc_nodelist *);
592 int (*lpfc_scsi_prep_dma_buf)
593 (struct lpfc_hba *, struct lpfc_scsi_buf *);
594 void (*lpfc_scsi_unprep_dma_buf)
595 (struct lpfc_hba *, struct lpfc_scsi_buf *);
596 void (*lpfc_release_scsi_buf)
597 (struct lpfc_hba *, struct lpfc_scsi_buf *);
598 void (*lpfc_rampdown_queue_depth)
599 (struct lpfc_hba *);
600 void (*lpfc_scsi_prep_cmnd)
601 (struct lpfc_vport *, struct lpfc_scsi_buf *,
602 struct lpfc_nodelist *);
604 /* IOCB interface function jump table entries */
605 int (*__lpfc_sli_issue_iocb)
606 (struct lpfc_hba *, uint32_t,
607 struct lpfc_iocbq *, uint32_t);
608 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
609 struct lpfc_iocbq *);
610 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
611 IOCB_t * (*lpfc_get_iocb_from_iocbq)
612 (struct lpfc_iocbq *);
613 void (*lpfc_scsi_cmd_iocb_cmpl)
614 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
616 /* MBOX interface function jump table entries */
617 int (*lpfc_sli_issue_mbox)
618 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
620 /* Slow-path IOCB process function jump table entries */
621 void (*lpfc_sli_handle_slow_ring_event)
622 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
623 uint32_t mask);
625 /* INIT device interface function jump table entries */
626 int (*lpfc_sli_hbq_to_firmware)
627 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
628 int (*lpfc_sli_brdrestart)
629 (struct lpfc_hba *);
630 int (*lpfc_sli_brdready)
631 (struct lpfc_hba *, uint32_t);
632 void (*lpfc_handle_eratt)
633 (struct lpfc_hba *);
634 void (*lpfc_stop_port)
635 (struct lpfc_hba *);
636 int (*lpfc_hba_init_link)
637 (struct lpfc_hba *, uint32_t);
638 int (*lpfc_hba_down_link)
639 (struct lpfc_hba *, uint32_t);
640 int (*lpfc_selective_reset)
641 (struct lpfc_hba *);
643 int (*lpfc_bg_scsi_prep_dma_buf)
644 (struct lpfc_hba *, struct lpfc_scsi_buf *);
645 /* Add new entries here */
647 /* SLI4 specific HBA data structure */
648 struct lpfc_sli4_hba sli4_hba;
650 struct workqueue_struct *wq;
652 struct lpfc_sli sli;
653 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
654 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
655 uint32_t sli3_options; /* Mask of enabled SLI3 options */
656 #define LPFC_SLI3_HBQ_ENABLED 0x01
657 #define LPFC_SLI3_NPIV_ENABLED 0x02
658 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
659 #define LPFC_SLI3_CRP_ENABLED 0x08
660 #define LPFC_SLI3_BG_ENABLED 0x20
661 #define LPFC_SLI3_DSS_ENABLED 0x40
662 #define LPFC_SLI4_PERFH_ENABLED 0x80
663 #define LPFC_SLI4_PHWQ_ENABLED 0x100
664 uint32_t iocb_cmd_size;
665 uint32_t iocb_rsp_size;
667 enum hba_state link_state;
668 uint32_t link_flag; /* link state flags */
669 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
670 /* This flag is set while issuing */
671 /* INIT_LINK mailbox command */
672 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
673 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
674 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
675 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */
677 uint32_t hba_flag; /* hba generic flags */
678 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
679 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
680 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
681 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
682 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
683 #define FCP_XRI_ABORT_EVENT 0x20
684 #define ELS_XRI_ABORT_EVENT 0x40
685 #define ASYNC_EVENT 0x80
686 #define LINK_DISABLED 0x100 /* Link disabled by user */
687 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
688 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
689 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
690 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
691 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
692 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
693 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
694 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
695 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
696 #define HBA_FORCED_LINK_SPEED 0x40000 /*
697 * Firmware supports Forced Link Speed
698 * capability
699 */
700 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
702 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
703 struct lpfc_dmabuf slim2p;
705 MAILBOX_t *mbox;
706 uint32_t *mbox_ext;
707 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
708 uint32_t ha_copy;
709 struct _PCB *pcb;
710 struct _IOCB *IOCBs;
712 struct lpfc_dmabuf hbqslimp;
714 uint16_t pci_cfg_value;
716 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
718 uint32_t fc_eventTag; /* event tag for link attention */
719 uint32_t link_events;
721 /* These fields used to be binfo */
722 uint32_t fc_pref_DID; /* preferred D_ID */
723 uint8_t fc_pref_ALPA; /* preferred AL_PA */
724 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
725 uint32_t fc_edtov; /* E_D_TOV timer value */
726 uint32_t fc_arbtov; /* ARB_TOV timer value */
727 uint32_t fc_ratov; /* R_A_TOV timer value */
728 uint32_t fc_rttov; /* R_T_TOV timer value */
729 uint32_t fc_altov; /* AL_TOV timer value */
730 uint32_t fc_crtov; /* C_R_TOV timer value */
732 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
733 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
735 uint32_t lmt;
737 uint32_t fc_topology; /* link topology, from LINK INIT */
738 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
740 struct lpfc_stats fc_stat;
742 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
743 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
745 uint8_t wwnn[8];
746 uint8_t wwpn[8];
747 uint32_t RandomData[7];
748 uint8_t fcp_embed_io;
749 uint8_t nvme_support; /* Firmware supports NVME */
750 uint8_t nvmet_support; /* driver supports NVMET */
751 #define LPFC_NVMET_MAX_PORTS 32
752 uint8_t mds_diags_support;
753 uint32_t initial_imax;
754 uint8_t bbcredit_support;
755 uint8_t enab_exp_wqcq_pages;
757 /* HBA Config Parameters */
758 uint32_t cfg_ack0;
759 uint32_t cfg_enable_npiv;
760 uint32_t cfg_enable_rrq;
761 uint32_t cfg_topology;
762 uint32_t cfg_link_speed;
763 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
764 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
765 uint32_t cfg_fcf_failover_policy;
766 uint32_t cfg_fcp_io_sched;
767 uint32_t cfg_fcp2_no_tgt_reset;
768 uint32_t cfg_cr_delay;
769 uint32_t cfg_cr_count;
770 uint32_t cfg_multi_ring_support;
771 uint32_t cfg_multi_ring_rctl;
772 uint32_t cfg_multi_ring_type;
773 uint32_t cfg_poll;
774 uint32_t cfg_poll_tmo;
775 uint32_t cfg_task_mgmt_tmo;
776 uint32_t cfg_use_msi;
777 uint32_t cfg_auto_imax;
778 uint32_t cfg_fcp_imax;
779 uint32_t cfg_fcp_cpu_map;
780 uint32_t cfg_fcp_io_channel;
781 uint32_t cfg_suppress_rsp;
782 uint32_t cfg_nvme_oas;
783 uint32_t cfg_nvme_embed_cmd;
784 uint32_t cfg_nvme_io_channel;
785 uint32_t cfg_nvmet_mrq_post;
786 uint32_t cfg_nvmet_mrq;
787 uint32_t cfg_enable_nvmet;
788 uint32_t cfg_nvme_enable_fb;
789 uint32_t cfg_nvmet_fb_size;
790 uint32_t cfg_total_seg_cnt;
791 uint32_t cfg_sg_seg_cnt;
792 uint32_t cfg_nvme_seg_cnt;
793 uint32_t cfg_sg_dma_buf_size;
794 uint64_t cfg_soft_wwnn;
795 uint64_t cfg_soft_wwpn;
796 uint32_t cfg_hba_queue_depth;
797 uint32_t cfg_enable_hba_reset;
798 uint32_t cfg_enable_hba_heartbeat;
799 uint32_t cfg_fof;
800 uint32_t cfg_EnableXLane;
801 uint8_t cfg_oas_tgt_wwpn[8];
802 uint8_t cfg_oas_vpt_wwpn[8];
803 uint32_t cfg_oas_lun_state;
804 #define OAS_LUN_ENABLE 1
805 #define OAS_LUN_DISABLE 0
806 uint32_t cfg_oas_lun_status;
807 #define OAS_LUN_STATUS_EXISTS 0x01
808 uint32_t cfg_oas_flags;
809 #define OAS_FIND_ANY_VPORT 0x01
810 #define OAS_FIND_ANY_TARGET 0x02
811 #define OAS_LUN_VALID 0x04
812 uint32_t cfg_oas_priority;
813 uint32_t cfg_XLanePriority;
814 uint32_t cfg_enable_bg;
815 uint32_t cfg_prot_mask;
816 uint32_t cfg_prot_guard;
817 uint32_t cfg_hostmem_hgp;
818 uint32_t cfg_log_verbose;
819 uint32_t cfg_aer_support;
820 uint32_t cfg_sriov_nr_virtfn;
821 uint32_t cfg_request_firmware_upgrade;
822 uint32_t cfg_iocb_cnt;
823 uint32_t cfg_suppress_link_up;
824 uint32_t cfg_rrq_xri_bitmap_sz;
825 uint32_t cfg_delay_discovery;
826 uint32_t cfg_sli_mode;
827 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
828 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
829 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
830 uint32_t cfg_enable_dss;
831 uint32_t cfg_fdmi_on;
832 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
833 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
834 uint32_t cfg_enable_SmartSAN;
835 uint32_t cfg_enable_mds_diags;
836 uint32_t cfg_enable_fc4_type;
837 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
838 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
839 uint32_t cfg_xri_split;
840 #define LPFC_ENABLE_FCP 1
841 #define LPFC_ENABLE_NVME 2
842 #define LPFC_ENABLE_BOTH 3
843 uint32_t cfg_enable_pbde;
844 uint32_t io_channel_irqs; /* number of irqs for io channels */
845 struct nvmet_fc_target_port *targetport;
846 lpfc_vpd_t vpd; /* vital product data */
848 struct pci_dev *pcidev;
849 struct list_head work_list;
850 uint32_t work_ha; /* Host Attention Bits for WT */
851 uint32_t work_ha_mask; /* HA Bits owned by WT */
852 uint32_t work_hs; /* HS stored in case of ERRAT */
853 uint32_t work_status[2]; /* Extra status from SLIM */
855 wait_queue_head_t work_waitq;
856 struct task_struct *worker_thread;
857 unsigned long data_flags;
859 uint32_t hbq_in_use; /* HBQs in use flag */
860 uint32_t hbq_count; /* Count of configured HBQs */
861 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
863 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
864 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
866 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
867 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
868 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
869 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
870 PCI BAR0 */
871 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
872 PCI BAR2 */
874 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
875 PCI BAR0 with dual-ULP support */
876 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
877 PCI BAR2 with dual-ULP support */
878 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
879 PCI BAR4 with dual-ULP support */
880 #define PCI_64BIT_BAR0 0
881 #define PCI_64BIT_BAR2 2
882 #define PCI_64BIT_BAR4 4
883 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
884 void __iomem *HAregaddr; /* virtual address for host attn reg */
885 void __iomem *CAregaddr; /* virtual address for chip attn reg */
886 void __iomem *HSregaddr; /* virtual address for host status
887 reg */
888 void __iomem *HCregaddr; /* virtual address for host ctl reg */
890 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
891 struct lpfc_pgp *port_gp;
892 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
893 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
895 int brd_no; /* FC board number */
896 char SerialNumber[32]; /* adapter Serial Number */
897 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
898 char ModelDesc[256]; /* Model Description */
899 char ModelName[80]; /* Model Name */
900 char ProgramType[256]; /* Program Type */
901 char Port[20]; /* Port No */
902 uint8_t vpd_flag; /* VPD data flag */
904 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
905 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
906 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
907 #define VPD_PORT 0x8 /* valid vpd port data */
908 #define VPD_MASK 0xf /* mask for any vpd data */
910 uint8_t soft_wwn_enable;
912 struct timer_list fcp_poll_timer;
913 struct timer_list eratt_poll;
914 uint32_t eratt_poll_interval;
916 /*
917 * stat counters
918 */
919 atomic_t fc4ScsiInputRequests;
920 atomic_t fc4ScsiOutputRequests;
921 atomic_t fc4ScsiControlRequests;
922 atomic_t fc4ScsiIoCmpls;
924 uint64_t bg_guard_err_cnt;
925 uint64_t bg_apptag_err_cnt;
926 uint64_t bg_reftag_err_cnt;
928 /* fastpath list. */
929 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
930 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
931 struct list_head lpfc_scsi_buf_list_get;
932 struct list_head lpfc_scsi_buf_list_put;
933 uint32_t total_scsi_bufs;
934 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
935 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
936 struct list_head lpfc_nvme_buf_list_get;
937 struct list_head lpfc_nvme_buf_list_put;
938 uint32_t total_nvme_bufs;
939 uint32_t get_nvme_bufs;
940 uint32_t put_nvme_bufs;
941 struct list_head lpfc_iocb_list;
942 uint32_t total_iocbq_bufs;
943 struct list_head active_rrq_list;
944 spinlock_t hbalock;
946 /* dma_mem_pools */
947 struct dma_pool *lpfc_sg_dma_buf_pool;
948 struct dma_pool *lpfc_mbuf_pool;
949 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
950 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
951 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
952 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
953 struct dma_pool *txrdy_payload_pool;
954 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
956 mempool_t *mbox_mem_pool;
957 mempool_t *nlp_mem_pool;
958 mempool_t *rrq_pool;
959 mempool_t *active_rrq_pool;
961 struct fc_host_statistics link_stats;
962 enum intr_type_t intr_type;
963 uint32_t intr_mode;
964 #define LPFC_INTR_ERROR 0xFFFFFFFF
965 struct list_head port_list;
966 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
967 uint16_t max_vpi; /* Maximum virtual nports */
968 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
969 uint16_t max_vports; /*
970 * For IOV HBAs max_vpi can change
971 * after a reset. max_vports is max
972 * number of vports present. This can
973 * be greater than max_vpi.
974 */
975 uint16_t vpi_base;
976 uint16_t vfi_base;
977 unsigned long *vpi_bmask; /* vpi allocation table */
978 uint16_t *vpi_ids;
979 uint16_t vpi_count;
980 struct list_head lpfc_vpi_blk_list;
982 /* Data structure used by fabric iocb scheduler */
983 struct list_head fabric_iocb_list;
984 atomic_t fabric_iocb_count;
985 struct timer_list fabric_block_timer;
986 unsigned long bit_flags;
987 #define FABRIC_COMANDS_BLOCKED 0
988 atomic_t num_rsrc_err;
989 atomic_t num_cmd_success;
990 unsigned long last_rsrc_error_time;
991 unsigned long last_ramp_down_time;
992 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
993 struct dentry *hba_debugfs_root;
994 atomic_t debugfs_vport_count;
995 struct dentry *debug_hbqinfo;
996 struct dentry *debug_dumpHostSlim;
997 struct dentry *debug_dumpHBASlim;
998 struct dentry *debug_dumpData; /* BlockGuard BPL */
999 struct dentry *debug_dumpDif; /* BlockGuard BPL */
1000 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
1001 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1002 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
1003 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1004 struct dentry *debug_writeApp; /* inject write app_tag errors */
1005 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1006 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1007 struct dentry *debug_readApp; /* inject read app_tag errors */
1008 struct dentry *debug_readRef; /* inject read ref_tag errors */
1010 struct dentry *debug_nvmeio_trc;
1011 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1012 atomic_t nvmeio_trc_cnt;
1013 uint32_t nvmeio_trc_size;
1014 uint32_t nvmeio_trc_output_idx;
1016 /* T10 DIF error injection */
1017 uint32_t lpfc_injerr_wgrd_cnt;
1018 uint32_t lpfc_injerr_wapp_cnt;
1019 uint32_t lpfc_injerr_wref_cnt;
1020 uint32_t lpfc_injerr_rgrd_cnt;
1021 uint32_t lpfc_injerr_rapp_cnt;
1022 uint32_t lpfc_injerr_rref_cnt;
1023 uint32_t lpfc_injerr_nportid;
1024 struct lpfc_name lpfc_injerr_wwpn;
1025 sector_t lpfc_injerr_lba;
1026 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1028 struct dentry *debug_slow_ring_trc;
1029 struct lpfc_debugfs_trc *slow_ring_trc;
1030 atomic_t slow_ring_trc_cnt;
1031 /* iDiag debugfs sub-directory */
1032 struct dentry *idiag_root;
1033 struct dentry *idiag_pci_cfg;
1034 struct dentry *idiag_bar_acc;
1035 struct dentry *idiag_que_info;
1036 struct dentry *idiag_que_acc;
1037 struct dentry *idiag_drb_acc;
1038 struct dentry *idiag_ctl_acc;
1039 struct dentry *idiag_mbx_acc;
1040 struct dentry *idiag_ext_acc;
1041 uint8_t lpfc_idiag_last_eq;
1042 #endif
1043 uint16_t nvmeio_trc_on;
1045 /* Used for deferred freeing of ELS data buffers */
1046 struct list_head elsbuf;
1047 int elsbuf_cnt;
1048 int elsbuf_prev_cnt;
1050 uint8_t temp_sensor_support;
1051 /* Fields used for heart beat. */
1052 unsigned long last_eqdelay_time;
1053 unsigned long last_completion_time;
1054 unsigned long skipped_hb;
1055 struct timer_list hb_tmofunc;
1056 uint8_t hb_outstanding;
1057 struct timer_list rrq_tmr;
1058 enum hba_temp_state over_temp_state;
1059 /* ndlp reference management */
1060 spinlock_t ndlp_lock;
1061 /*
1062 * Following bit will be set for all buffer tags which are not
1063 * associated with any HBQ.
1064 */
1065 #define QUE_BUFTAG_BIT (1<<31)
1066 uint32_t buffer_tag_count;
1067 int wait_4_mlo_maint_flg;
1068 wait_queue_head_t wait_4_mlo_m_q;
1069 /* data structure used for latency data collection */
1070 #define LPFC_NO_BUCKET 0
1071 #define LPFC_LINEAR_BUCKET 1
1072 #define LPFC_POWER2_BUCKET 2
1073 uint8_t bucket_type;
1074 uint32_t bucket_base;
1075 uint32_t bucket_step;
1077 /* Maximum number of events that can be outstanding at any time*/
1078 #define LPFC_MAX_EVT_COUNT 512
1079 atomic_t fast_event_count;
1080 uint32_t fcoe_eventtag;
1081 uint32_t fcoe_eventtag_at_fcf_scan;
1082 uint32_t fcoe_cvl_eventtag;
1083 uint32_t fcoe_cvl_eventtag_attn;
1084 struct lpfc_fcf fcf;
1085 uint8_t fc_map[3];
1086 uint8_t valid_vlan;
1087 uint16_t vlan_id;
1088 struct list_head fcf_conn_rec_list;
1090 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1091 struct list_head ct_ev_waiters;
1092 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1093 uint32_t ctx_idx;
1095 uint8_t menlo_flag; /* menlo generic flags */
1096 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1097 uint32_t iocb_cnt;
1098 uint32_t iocb_max;
1099 atomic_t sdev_cnt;
1100 uint8_t fips_spec_rev;
1101 uint8_t fips_level;
1102 spinlock_t devicelock; /* lock for luns list */
1103 mempool_t *device_data_mem_pool;
1104 struct list_head luns;
1105 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1106 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1107 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1108 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1109 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1110 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1111 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1112 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1113 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1114 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1115 uint16_t sfp_alarm;
1116 uint16_t sfp_warning;
1118 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1119 #define LPFC_CHECK_CPU_CNT 32
1120 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1121 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1122 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1123 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1124 uint16_t cpucheck_on;
1125 #define LPFC_CHECK_OFF 0
1126 #define LPFC_CHECK_NVME_IO 1
1127 #define LPFC_CHECK_NVMET_RCV 2
1128 #define LPFC_CHECK_NVMET_IO 4
1129 uint16_t ktime_on;
1130 uint64_t ktime_data_samples;
1131 uint64_t ktime_status_samples;
1132 uint64_t ktime_last_cmd;
1133 uint64_t ktime_seg1_total;
1134 uint64_t ktime_seg1_min;
1135 uint64_t ktime_seg1_max;
1136 uint64_t ktime_seg2_total;
1137 uint64_t ktime_seg2_min;
1138 uint64_t ktime_seg2_max;
1139 uint64_t ktime_seg3_total;
1140 uint64_t ktime_seg3_min;
1141 uint64_t ktime_seg3_max;
1142 uint64_t ktime_seg4_total;
1143 uint64_t ktime_seg4_min;
1144 uint64_t ktime_seg4_max;
1145 uint64_t ktime_seg5_total;
1146 uint64_t ktime_seg5_min;
1147 uint64_t ktime_seg5_max;
1148 uint64_t ktime_seg6_total;
1149 uint64_t ktime_seg6_min;
1150 uint64_t ktime_seg6_max;
1151 uint64_t ktime_seg7_total;
1152 uint64_t ktime_seg7_min;
1153 uint64_t ktime_seg7_max;
1154 uint64_t ktime_seg8_total;
1155 uint64_t ktime_seg8_min;
1156 uint64_t ktime_seg8_max;
1157 uint64_t ktime_seg9_total;
1158 uint64_t ktime_seg9_min;
1159 uint64_t ktime_seg9_max;
1160 uint64_t ktime_seg10_total;
1161 uint64_t ktime_seg10_min;
1162 uint64_t ktime_seg10_max;
1163 #endif
1164 };
1166 static inline struct Scsi_Host *
1167 lpfc_shost_from_vport(struct lpfc_vport *vport)
1168 {
1169 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1170 }
1172 static inline void
1173 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1174 {
1175 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1176 phba->link_flag |= LS_LOOPBACK_MODE;
1177 else
1178 phba->link_flag &= ~LS_LOOPBACK_MODE;
1179 }
1181 static inline int
1182 lpfc_is_link_up(struct lpfc_hba *phba)
1183 {
1184 return phba->link_state == LPFC_LINK_UP ||
1185 phba->link_state == LPFC_CLEAR_LA ||
1186 phba->link_state == LPFC_HBA_READY;
1187 }
1189 static inline void
1190 lpfc_worker_wake_up(struct lpfc_hba *phba)
1191 {
1192 /* Set the lpfc data pending flag */
1193 set_bit(LPFC_DATA_READY, &phba->data_flags);
1195 /* Wake up worker thread */
1196 wake_up(&phba->work_waitq);
1197 return;
1198 }
1200 static inline int
1201 lpfc_readl(void __iomem *addr, uint32_t *data)
1202 {
1203 uint32_t temp;
1204 temp = readl(addr);
1205 if (temp == 0xffffffff)
1206 return -EIO;
1207 *data = temp;
1208 return 0;
1209 }
1211 static inline int
1212 lpfc_sli_read_hs(struct lpfc_hba *phba)
1213 {
1214 /*
1215 * There was a link/board error. Read the status register to retrieve
1216 * the error event and process it.
1217 */
1218 phba->sli.slistat.err_attn_event++;
1220 /* Save status info and check for unplug error */
1221 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1222 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1223 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1224 return -EIO;
1225 }
1227 /* Clear chip Host Attention error bit */
1228 writel(HA_ERATT, phba->HAregaddr);
1229 readl(phba->HAregaddr); /* flush */
1230 phba->pport->stopped = 1;
1232 return 0;
1233 }
1235 static inline struct lpfc_sli_ring *
1236 lpfc_phba_elsring(struct lpfc_hba *phba)
1237 {
1238 if (phba->sli_rev == LPFC_SLI_REV4) {
1239 if (phba->sli4_hba.els_wq)
1240 return phba->sli4_hba.els_wq->pring;
1241 else
1242 return NULL;
1243 }
1244 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1245 }