1 /* SPDX-License-Identifier: GPL-2.0 */
2 /**
3 * PRU-ICSS Subsystem user interfaces
4 *
5 * Copyright (C) 2015-2019 Texas Instruments Incorporated - http://www.ti.com
6 * Suman Anna <s-anna@ti.com>
7 * Tero Kristo <t-kristo@ti.com>
8 */
10 #ifndef __LINUX_PRUSS_H
11 #define __LINUX_PRUSS_H
13 /*
14 * PRU_ICSS_CFG registers
15 * SYSCFG, ISRP, ISP, IESP, IECP, SCRP applicable on AMxxxx devices only
16 */
17 #define PRUSS_CFG_REVID 0x00
18 #define PRUSS_CFG_SYSCFG 0x04
19 #define PRUSS_CFG_GPCFG(x) (0x08 + (x) * 4)
20 #define PRUSS_CFG_CGR 0x10
21 #define PRUSS_CFG_ISRP 0x14
22 #define PRUSS_CFG_ISP 0x18
23 #define PRUSS_CFG_IESP 0x1C
24 #define PRUSS_CFG_IECP 0x20
25 #define PRUSS_CFG_SCRP 0x24
26 #define PRUSS_CFG_PMAO 0x28
27 #define PRUSS_CFG_MII_RT 0x2C
28 #define PRUSS_CFG_IEPCLK 0x30
29 #define PRUSS_CFG_SPP 0x34
30 #define PRUSS_CFG_PIN_MX 0x40
32 /* PRUSS_GPCFG register bits */
33 #define PRUSS_GPCFG_PRU_GPO_SH_SEL BIT(25)
35 #define PRUSS_GPCFG_PRU_DIV1_SHIFT 20
36 #define PRUSS_GPCFG_PRU_DIV1_MASK GENMASK(24, 20)
38 #define PRUSS_GPCFG_PRU_DIV0_SHIFT 15
39 #define PRUSS_GPCFG_PRU_DIV0_MASK GENMASK(15, 19)
41 #define PRUSS_GPCFG_PRU_GPO_MODE BIT(14)
42 #define PRUSS_GPCFG_PRU_GPO_MODE_DIRECT 0
43 #define PRUSS_GPCFG_PRU_GPO_MODE_SERIAL BIT(14)
45 #define PRUSS_GPCFG_PRU_GPI_SB BIT(13)
47 #define PRUSS_GPCFG_PRU_GPI_DIV1_SHIFT 8
48 #define PRUSS_GPCFG_PRU_GPI_DIV1_MASK GENMASK(12, 8)
50 #define PRUSS_GPCFG_PRU_GPI_DIV0_SHIFT 3
51 #define PRUSS_GPCFG_PRU_GPI_DIV0_MASK GENMASK(7, 3)
53 #define PRUSS_GPCFG_PRU_GPI_CLK_MODE_POSITIVE 0
54 #define PRUSS_GPCFG_PRU_GPI_CLK_MODE_NEGATIVE BIT(2)
55 #define PRUSS_GPCFG_PRU_GPI_CLK_MODE BIT(2)
57 #define PRUSS_GPCFG_PRU_GPI_MODE_MASK GENMASK(1, 0)
58 #define PRUSS_GPCFG_PRU_GPI_MODE_SHIFT 0
60 #define PRUSS_GPCFG_PRU_MUX_SEL_SHIFT 26
61 #define PRUSS_GPCFG_PRU_MUX_SEL_MASK GENMASK(29, 26)
63 /* PRUSS_MII_RT register bits */
64 #define PRUSS_MII_RT_EVENT_EN BIT(0)
66 /* PRUSS_SPP register bits */
67 #define PRUSS_SPP_XFER_SHIFT_EN BIT(1)
68 #define PRUSS_SPP_PRU1_PAD_HP_EN BIT(0)
70 /**
71 * enum pruss_gp_mux_sel - PRUSS GPI/O Mux modes for the
72 * PRUSS_GPCFG0/1 registers
73 *
74 * NOTE: The below defines are the most common values, but there
75 * are some exceptions like on 66AK2G, where the RESERVED and MII2
76 * values are interchanged. Also, this bit-field does not exist on
77 * AM335x SoCs
78 */
79 enum pruss_gp_mux_sel {
80 PRUSS_GP_MUX_SEL_GP = 0,
81 PRUSS_GP_MUX_SEL_ENDAT,
82 PRUSS_GP_MUX_SEL_RESERVED,
83 PRUSS_GP_MUX_SEL_SD,
84 PRUSS_GP_MUX_SEL_MII2,
85 PRUSS_GP_MUX_SEL_MAX,
86 };
88 /**
89 * enum pruss_gpi_mode - PRUSS GPI configuration modes, used
90 * to program the PRUSS_GPCFG0/1 registers
91 */
92 enum pruss_gpi_mode {
93 PRUSS_GPI_MODE_DIRECT = 0,
94 PRUSS_GPI_MODE_PARALLEL,
95 PRUSS_GPI_MODE_28BIT_SHIFT,
96 PRUSS_GPI_MODE_MII,
97 };
99 /**
100 * enum pruss_syscon - PRUSS sub-module syscon identifiers
101 */
102 enum pruss_syscon {
103 PRUSS_SYSCON_CFG = 0,
104 PRUSS_SYSCON_IEP,
105 PRUSS_SYSCON_MII_RT,
106 PRUSS_SYSCON_MAX,
107 };
109 /**
110 * enum pruss_pru_id - PRU core identifiers
111 */
112 enum pruss_pru_id {
113 PRUSS_PRU0 = 0,
114 PRUSS_PRU1,
115 PRUSS_NUM_PRUS,
116 };
118 /**
119 * enum pru_ctable_idx - Configurable Constant table index identifiers
120 */
121 enum pru_ctable_idx {
122 PRU_C24 = 0,
123 PRU_C25,
124 PRU_C26,
125 PRU_C27,
126 PRU_C28,
127 PRU_C29,
128 PRU_C30,
129 PRU_C31,
130 };
132 /**
133 * enum pruss_mem - PRUSS memory range identifiers
134 */
135 enum pruss_mem {
136 PRUSS_MEM_DRAM0 = 0,
137 PRUSS_MEM_DRAM1,
138 PRUSS_MEM_SHRD_RAM2,
139 PRUSS_MEM_MAX,
140 };
142 /**
143 * struct pruss_mem_region - PRUSS memory region structure
144 * @va: kernel virtual address of the PRUSS memory region
145 * @pa: physical (bus) address of the PRUSS memory region
146 * @size: size of the PRUSS memory region
147 */
148 struct pruss_mem_region {
149 void __iomem *va;
150 phys_addr_t pa;
151 size_t size;
152 };
154 struct rproc;
155 struct pruss;
157 #if IS_ENABLED(CONFIG_TI_PRUSS)
159 struct pruss *pruss_get(struct rproc *rproc);
160 void pruss_put(struct pruss *pruss);
161 int pruss_request_mem_region(struct pruss *pruss, enum pruss_mem mem_id,
162 struct pruss_mem_region *region);
163 int pruss_release_mem_region(struct pruss *pruss,
164 struct pruss_mem_region *region);
165 int pruss_regmap_read(struct pruss *pruss, enum pruss_syscon mod,
166 unsigned int reg, unsigned int *val);
167 int pruss_regmap_update(struct pruss *pruss, enum pruss_syscon mod,
168 unsigned int reg, unsigned int mask, unsigned int val);
169 int pruss_intc_trigger(unsigned int irq);
171 #else
173 static inline struct pruss *pruss_get(struct rproc *rproc)
174 {
175 return ERR_PTR(-ENOTSUPP);
176 }
178 static inline void pruss_put(struct pruss *pruss) { }
180 static inline int pruss_request_mem_region(struct pruss *pruss,
181 enum pruss_mem mem_id,
182 struct pruss_mem_region *region)
183 {
184 return -ENOTSUPP;
185 }
187 static inline int pruss_release_mem_region(struct pruss *pruss,
188 struct pruss_mem_region *region)
189 {
190 return -ENOTSUPP;
191 }
193 static inline int pruss_regmap_read(struct pruss *pruss, enum pruss_syscon mod,
194 unsigned int reg, unsigned int *val)
195 {
196 return -ENOTSUPP;
197 }
199 static inline int pruss_regmap_update(struct pruss *pruss,
200 enum pruss_syscon mod, unsigned int reg,
201 unsigned int mask, unsigned int val)
202 {
203 return -ENOTSUPP;
204 }
206 static inline int pruss_intc_trigger(unsigned int irq)
207 {
208 return -ENOTSUPP;
209 }
211 #endif /* CONFIG_TI_PRUSS */
213 #if IS_ENABLED(CONFIG_PRU_REMOTEPROC)
215 struct rproc *pru_rproc_get(struct device_node *node, int index);
216 void pru_rproc_put(struct rproc *rproc);
217 enum pruss_pru_id pru_rproc_get_id(struct rproc *rproc);
218 int pru_rproc_set_ctable(struct rproc *rproc, enum pru_ctable_idx c, u32 addr);
220 #else
222 static inline struct rproc *pru_rproc_get(struct device_node *node, int index)
223 {
224 return ERR_PTR(-ENOTSUPP);
225 }
227 static inline void pru_rproc_put(struct rproc *rproc) { }
229 static inline enum pruss_pru_id pru_rproc_get_id(struct rproc *rproc)
230 {
231 return -ENOTSUPP;
232 }
234 static inline int pru_rproc_set_ctable(struct rproc *rproc,
235 enum pru_ctable_idx c, u32 addr)
236 {
237 return -ENOTSUPP;
238 }
240 #endif /* CONFIG_PRU_REMOTEPROC */
242 /**
243 * pruss_cfg_gpimode() - set the GPI mode of the PRU
244 * @pruss: the pruss instance handle
245 * @pru: the rproc instance handle of the PRU
246 * @mode: GPI mode to set
247 *
248 * Sets the GPI mode for a given PRU by programming the
249 * corresponding PRUSS_CFG_GPCFGx register
250 *
251 * Returns 0 on success, or an error code otherwise
252 */
253 static inline int pruss_cfg_gpimode(struct pruss *pruss, struct rproc *pru,
254 enum pruss_gpi_mode mode)
255 {
256 enum pruss_pru_id id = pru_rproc_get_id(pru);
258 if (id < 0)
259 return -EINVAL;
261 return pruss_regmap_update(pruss, PRUSS_SYSCON_CFG, PRUSS_CFG_GPCFG(id),
262 PRUSS_GPCFG_PRU_GPI_MODE_MASK,
263 mode << PRUSS_GPCFG_PRU_GPI_MODE_SHIFT);
264 }
266 /**
267 * pruss_cfg_miirt_enable() - Enable/disable MII RT Events
268 * @pruss: the pruss instance
269 * @enable: enable/disable
270 *
271 * Enable/disable the MII RT Events for the PRUSS.
272 */
273 static inline int pruss_cfg_miirt_enable(struct pruss *pruss, bool enable)
274 {
275 u32 set = enable ? PRUSS_MII_RT_EVENT_EN : 0;
277 return pruss_regmap_update(pruss, PRUSS_SYSCON_CFG, PRUSS_CFG_MII_RT,
278 PRUSS_MII_RT_EVENT_EN, set);
279 }
281 /**
282 * pruss_cfg_xfr_enable() - Enable/disable XIN XOUT shift functionality
283 * @pruss: the pruss instance
284 * @enable: enable/disable
285 */
286 static inline int pruss_cfg_xfr_enable(struct pruss *pruss, bool enable)
287 {
288 u32 set = enable ? PRUSS_SPP_XFER_SHIFT_EN : 0;
290 return pruss_regmap_update(pruss, PRUSS_SYSCON_CFG, PRUSS_CFG_SPP,
291 PRUSS_SPP_XFER_SHIFT_EN, set);
292 }
294 #endif /* __LINUX_PRUSS_H */