index 2664ba29f61ecc88a4dcaca7a6131db6bca9eb7c..3d993ec1f5ea3bb8c90ef5b1a71c22dc632b1a82 100644 (file)
dev_err(dev, "unable to enable cores for TCM loading, ret = %d\n",
ret);
+ /*
+ * Zero out both TCMs unconditionally (access from v8 Arm core is not
+ * affected by ATCM & BTCM enable configuration values) so that ECC
+ * can be effective on all TCM addresses.
+ */
+ dev_dbg(dev, "zeroing out ATCM memory\n");
+ memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size);
+
+ dev_dbg(dev, "zeroing out BTCM memory\n");
+ memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size);
+
return ret;
}