author | Arvind Sankar <nivedita@alum.mit.edu> | |
Wed, 11 Nov 2020 16:09:45 +0000 (11:09 -0500) | ||
committer | Borislav Petkov <bp@suse.de> | |
Thu, 10 Dec 2020 11:28:06 +0000 (12:28 +0100) | ||
commit | 29ac40cbed2bc06fa218ca25d7f5e280d3d08a25 | |
tree | c65f56747f027d92cd6ed6e9c4c484f6f2b8ed7c | tree | snapshot (tar.xz tar.gz zip) |
parent | e45cdc71d1fa5ac3a57b23acc31eb959e4f60135 | commit | diff |
x86/mm/mem_encrypt: Fix definition of PMD_FLAGS_DEC_WP
The PAT bit is in different locations for 4k and 2M/1G page table
entries.
Add a definition for _PAGE_LARGE_CACHE_MASK to represent the three
caching bits (PWT, PCD, PAT), similar to _PAGE_CACHE_MASK for 4k pages,
and use it in the definition of PMD_FLAGS_DEC_WP to get the correct PAT
index for write-protected pages.
Fixes: 6ebcb060713f ("x86/mm: Add support to encrypt the kernel in-place")
Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20201111160946.147341-1-nivedita@alum.mit.edu
The PAT bit is in different locations for 4k and 2M/1G page table
entries.
Add a definition for _PAGE_LARGE_CACHE_MASK to represent the three
caching bits (PWT, PCD, PAT), similar to _PAGE_CACHE_MASK for 4k pages,
and use it in the definition of PMD_FLAGS_DEC_WP to get the correct PAT
index for write-protected pages.
Fixes: 6ebcb060713f ("x86/mm: Add support to encrypt the kernel in-place")
Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20201111160946.147341-1-nivedita@alum.mit.edu
arch/x86/include/asm/pgtable_types.h | diff | blob | history | |
arch/x86/mm/mem_encrypt_identity.c | diff | blob | history |