author | Suman Anna <s-anna@ti.com> | |
Fri, 5 Dec 2014 00:46:56 +0000 (18:46 -0600) | ||
committer | Suman Anna <s-anna@ti.com> | |
Sun, 24 Feb 2019 01:20:50 +0000 (19:20 -0600) | ||
commit | 7b93421db839443f0345e2d462817f8d9545c961 | |
tree | 1bb7f2aab9db717ba16630370919bd843c47a3be | tree | snapshot (tar.xz tar.gz zip) |
parent | 7dec673e8655483504c4a2d93c136274dbf4a3fd | commit | diff |
ARM: DRA7: hwmod_data: Add PRU-ICSS data for AM57xx variants
The AM57xx family of SoCs have two PRU-ICSS remote processor
subsystems, each supporting two PRU processor cores. These
subsystems are not supported on the DRA7 family of SOCs. They
are very similar to the respective processor subsystems on
AM33xx/AM43xx SoCs except for a few differences. The relevant
hwmod classes and data structures have been added for the
PRU-ICSS1 and PRU-ICSS2 subsystems to enable support for
these on the AM57xx SoC variants.
Do note that these subsystems do not have a programmable module
reset line unlike those present in AM33xx/AM43xx. The modules
are reset just like any other IP with the SoC's global cold/warm
resets.
Signed-off-by: Suman Anna <s-anna@ti.com>
The AM57xx family of SoCs have two PRU-ICSS remote processor
subsystems, each supporting two PRU processor cores. These
subsystems are not supported on the DRA7 family of SOCs. They
are very similar to the respective processor subsystems on
AM33xx/AM43xx SoCs except for a few differences. The relevant
hwmod classes and data structures have been added for the
PRU-ICSS1 and PRU-ICSS2 subsystems to enable support for
these on the AM57xx SoC variants.
Do note that these subsystems do not have a programmable module
reset line unlike those present in AM33xx/AM43xx. The modules
are reset just like any other IP with the SoC's global cold/warm
resets.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | diff | blob | history |