| author | Suman Anna <s-anna@ti.com> | |
| Thu, 21 Feb 2019 01:50:26 +0000 (19:50 -0600) | ||
| committer | Suman Anna <s-anna@ti.com> | |
| Mon, 25 Feb 2019 19:15:11 +0000 (13:15 -0600) | ||
| commit | c83cdcc071ab25af9d79ba1eabc7661e83704c13 | |
| tree | e0a8a54a492189caee1a0201a0db303b35ce7257 | tree | snapshot (tar.xz tar.gz zip) |
| parent | fdd282aaa0e3e5c05cbca4f97479024b59fe9973 | commit | diff |
dt-bindings: irqchip: pruss-intc: Update bindings for K3 AM65x SoCs
The K3 AM65x SoCs have the next generation of the PRU-ICSS IP, commonly
called ICSSG. The ICSSG interrupt controller on K3 SoCs provide a higher
number of host interrupts (20 vs 10) and can handle an increased number
of input events (160 vs 64) from various SoC interrupt sources. Update
the PRUSS interrupt controller binings for these newer generarion ICSSG
instances.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 AM65x SoCs have the next generation of the PRU-ICSS IP, commonly
called ICSSG. The ICSSG interrupt controller on K3 SoCs provide a higher
number of host interrupts (20 vs 10) and can handle an increased number
of input events (160 vs 64) from various SoC interrupt sources. Update
the PRUSS interrupt controller binings for these newer generarion ICSSG
instances.
Signed-off-by: Suman Anna <s-anna@ti.com>
| Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.txt | diff | blob | history |