summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 26e32f3)
raw | patch | inline | side by side (parent: 26e32f3)
author | Suman Anna <s-anna@ti.com> | |
Fri, 28 Jun 2019 17:03:41 +0000 (12:03 -0500) | ||
committer | Suman Anna <s-anna@ti.com> | |
Mon, 1 Jul 2019 16:48:02 +0000 (11:48 -0500) |
The PRUSS INTC configuration code is currently using hard-coded numbers
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
directly for performing arithmatic operations on the Channel Map Registers
(CMRs) and Host Interrupt Map Registers (HMRs). Introduce and replace
these numbers with human readable macros.
While at this, use the modulo operator instead of bitwise-and for
the bit offset computation for the events and channels in CMR and
HMR registers.
Signed-off-by: Suman Anna <s-anna@ti.com>
drivers/irqchip/irq-pruss-intc.c | patch | blob | history |
index b3c63ea3d3b59523d97f4aef0b89256778b57ebc..2bd2498ac3898c805e83f7df6542eeda2e1f4192 100644 (file)
#define PRU_INTC_HINLR(x) (0x1100 + (x) * 4)
#define PRU_INTC_HIER 0x1500
+/* CMR register bit-field macros */
+#define CMR_EVT_MAP_MASK 0xf
+#define CMR_EVT_MAP_BITS 8
+#define CMR_EVT_PER_REG 4
+
+/* HMR register bit-field macros */
+#define HMR_CH_MAP_MASK 0xf
+#define HMR_CH_MAP_BITS 8
+#define HMR_CH_PER_REG 4
+
/* HIPIR register bit-fields */
#define INTC_HIPIR_NONE_HINT 0x80000000
intc->config_map.sysev_to_ch[i] = ch;
- idx = i / 4;
+ idx = i / CMR_EVT_PER_REG;
val = pruss_intc_read_reg(intc, PRU_INTC_CMR(idx));
- val |= ch << ((i & 3) * 8);
+ val |= ch << ((i % CMR_EVT_PER_REG) * CMR_EVT_MAP_BITS);
pruss_intc_write_reg(intc, PRU_INTC_CMR(idx), val);
sysevt_mask |= BIT_ULL(i);
ch_mask |= BIT(ch);
intc->config_map.ch_to_host[i] = host;
- idx = i / 4;
+ idx = i / HMR_CH_PER_REG;
val = pruss_intc_read_reg(intc, PRU_INTC_HMR(idx));
- val |= host << ((i & 3) * 8);
+ val |= host << ((i % HMR_CH_PER_REG) * HMR_CH_MAP_BITS);
pruss_intc_write_reg(intc, PRU_INTC_HMR(idx), val);
ch_mask |= BIT(i);
}
/* find programmed channel */
- ch = pruss_intc_read_reg(intc, PRU_INTC_CMR(data->hwirq / 4));
- ch >>= (data->hwirq % 4) * 8;
- ch &= 0xf;
+ ch = pruss_intc_read_reg(intc,
+ PRU_INTC_CMR(data->hwirq / CMR_EVT_PER_REG));
+ ch >>= (data->hwirq % CMR_EVT_PER_REG) * CMR_EVT_MAP_BITS;
+ ch &= CMR_EVT_MAP_MASK;
/* find programmed host interrupt */
- host = pruss_intc_read_reg(intc, PRU_INTC_HMR(ch / 4));
- host >>= (ch % 4) * 8;
- host &= 0xf;
+ host = pruss_intc_read_reg(intc, PRU_INTC_HMR(ch / HMR_CH_MAP_BITS));
+ host >>= (ch % HMR_CH_PER_REG) * HMR_CH_MAP_BITS;
+ host &= HMR_CH_MAP_MASK;
/* check programmed configuration for sanity */
if (ch != sch || host != shost) {