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raw | patch | inline | side by side (parent: 427241a)
| author | Suman Anna <s-anna@ti.com> | |
| Thu, 21 Feb 2019 03:09:32 +0000 (21:09 -0600) | ||
| committer | Suman Anna <s-anna@ti.com> | |
| Mon, 25 Feb 2019 19:31:39 +0000 (13:31 -0600) |
Add the DT nodes for the ICSSG0, ICSSG1 and ICSSG2 processor subsystems
that are present on the K3 AM65x SoCs. The three ICSSGs are identical
to each other for the most part, with the ICSSG2 supporting slightly
enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance
is represented by a pruss-soc-bus node and a child PRUSS subsystem node.
These nodes are enabled by default.
The ICSSGs on K3 AM65x SoCs are super-sets of the PRUSS on the AM57xx/
6AK2G SoCs except for larger Shared Data RAM and the lack of a PRU-ICSS
crossbar. They include two auxiliary PRU cores called RTUs and few other
additional sub-modules. The interrupt integration is also different on
the K3 AM65x SoCs and are propagated through various SoC-level Interrupt
Router and Interrupt Aggregator blocks.
The ICSSG subsystem node contains the entire address space and the
various interrupts generated towards the main MPU. The various
sub-modules of the ICSSG are represented as individual child
nodes (so platform devices themselves) of the PRUSS subsystem node.
These include the two PRU cores and the interrupt controller. The
Industrial Ethernet Peripheral (IEP), the Real Time Media Independent
Interface controller (MII_RT), and the CFG sub-module are represented
as syscon nodes. All the Data RAMs are represented within a child
node of its own named 'memories' without any compatible.
The DT nodes use all standard properties. The regs property in the
PRU/RTU nodes define the addresses for the Instruction RAM, the Debug
and Control sub-modules for that PRU core. The firmware for each
PRU/RTU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU and RTU core
are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core: am65x-pru0_0-fw ; ICSSG0 RTU0 Core: am65x-rtu0_0-fw
ICSSG0 PRU1 Core: am65x-pru0_1-fw ; ICSSG0 RTU1 Core: am65x-rtu0_1-fw
ICSSG1 PRU0 Core: am65x-pru1_0-fw ; ICSSG1 RTU0 Core: am65x-rtu1_0-fw
ICSSG1 PRU1 Core: am65x-pru1_1-fw ; ICSSG1 RTU1 Core: am65x-rtu1_1-fw
ICSSG2 PRU0 Core: am65x-pru2_0-fw ; ICSSG2 RTU0 Core: am65x-rtu2_0-fw
ICSSG2 PRU1 Core: am65x-pru2_1-fw ; ICSSG2 RTU1 Core: am65x-rtu2_1-fw
TODO:
Add sub-nodes for new additional sub-modules like IEP2, MII_RT2 etc.
Signed-off-by: Suman Anna <s-anna@ti.com>
that are present on the K3 AM65x SoCs. The three ICSSGs are identical
to each other for the most part, with the ICSSG2 supporting slightly
enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance
is represented by a pruss-soc-bus node and a child PRUSS subsystem node.
These nodes are enabled by default.
The ICSSGs on K3 AM65x SoCs are super-sets of the PRUSS on the AM57xx/
6AK2G SoCs except for larger Shared Data RAM and the lack of a PRU-ICSS
crossbar. They include two auxiliary PRU cores called RTUs and few other
additional sub-modules. The interrupt integration is also different on
the K3 AM65x SoCs and are propagated through various SoC-level Interrupt
Router and Interrupt Aggregator blocks.
The ICSSG subsystem node contains the entire address space and the
various interrupts generated towards the main MPU. The various
sub-modules of the ICSSG are represented as individual child
nodes (so platform devices themselves) of the PRUSS subsystem node.
These include the two PRU cores and the interrupt controller. The
Industrial Ethernet Peripheral (IEP), the Real Time Media Independent
Interface controller (MII_RT), and the CFG sub-module are represented
as syscon nodes. All the Data RAMs are represented within a child
node of its own named 'memories' without any compatible.
The DT nodes use all standard properties. The regs property in the
PRU/RTU nodes define the addresses for the Instruction RAM, the Debug
and Control sub-modules for that PRU core. The firmware for each
PRU/RTU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU and RTU core
are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core: am65x-pru0_0-fw ; ICSSG0 RTU0 Core: am65x-rtu0_0-fw
ICSSG0 PRU1 Core: am65x-pru0_1-fw ; ICSSG0 RTU1 Core: am65x-rtu0_1-fw
ICSSG1 PRU0 Core: am65x-pru1_0-fw ; ICSSG1 RTU0 Core: am65x-rtu1_0-fw
ICSSG1 PRU1 Core: am65x-pru1_1-fw ; ICSSG1 RTU1 Core: am65x-rtu1_1-fw
ICSSG2 PRU0 Core: am65x-pru2_0-fw ; ICSSG2 RTU0 Core: am65x-rtu2_0-fw
ICSSG2 PRU1 Core: am65x-pru2_1-fw ; ICSSG2 RTU1 Core: am65x-rtu2_1-fw
TODO:
Add sub-nodes for new additional sub-modules like IEP2, MII_RT2 etc.
Signed-off-by: Suman Anna <s-anna@ti.com>
| arch/arm64/boot/dts/ti/k3-am65-main.dtsi | patch | blob | history |
index ea0637a116112584dfc2058c15d890fc9c3e5ae5..d188d1830d20b027a646ac7f838fb92301a0db8a 100644 (file)
ti,mbox-num-fifos = <16>;
status = "disabled";
};
+
+ icssg_soc_bus0: pruss-soc-bus@b026004 {
+ compatible = "ti,am654-icssg-soc-bus";
+ reg = <0x00 0x0b026004 0x00 0x4>;
+ power-domains = <&k3_pds 62>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0b000000 0x00 0x0b000000 0x100000>;
+ dma-ranges;
+
+ icssg0: icssg@b000000 {
+ compatible = "ti,am654-icssg";
+ reg = <0xb000000 0x80000>;
+ interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host2", "host3", "host4",
+ "host5", "host6", "host7",
+ "host8", "host9";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ dma-ranges;
+
+ icssg0_mem: memories@b000000 {
+ reg = <0xb000000 0x2000>,
+ <0xb002000 0x2000>,
+ <0xb010000 0x10000>;
+ reg-names = "dram0", "dram1",
+ "shrdram2";
+ };
+
+ icssg0_cfg: cfg@b026000 {
+ compatible = "syscon";
+ reg = <0xb026000 0x200>;
+ };
+
+ icssg0_iep: iep@b02e000 {
+ compatible = "syscon";
+ reg = <0xb02e000 0x1000>;
+ };
+
+ icssg0_mii_rt: mii-rt@b032000 {
+ compatible = "syscon";
+ reg = <0xb032000 0x100>;
+ };
+
+ icssg0_intc: interrupt-controller@b020000 {
+ compatible = "ti,am654-icssg-intc";
+ reg = <0xb020000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ pru0_0: pru@b034000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb034000 0x4000>,
+ <0xb022000 0x100>,
+ <0xb022400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru0_0-fw";
+ };
+
+ rtu0_0: rtu@b004000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb004000 0x2000>,
+ <0xb023000 0x100>,
+ <0xb023400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu0_0-fw";
+ };
+
+ pru0_1: pru@b038000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb038000 0x4000>,
+ <0xb024000 0x100>,
+ <0xb024400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru0_1-fw";
+ };
+
+ rtu0_1: rtu@b006000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb006000 0x2000>,
+ <0xb023800 0x100>,
+ <0xb023c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu0_1-fw";
+ };
+ };
+ };
+
+ icssg_soc_bus1: pruss-soc-bus@b126004 {
+ compatible = "ti,am654-icssg-soc-bus";
+ reg = <0x00 0x0b126004 0x00 0x4>;
+ power-domains = <&k3_pds 63>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0b100000 0x00 0x0b100000 0x100000>;
+ dma-ranges;
+
+ icssg1: icssg@b100000 {
+ compatible = "ti,am654-icssg";
+ reg = <0xb100000 0x80000>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host2", "host3", "host4",
+ "host5", "host6", "host7",
+ "host8", "host9";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ dma-ranges;
+
+ icssg1_mem: memories@b100000 {
+ reg = <0xb100000 0x2000>,
+ <0xb102000 0x2000>,
+ <0xb110000 0x10000>;
+ reg-names = "dram0", "dram1",
+ "shrdram2";
+ };
+
+ icssg1_cfg: cfg@b126000 {
+ compatible = "syscon";
+ reg = <0xb126000 0x200>;
+ };
+
+ icssg1_iep: iep@b12e000 {
+ compatible = "syscon";
+ reg = <0xb12e000 0x1000>;
+ };
+
+ icssg1_mii_rt: mii-rt@b132000 {
+ compatible = "syscon";
+ reg = <0xb132000 0x100>;
+ };
+
+ icssg1_intc: interrupt-controller@b120000 {
+ compatible = "ti,am654-icssg-intc";
+ reg = <0xb120000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ pru1_0: pru@b134000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb134000 0x4000>,
+ <0xb122000 0x100>,
+ <0xb122400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru1_0-fw";
+ };
+
+ rtu1_0: rtu@b104000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb104000 0x2000>,
+ <0xb123000 0x100>,
+ <0xb123400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu1_0-fw";
+ };
+
+ pru1_1: pru@b138000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb138000 0x4000>,
+ <0xb124000 0x100>,
+ <0xb124400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru1_1-fw";
+ };
+
+ rtu1_1: rtu@b106000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb106000 0x2000>,
+ <0xb123800 0x100>,
+ <0xb123c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu1_1-fw";
+ };
+ };
+ };
+
+ icssg_soc_bus2: pruss-soc-bus@b226004 {
+ compatible = "ti,am654-icssg-soc-bus";
+ reg = <0x00 0x0b226004 0x00 0x4>;
+ power-domains = <&k3_pds 64>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0b200000 0x00 0x0b200000 0x100000>;
+ dma-ranges;
+
+ icssg2: icssg@b200000 {
+ compatible = "ti,am654-icssg";
+ reg = <0xb200000 0x80000>;
+ interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host2", "host3", "host4",
+ "host5", "host6", "host7",
+ "host8", "host9";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ dma-ranges;
+
+ icssg2_mem: memories@b200000 {
+ reg = <0xb200000 0x2000>,
+ <0xb202000 0x2000>,
+ <0xb210000 0x10000>;
+ reg-names = "dram0", "dram1",
+ "shrdram2";
+ };
+
+ icssg2_cfg: cfg@b226000 {
+ compatible = "syscon";
+ reg = <0xb226000 0x200>;
+ };
+
+ icssg2_iep: iep@b22e000 {
+ compatible = "syscon";
+ reg = <0xb22e000 0x1000>;
+ };
+
+ icssg2_mii_rt: mii-rt@b232000 {
+ compatible = "syscon";
+ reg = <0xb232000 0x100>;
+ };
+
+ icssg2_intc: interrupt-controller@b220000 {
+ compatible = "ti,am654-icssg-intc";
+ reg = <0xb220000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ pru2_0: pru@b234000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb234000 0x4000>,
+ <0xb222000 0x100>,
+ <0xb222400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru2_0-fw";
+ };
+
+ rtu2_0: rtu@b204000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb204000 0x2000>,
+ <0xb223000 0x100>,
+ <0xb223400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu2_0-fw";
+ };
+
+ pru2_1: pru@b238000 {
+ compatible = "ti,am654-pru";
+ reg = <0xb238000 0x4000>,
+ <0xb224000 0x100>,
+ <0xb224400 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-pru2_1-fw";
+ };
+
+ rtu2_1: rtu@b206000 {
+ compatible = "ti,am654-rtu";
+ reg = <0xb206000 0x2000>,
+ <0xb223800 0x100>,
+ <0xb223c00 0x100>;
+ reg-names = "iram", "control", "debug";
+ firmware-name = "am65x-rtu2_1-fw";
+ };
+ };
+ };
};