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raw | patch | inline | side by side (parent: 7c4f10a)
author | Oded Gabbay <ogabbay@advaoptical.com> | |
Thu, 27 Jun 2013 16:00:05 +0000 (12:00 -0400) | ||
committer | Chris Ball <cjb@laptop.org> | |
Fri, 5 Jul 2013 16:46:30 +0000 (12:46 -0400) |
This patch adds support of connecting an MMC media using an 8-bit
bus width connection to Freescale's P2020 H/W SDHC controller. During
the probe function, the generic function mmc_of_parse is called to
detect whether the controller is configured with 8-bit bus width.
Also, the generic function detects if the non-removable property is
set in the device tree. The function esdhc_pltfm_bus_width was added
because the bus width configuration is platform specific.
Signed-off-by: Oded Gabbay <ogabbay@advaoptical.com>
Reviewed-by: Anton Vorontsov <anton@enomsg.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
bus width connection to Freescale's P2020 H/W SDHC controller. During
the probe function, the generic function mmc_of_parse is called to
detect whether the controller is configured with 8-bit bus width.
Also, the generic function detects if the non-removable property is
set in the device tree. The function esdhc_pltfm_bus_width was added
because the bus width configuration is platform specific.
Signed-off-by: Oded Gabbay <ogabbay@advaoptical.com>
Reviewed-by: Anton Vorontsov <anton@enomsg.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/sdhci-esdhc.h | patch | blob | history | |
drivers/mmc/host/sdhci-of-esdhc.c | patch | blob | history |
index 6f16406c37cd7e2153d169e6a9429b2114f0d0b4..a2a06420e4635b3904c0cd73f662b21623994de7 100644 (file)
/* pltfm-specific */
#define ESDHC_HOST_CONTROL_LE 0x20
+/*
+ * P2020 interpretation of the SDHCI_HOST_CONTROL register
+ */
+#define ESDHC_CTRL_4BITBUS (0x1 << 1)
+#define ESDHC_CTRL_8BITBUS (0x2 << 1)
+#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
+
/* OF-specific */
#define ESDHC_DMA_SYSCTL 0x40c
#define ESDHC_DMA_SNOOP 0x00000040
index 2b7369729f9190fc04c29fc6f41d43ed0a5b6f67..b2a635e73aee8141cbe137fd48842b5cfa0ed4fc 100644 (file)
* your option) any later version.
*/
+#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/delay.h>
host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
}
+static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
+{
+ u32 ctrl;
+
+ switch (width) {
+ case MMC_BUS_WIDTH_8:
+ ctrl = ESDHC_CTRL_8BITBUS;
+ break;
+
+ case MMC_BUS_WIDTH_4:
+ ctrl = ESDHC_CTRL_4BITBUS;
+ break;
+
+ default:
+ ctrl = 0;
+ break;
+ }
+
+ clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL,
+ ESDHC_CTRL_BUSWIDTH_MASK, ctrl);
+
+ return 0;
+}
+
static const struct sdhci_ops sdhci_esdhc_ops = {
.read_l = esdhc_readl,
.read_w = esdhc_readw,
.platform_resume = esdhc_of_resume,
#endif
.adma_workaround = esdhci_of_adma_workaround,
+ .platform_bus_width = esdhc_pltfm_bus_width,
};
static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
static int sdhci_esdhc_probe(struct platform_device *pdev)
{
- return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata, 0);
+ struct sdhci_host *host;
+ int ret;
+
+ host = sdhci_pltfm_init(pdev, &sdhci_esdhc_pdata, 0);
+ if (IS_ERR(host))
+ return PTR_ERR(host);
+
+ sdhci_get_of_property(pdev);
+
+ /* call to generic mmc_of_parse to support additional capabilities */
+ mmc_of_parse(host->mmc);
+
+ ret = sdhci_add_host(host);
+ if (ret)
+ sdhci_pltfm_free(pdev);
+
+ return ret;
}
static int sdhci_esdhc_remove(struct platform_device *pdev)