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raw | patch | inline | side by side (parent: 8af9113)
author | Suman Anna <s-anna@ti.com> | |
Tue, 5 Aug 2014 21:12:01 +0000 (16:12 -0500) | ||
committer | Suman Anna <s-anna@ti.com> | |
Mon, 11 Mar 2019 17:02:29 +0000 (12:02 -0500) |
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm/boot/dts/omap5-uevm.dts | patch | blob | history |
index a800a49b1547e432a24faa1b285cf60f4fe9c088..c02fc2b48e6255f9d498bfcc8c08e564d23a3bfb 100644 (file)
status = "okay";
memory-region = <&dsp_memory_region>;
timers = <&timer5>;
+ watchdog-timers = <&timer6>;
};
&ipu {
status = "okay";
memory-region = <&ipu_memory_region>;
timers = <&timer3>;
+ watchdog-timers = <&timer9>, <&timer11>;
};