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raw | patch | inline | side by side (parent: a7c9ace)
author | Suman Anna <s-anna@ti.com> | |
Wed, 22 Jan 2020 21:22:49 +0000 (15:22 -0600) | ||
committer | Suman Anna <s-anna@ti.com> | |
Wed, 24 Mar 2021 17:47:59 +0000 (12:47 -0500) |
The ICSSGs on K3 J721E SoCs contain an MDIO controller that can
be used to control external PHYs associated with the Industrial
Ethernet peripherals within each ICSSG instance. The MDIO module
used within the ICSSG is similar to the MDIO Controller used
in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the
MDIO operations.
The nodes are added to the common k3-j721e-main.dtsi file and are
disabled. These need to be enabled in the respective board files
supporting J721E SoCs and where the ethernet is pinned out and
connected properly.
Signed-off-by: Suman Anna <s-anna@ti.com>
be used to control external PHYs associated with the Industrial
Ethernet peripherals within each ICSSG instance. The MDIO module
used within the ICSSG is similar to the MDIO Controller used
in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the
MDIO operations.
The nodes are added to the common k3-j721e-main.dtsi file and are
disabled. These need to be enabled in the respective board files
supporting J721E SoCs and where the ethernet is pinned out and
connected properly.
Signed-off-by: Suman Anna <s-anna@ti.com>
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | patch | blob | history |
index 16fc60062bbdab34e9df745b6a4aac7877e1fdbf..eedecebc29b84c7d54a9e2e1d8b43d37dcd4e95e 100644 (file)
reg-names = "iram", "control", "debug";
firmware-name = "j7-txpru0_1-fw";
};
+
+ icssg0_mdio: mdio@32400 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x32400 0x100>;
+ clocks = <&k3_clks 119 1>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus_freq = <1000000>;
+ status = "disabled";
+ };
};
icssg1: icssg@b100000 {
reg-names = "iram", "control", "debug";
firmware-name = "j7-txpru1_1-fw";
};
+
+ icssg1_mdio: mdio@32400 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x32400 0x100>;
+ clocks = <&k3_clks 120 4>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus_freq = <1000000>;
+ status = "disabled";
+ };
};
};