ARM: dts: am572x-idk-common: Add CMA pools and enable IPU & DSP rprocs

The CMA reserved memory nodes have been added for all the IPU and DSP
remoteproc devices in the am572x-idk-common.dtsi file that is common to
both the AM572x and AM574x IDK boards. These nodes are assigned to the
respective rproc device nodes, and all the IPU and DSP remote processors
are enabled.

The current CMA pools and sizes are defined statically for each device.
The addresses chosen are the same as the respective processors on
the AM57xx EVM board to maintain firmware compatibility between the
two boards. The CMA pools and sizes are defined using 64-bit values
to support LPAE. The starting addresses are fixed to meet current
dependencies on the remote processor firmwares, and this will go
away when the remote-side code has been improved to gather this
information runtime during its initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>

diff --git a/arch/arm/boot/dts/am572x-idk-common.dtsi b/arch/arm/boot/dts/am572x-idk-common.dtsi
index fe9718fdabcc2186c7ee96b5a4cac6b8bd9d5918..ab893f496458dc2397df199cb53d92764ba27706 100644 (file)
--- a/arch/arm/boot/dts/am572x-idk-common.dtsi
+++ b/arch/arm/boot/dts/am572x-idk-common.dtsi
@@ -14,6 +14,40 @@
                reg = <0x0 0x80000000 0x0 0x80000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               ipu2_memory_region: ipu2-memory@95800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x95800000 0x0 0x3800000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               dsp1_memory_region: dsp1-memory@99000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x99000000 0x0 0x4000000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               ipu1_memory_region: ipu1-memory@9d000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x9d000000 0x0 0x2000000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               dsp2_memory_region: dsp2-memory@9f000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x9f000000 0x0 0x800000>;
+                       reusable;
+                       status = "okay";
+               };
+       };
+
        status-leds {
                compatible = "gpio-leds";
                cpu0-led {
@@ -75,3 +109,23 @@
 &pcie1_ep {
        gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
 };
+
+&ipu2 {
+       status = "okay";
+       memory-region = <&ipu2_memory_region>;
+};
+
+&ipu1 {
+       status = "okay";
+       memory-region = <&ipu1_memory_region>;
+};
+
+&dsp1 {
+       status = "okay";
+       memory-region = <&dsp1_memory_region>;
+};
+
+&dsp2 {
+       status = "okay";
+       memory-region = <&dsp2_memory_region>;
+};