8d6fa11d984ca2b99f02557d7ec26c95c416e214
1 /*\r
2 * Copyright (c) 2006-2014, Texas Instruments Incorporated\r
3 * All rights reserved.\r
4 *\r
5 * Redistribution and use in source and binary forms, with or without\r
6 * modification, are permitted provided that the following conditions\r
7 * are met:\r
8 *\r
9 * * Redistributions of source code must retain the above copyright\r
10 * notice, this list of conditions and the following disclaimer.\r
11 *\r
12 * * Redistributions in binary form must reproduce the above copyright\r
13 * notice, this list of conditions and the following disclaimer in the\r
14 * documentation and/or other materials provided with the distribution.\r
15 *\r
16 * * Neither the name of Texas Instruments Incorporated nor the names of\r
17 * its contributors may be used to endorse or promote products derived\r
18 * from this software without specific prior written permission.\r
19 *\r
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\r
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\r
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\r
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\r
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\r
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\r
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
31 *\r
32 */\r
33 \r
34 function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);}\r
35 \r
36 function printRegisterValue(ds, name, addr)\r
37 {\r
38 value = debugSessionDAP.memory.readWord(0,addr,false);\r
39 value_string = d2h(value);\r
40 file.write(name + " = 0x" + value_string + "\n");\r
41 return value; // return the register value for interrogation\r
42 }\r
43 \r
44 // Build a filename that includes date/time\r
45 var today = new Date();\r
46 var year4digit = today.getFullYear();\r
47 var month2digit = ("0" + (today.getMonth()+1)).slice(-2);\r
48 var day2digit = ("0" + today.getDate()).slice(-2);\r
49 var hour2digit = ("0" + today.getHours()).slice(-2);\r
50 var minutes2digit = ("0" + today.getMinutes()).slice(-2);\r
51 var seconds2digit = ("0" + today.getSeconds()).slice(-2);\r
52 var filename_date = '_' + year4digit + '-' + month2digit + '-' + day2digit + '_' + hour2digit + minutes2digit + seconds2digit; \r
53 var userHomeFolder = System.getProperty("user.home");\r
54 var filename = userHomeFolder + '/Desktop/' + 'am335x-ddr-analysis' + filename_date + '.txt';\r
55 \r
56 file = new java.io.FileWriter(filename);\r
57 \r
58 debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS");\r
59 debugSessionDAP.target.connect();\r
60 \r
61 var reg_val;\r
62 \r
63 // EMIF: SDRAM_CONFIG\r
64 reg_val = printRegisterValue(debugSessionDAP, "EMIF: SDRAM_CONFIG", 0x4C000008);\r
65 var is_ddr3=0;\r
66 var is_ddr2=0;\r
67 var is_lpddr=0;\r
68 if ( (reg_val & 0xE0000000) == (0 << 29) ) {file.write(" * ERROR! Unsupported memory type (DDR1)\n");}\r
69 if ( (reg_val & 0xE0000000) == (1 << 29) ) {is_lpddr=1;}\r
70 if ( (reg_val & 0xE0000000) == (2 << 29) ) {is_ddr2=1;}\r
71 if ( (reg_val & 0xE0000000) == (3 << 29) ) {is_ddr3=1;}\r
72 if (is_ddr3 == 1) {\r
73 file.write(" * Bits 26:24 (reg_ddr_term) set for ");\r
74 if ( (reg_val & 0x07000000) == (0 << 24) ) {file.write("termination disabled (000b)\n");}\r
75 if ( (reg_val & 0x07000000) == (1 << 24) ) {file.write("RZQ/4 (001b)\n");}\r
76 if ( (reg_val & 0x07000000) == (2 << 24) ) {file.write("RZQ/2 (010b)\n");}\r
77 if ( (reg_val & 0x07000000) == (3 << 24) ) {file.write("RZQ/6 (011b)\n");}\r
78 if ( (reg_val & 0x07000000) == (4 << 24) ) {file.write("RZQ/12 (100b)\n");}\r
79 if ( (reg_val & 0x07000000) == (5 << 24) ) {file.write("RZQ/8 (101b)\n");}\r
80 if ( (reg_val & 0x07000000) == (6 << 24) ) {file.write("ERROR\n");}\r
81 if ( (reg_val & 0x07000000) == (7 << 24) ) {file.write("ERROR\n");}\r
82 }\r
83 if (is_ddr2 == 1) {\r
84 file.write(" * Bits 26:24 (reg_ddr_term) set for ");\r
85 if ( (reg_val & 0x07000000) == (0 << 24) ) {file.write("termination disabled (000b)\n");}\r
86 if ( (reg_val & 0x07000000) == (1 << 24) ) {file.write("75 Ohm (001b)\n");}\r
87 if ( (reg_val & 0x07000000) == (2 << 24) ) {file.write("150 Ohm (010b)\n");}\r
88 if ( (reg_val & 0x07000000) == (3 << 24) ) {file.write("50 Ohm (011b)\n");}\r
89 if ( (reg_val & 0x07000000) == (4 << 24) ) {file.write("ERROR\n");}\r
90 if ( (reg_val & 0x07000000) == (5 << 24) ) {file.write("ERROR\n");}\r
91 if ( (reg_val & 0x07000000) == (6 << 24) ) {file.write("ERROR\n");}\r
92 if ( (reg_val & 0x07000000) == (7 << 24) ) {file.write("ERROR\n");}\r
93 }\r
94 if (is_ddr3 == 1) {\r
95 file.write(" * Bits 19:18 (reg_sdram_drive) set for ");\r
96 if ( (reg_val & 0x000C0000) == (0 << 18) ) {file.write("RZQ/6 (00b)\n");}\r
97 if ( (reg_val & 0x000C0000) == (1 << 18) ) {file.write("RZQ/7 (01b)\n");}\r
98 if ( (reg_val & 0x000C0000) == (2 << 18) ) {file.write("ERROR (10b)\n");}\r
99 if ( (reg_val & 0x000C0000) == (3 << 18) ) {file.write("ERROR (11b)\n");}\r
100 }\r
101 if (is_ddr2 == 1) {\r
102 file.write(" * Bits 19:18 (reg_sdram_drive) set for ");\r
103 if ( (reg_val & 0x000C0000) == (0 << 18) ) {file.write("normal drive (00b)\n");}\r
104 if ( (reg_val & 0x000C0000) == (1 << 18) ) {file.write("weak drive (01b)\n");}\r
105 if ( (reg_val & 0x000C0000) == (2 << 18) ) {file.write("ERROR (10b)\n");}\r
106 if ( (reg_val & 0x000C0000) == (3 << 18) ) {file.write("ERROR (11b)\n");}\r
107 }\r
108 if (is_lpddr == 1) {\r
109 file.write(" * Bits 19:18 (reg_sdram_drive) set for ");\r
110 if ( (reg_val & 0x000C0000) == (0 << 18) ) {file.write("full strength (00b)\n");}\r
111 if ( (reg_val & 0x000C0000) == (1 << 18) ) {file.write("half strength (01b)\n");}\r
112 if ( (reg_val & 0x000C0000) == (2 << 18) ) {file.write("quarter strength (10b)\n");}\r
113 if ( (reg_val & 0x000C0000) == (3 << 18) ) {file.write("eighth strength (11b)\n");}\r
114 }\r
115 \r
116 // EMIF: PWR_MGMT_CTRL\r
117 reg_val = printRegisterValue(debugSessionDAP, "EMIF: PWR_MGMT_CTRL", 0x4C000038);\r
118 if ( (reg_val & 0xF0) < 0x90 ) {\r
119 file.write(" * ERROR: Bits 7:4 (reg_sr_tim) are in violation of Maximum Self-Refresh Command Limit\n");\r
120 file.write(" * Please see the silicon errata for more details.\n");\r
121 }\r
122 \r
123 // DDR PHY: DDR_PHY_CTRL_1\r
124 reg_val = printRegisterValue(debugSessionDAP, "DDR PHY: DDR_PHY_CTRL_1", 0x4C0000E4);\r
125 if ( (reg_val & 1<<20) == 0 ) {file.write(" * WARNING: reg_phy_enable_dynamic_pwrdn disabled.\n");}\r
126 file.write(" * Bits 9:8 (reg_phy_rd_local_odt) configured as ");\r
127 if ( (reg_val & 0x300) == (0 << 8) ) {file.write("no termination (00b)\n");}\r
128 if ( (reg_val & 0x300) == (1 << 8) ) {file.write("no termination (01b)\n");}\r
129 if ( (reg_val & 0x300) == (2 << 8) ) {file.write("full thevenin termination\n");}\r
130 if ( (reg_val & 0x300) == (3 << 8) ) {file.write("half thevenin termination\n");}\r
131 \r
132 // CONTROL: DDR_CMD0_IOCTRL\r
133 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD0_IOCTRL", 0x44E11404);\r
134 file.write(" * Bits 9:5 control ddr_ck and ddr_ckn\n");\r
135 file.write(" - Slew ");\r
136 if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}\r
137 if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}\r
138 if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}\r
139 if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}\r
140 var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;\r
141 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
142 file.write(" * Bits 4:0 control ddr_ba0, ddr_ba2, ddr_wen, ddr_a[9:8], ddr_a[6:3]\n");\r
143 file.write(" - Slew ");\r
144 if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}\r
145 if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}\r
146 if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}\r
147 if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}\r
148 var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;\r
149 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
150 \r
151 // CONTROL: DDR_CMD1_IOCTRL\r
152 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD1_IOCTRL", 0x44E11408);\r
153 file.write(" * Bits 4:0 control ddr_15, ddr_a[12:10], ddr_a7, ddr_a2, ddr_a0, ddr_ba1, ddr_casn, ddr_rasn\n");\r
154 file.write(" - Slew ");\r
155 if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}\r
156 if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}\r
157 if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}\r
158 if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}\r
159 var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;\r
160 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
161 \r
162 // CONTROL: DDR_CMD2_IOCTRL\r
163 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD2_IOCTRL", 0x44E1140C);\r
164 file.write(" * Bits 4:0 control ddr_cke, ddr_resetn, ddr_odt, ddr_csn0, ddr_[a14:13], ddr_a1\n");\r
165 file.write(" - Slew ");\r
166 if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}\r
167 if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}\r
168 if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}\r
169 if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}\r
170 var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;\r
171 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
172 \r
173 // CONTROL: DDR_DATA0_IOCTRL\r
174 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_DATA0_IOCTRL", 0x44E11440);\r
175 file.write(" * Bits 9:5 control ddr_dqs1, ddr_dqsn1\n");\r
176 file.write(" - Slew ");\r
177 if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}\r
178 if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}\r
179 if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}\r
180 if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}\r
181 var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;\r
182 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
183 file.write(" * Bits 4:0 control ddr_d[15:8], ddr_dqm1\n");\r
184 file.write(" - Slew ");\r
185 if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}\r
186 if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}\r
187 if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}\r
188 if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}\r
189 var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;\r
190 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
191 \r
192 // CONTROL: DDR_DATA1_IOCTRL\r
193 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_DATA1_IOCTRL", 0x44E11444);\r
194 file.write(" * Bits 9:5 control ddr_dqs0, ddr_dqsn0\n");\r
195 file.write(" - Slew ");\r
196 if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}\r
197 if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}\r
198 if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}\r
199 if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}\r
200 var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;\r
201 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
202 file.write(" * Bits 4:0 control ddr_d[7:0], dqm0\n");\r
203 file.write(" - Slew ");\r
204 if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}\r
205 if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}\r
206 if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}\r
207 if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}\r
208 var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;\r
209 file.write(" - Drive Strength " + drive_strength_mA + " mA\n");\r
210 \r
211 // CONTROL: DDR_IO_CTRL\r
212 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_IO_CTRL", 0x44E10E04);\r
213 if ( (reg_val & (1 << 28)) == 0) {\r
214 file.write(" * Bit 28 (mddr_sel) configured for SSTL, i.e. DDR2/DDR3/DDR3L operation.\n");\r
215 if (is_lpddr == 1) {file.write("ERROR! Mismatch with SDRAM_CONFIG.\n");}\r
216 }\r
217 else {\r
218 file.write(" * Bit 28 (mddr_sel) configured for LVCMOS, i.e. LPDDR/mDDR operation.\n");\r
219 if (is_ddr2 == 1) {file.write("ERROR! Mismatch with SDRAM_CONFIG.\n");}\r
220 if (is_ddr3 == 1) {file.write("ERROR! Mismatch with SDRAM_CONFIG.\n");}\r
221 }\r
222 \r
223 \r
224 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: VTP_CTRL", 0x44E10E0C);\r
225 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: VREF_CTRL", 0x44E10E14);\r
226 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CKE_CTRL", 0x44E1131C);\r
227 \r
228 file.close();\r
229 print("Created file " + filename);\r
230 debugSessionDAP.target.disconnect();\r
231 \r