Add more complete EMIF register dump
authorBrad Griffis <bgriffis@ti.com>
Wed, 18 Oct 2017 19:43:10 +0000 (14:43 -0500)
committerBrad Griffis <bgriffis@ti.com>
Wed, 18 Oct 2017 19:43:10 +0000 (14:43 -0500)
am335x-ddr-analysis.dss

index a1950231ea18c45bc163e6c7f6bc98032aacc0a2..4fb2ac2f841507cdca865add082cd19507b20b42 100644 (file)
@@ -41,6 +41,11 @@ function printRegisterValue(ds, name, addr)
        return value; // return the register value for interrogation
 }
 
+function getRegisterValue(debug, addr)
+{
+       return debug.memory.readWord(0,addr,false);
+}
+
 function interpret_cmd_phy_macro(value, index)
 {
        WD1 = (value >> (21+index)) & 1;
@@ -174,7 +179,59 @@ if (original_CM_PER_L3_CLKSTCTRL & 1<<2) {
        if ( (reg_val & 0x300) == (1 << 8) ) {file.write("no termination (01b)\n");}
        if ( (reg_val & 0x300) == (2 << 8) ) {file.write("full thevenin termination\n");}
        if ( (reg_val & 0x300) == (3 << 8) ) {file.write("half thevenin termination\n");}
-       
+
+       file.write("\n");
+       file.write("*********************\n");
+       file.write("*** Register Dump ***\n")
+       file.write("*********************\n\n");
+
+       var ddr_config_regs = [
+               0x4C000000,
+               0x4C000004,
+               0x4C000008,
+               0x4C00000C,
+               0x4C000010,
+               0x4C000014,
+               0x4C000018,
+               0x4C00001C,
+               0x4C000020,
+               0x4C000024,
+               0x4C000028,
+               0x4C00002C,
+               0x4C000038,
+               0x4C00003C,
+               0x4C000054,
+               0x4C000058,
+               0x4C00005C,
+               0x4C000080,
+               0x4C000084,
+               0x4C000088,
+               0x4C00008C,
+               0x4C000090,
+               0x4C000098,
+               0x4C00009C,
+               0x4C0000A4,
+               0x4C0000AC,
+               0x4C0000B4,
+               0x4C0000BC,
+               0x4C0000C8,
+               0x4C0000D4,
+               0x4C0000D8,
+               0x4C0000DC,
+               0x4C0000E4,
+               0x4C0000E8,
+               0x4C000100,
+               0x4C000104,
+               0x4C000108,
+               0x4C000120];
+
+       for (i=0; i<ddr_config_regs.length; i++)
+       {
+               reg_val = getRegisterValue(debugSessionDAP, ddr_config_regs[i]);
+               file.write("*(0x" + d2h(ddr_config_regs[i]) + ")"); // Address
+               file.write(" = 0x" + d2h(reg_val) + "\n"); // Raw Reg Val
+       }
+
        // Close (Main) DAP session and use M3 DAP to view Control Registers
        debugSessionDAP.target.disconnect();
        debugSessionDAP = ds.openSession("*","CS_DAP_M3");
@@ -190,6 +247,11 @@ if (original_CM_PER_L3_CLKSTCTRL & 1<<2) {
        file.write(" * If you are attempting to enter DS0 this is normal.\n");
 }
 
+file.write("\n");
+file.write("************************\n");
+file.write("*** IOCTRL Registers ***\n")
+file.write("************************\n\n");
+
 // CONTROL: DDR_CMD0_IOCTRL
 reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD0_IOCTRL", 0x44E11404);
 file.write("  * ddr_ba2 " + interpret_cmd_phy_macro(reg_val, 0));