[DDR] Add parsing of DPLL_DDR

diff --git a/am335x-ddr-analysis.dss b/am335x-ddr-analysis.dss
index 5d46f68024eab550dcca9293b47e436c132e1b18..630a114457e8f8544c0246af61118f2efa09a1a6 100644 (file)
--- a/am335x-ddr-analysis.dss
+++ b/am335x-ddr-analysis.dss
@@ -33,6 +33,9 @@
 
 function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);}
 
+// helper function to create decimal numbers in ascii format
+function d2d(d) {return ((+d).toString());}
+
 function printRegisterValue(ds, name, addr)
 {
        value = debugSessionDAP.memory.readWord(0,addr,false);
@@ -70,6 +73,20 @@ function interpret_data_phy_macro(value, index)
        return return_string;
 }
 
+// Inputs:
+//   Data - 32-bit register value
+//   Upper - Highest bit to keep
+//   Lower - Lowest bit to keep
+//   (bit 0 refers to LSB, bit 31 to MSB)
+// Return: right aligned data
+function bits32(data, upper, lower)
+{
+       data = data >>> lower; // unsigned right-shift
+       upper = upper - lower;
+       bitmask =  0xFFFFFFFF >>> (31 - upper);
+       return (data & bitmask);
+}
+
 // Build a filename that includes date/time
 var today = new Date();
 var year4digit = today.getFullYear();
@@ -105,6 +122,7 @@ if (value == 0)
 
 var original_CM_WKUP_DEBUGSS_CLKCTRL = debugSessionDAP.memory.readWord(0,0x44e00414,false);
 var original_CM_PER_L3_CLKSTCTRL = debugSessionDAP.memory.readWord(0,0x44E0000C,false);
+var newline = "\n";
 
 file = new java.io.FileWriter(filename);
 
@@ -122,8 +140,60 @@ if (original_CM_PER_L3_CLKSTCTRL & 1<<2) {
        debugSessionDAP.target.connect();
        
        var reg_val;
+
+       // CONTROL: device_id
+       reg_val = printRegisterValue(debugSessionDAP, "CONTROL: device_id", 0x44E10600);
+       if ( (reg_val & 0x0FFFFFFF) == 0xb94402e ) {file.write("  * AM335x family" + newline);}
+       if ( (reg_val & 0xF0000000) == (0 << 28) ) {file.write("  * Silicon Revision 1.0" + newline);}
+       if ( (reg_val & 0xF0000000) == (1 << 28) ) {file.write("  * Silicon Revision 2.0" + newline);}
+       if ( (reg_val & 0xF0000000) == (2 << 28) ) {file.write("  * Silicon Revision 2.1" + newline);}
+
+       // CONTROL: control_status
+       file.write(newline);
+       reg_val = printRegisterValue(debugSessionDAP, "CONTROL: control_status", 0x44E10040);
+       speedselect_pins = bits32(reg_val, 23, 22);
+       switch (speedselect_pins) {
+               case 0:
+                       file.write("  * SYSBOOT[15:14] = 00b (19.2 MHz)" + newline);
+                       input_clock = 19.2;
+                       break;
+               case 1:
+                       file.write("  * SYSBOOT[15:14] = 01b (24 MHz)" + newline);
+                       input_clock = 24;
+                       break;
+               case 2:
+                       file.write("  * SYSBOOT[15:14] = 10b (25 MHz)" + newline);
+                       input_clock = 25;
+                       break;
+               case 3:
+                       file.write("  * SYSBOOT[15:14] = 11b (26 MHz)" + newline);
+                       input_clock = 26;
+                       break;
+       }
        
+       // CM_CLKSEL_DPLL_DDR
+       reg_val = printRegisterValue(debugSessionDAP, "CM_CLKSEL_DPLL_DDR", 0x44E00440);
+       dpll_mult = bits32(reg_val, 18, 8);
+       file.write("  * DPLL_MULT = " + d2d(dpll_mult) + " (x" + d2d(dpll_mult) + ")" + newline);
+       dpll_div = bits32(reg_val, 6, 0);
+       file.write("  * DPLL_DIV = " + d2d(dpll_div) + " (/" + d2d(dpll_div+1) + ")" + newline);
+       f_dpll_ddr = input_clock*2*dpll_mult/(dpll_div+1);
+
+       // CM_DIV_M2_DPLL_DDR
+       reg_val = printRegisterValue(debugSessionDAP, "CM_DIV_M2_DPLL_DDR", 0x44E004A0);
+       if (reg_val & (1<<9))  // CLKST = 1
+               file.write("  * CLKST = 1: M2 output clock enabled" + newline);
+       else
+               file.write("  * CLKST = 0: M2 output clock disabled" + newline);;
+       div_m2 = reg_val & 0x1F;
+       file.write("  * DIVHS = " + d2d(div_m2) + " (/" + d2d(div_m2) + ")" + newline);
+
+       file.write(newline + "DPLL_DDR Summary" + newline);
+       file.write(" -> F_input = " + d2d(input_clock) + " MHz" + newline);
+       file.write(" -> CLKOUT_M2 = DDR_PLL_CLKOUT = " + f_dpll_ddr / 2 / div_m2 + " MHz" + newline);
+
        // EMIF: SDRAM_CONFIG
+       file.write(newline);
        reg_val = printRegisterValue(debugSessionDAP, "EMIF: SDRAM_CONFIG", 0x4C000008);
 
        var is_ddr3=0;