sitara-dss-files/am335x-dss-files.git
5 years agoam335x-bbb-pru-startup.js initial commit
Brad Griffis [Tue, 17 Nov 2015 22:16:39 +0000 (16:16 -0600)]
am335x-bbb-pru-startup.js initial commit

Script for simplifying connection to BBB PRU via JTAG

Derived from example script here:
http://processors.wiki.ti.com/index.php/Debug_Configuration_Initialization_Scripts

Documentation for this script and its usage available here:
http://processors.wiki.ti.com/index.php/PRU-ICSS_Debug_on_AM335x

5 years agoquick analysis of power domains and modules
Brad Griffis [Sat, 14 Nov 2015 01:38:25 +0000 (19:38 -0600)]
quick analysis of power domains and modules

This file should be useful for debugging suspend/resume issues when
trying to enter DeepSleep0 with AM335x.

See this page for more info:

http://processors.wiki.ti.com/index.php/Debugging_AM335x_Suspend-Resume_Issues

5 years agoImproved robustness due to clock inspection/adjustment
Brad Griffis [Sat, 14 Nov 2015 01:33:23 +0000 (19:33 -0600)]
Improved robustness due to clock inspection/adjustment

1. Print a message in case where cannot connect at all. (General JTAG
issues.)

2. Initially connect to DAP_M3 to interrogate the state of DEBUGSS_CLK
and EMIF_CLK.

3. Skip analysis of EMIF registers and print message in case where EMIF
clock is disabled (e.g. just before reaching DS0).

4. In case where EMIF is alive, but DEBUGSS_CLK is disabled, temporarily
enable the clock through the DAP_M3, read the EMIF registers of
interest, and then restore DEBUGSS_CLK to its original value.

These enhancements make it much easier to use this script and avoid the
need for kernel changes or poking registers with devmem2.

5 years agoAdd extra robustness with try/catch statements
Brad Griffis [Wed, 11 Nov 2015 23:16:42 +0000 (17:16 -0600)]
Add extra robustness with try/catch statements

5 years agoSwitch to DAP_M3
Brad Griffis [Mon, 9 Nov 2015 22:20:17 +0000 (16:20 -0600)]
Switch to DAP_M3

The normal DAP sits on the L3 interconnect and requires more clocks to
be active in order for it to work.  In Linux that clock is often not
active by default.  We can use the DAP_M3 instead which is still
accessible.  This also helps with debugging low power issues since the
DAP_M3 remains accessible almost all the way into DS0.  This allows you
to inspect the SoC state very close to DS0 to look for issues.

5 years agoanalysis of ddr_cke_ctrl
Brad Griffis [Mon, 9 Nov 2015 21:25:09 +0000 (15:25 -0600)]
analysis of ddr_cke_ctrl

5 years agovref_ctrl analysis
Brad Griffis [Mon, 9 Nov 2015 21:20:36 +0000 (15:20 -0600)]
vref_ctrl analysis

5 years agominor formatting
Brad Griffis [Mon, 9 Nov 2015 21:16:45 +0000 (15:16 -0600)]
minor formatting

5 years agoAdd comments regarding vtp_ctrl register
Brad Griffis [Mon, 9 Nov 2015 21:12:14 +0000 (15:12 -0600)]
Add comments regarding vtp_ctrl register

5 years agoAdd check for ddr_io_ctrl.ddr3_rst_def_val
Brad Griffis [Mon, 9 Nov 2015 20:56:23 +0000 (14:56 -0600)]
Add check for ddr_io_ctrl.ddr3_rst_def_val

5 years agoUse DAP_M3 to read Control registers
Brad Griffis [Mon, 9 Nov 2015 20:44:42 +0000 (14:44 -0600)]
Use DAP_M3 to read Control registers

The normal DEBUGSS_DAP sits on the L3 interconnect and so it is not
usable when you most of the chip has been turned off, as is the case
when going to DS0.  Using the DAP_M3 has less visibility into the device
as a whole, but is still usable almost all the way to suspend.

5 years agoDecode the values for pullup/pulldown/keeper for each DDR pin
Brad Griffis [Fri, 6 Nov 2015 20:12:56 +0000 (14:12 -0600)]
Decode the values for pullup/pulldown/keeper for each DDR pin

5 years agoAdd warning if reg_phy_enable_dynamic_pwrdn is disabled
Brad Griffis [Fri, 6 Nov 2015 18:30:34 +0000 (12:30 -0600)]
Add warning if reg_phy_enable_dynamic_pwrdn is disabled

5 years agoAdd print that tells name of file created
Brad Griffis [Fri, 6 Nov 2015 18:21:54 +0000 (12:21 -0600)]
Add print that tells name of file created

5 years agoCheck PWR_MGMT_CTRL.reg_sr_tim for JEDEC compliance
Brad Griffis [Fri, 6 Nov 2015 17:42:49 +0000 (11:42 -0600)]
Check PWR_MGMT_CTRL.reg_sr_tim for JEDEC compliance

See the section titled "DDR3: JEDEC Compliance for Maximum Self-Refresh
Command Limit" in the AM335x silicon errata for more details.

7 years agoAdd Modified BSD License to header of files.
Brad Griffis [Tue, 20 May 2014 21:14:26 +0000 (16:14 -0500)]
Add Modified BSD License to header of files.

7 years agoInitial commit for am335x-boot.dss
Brad Griffis [Mon, 19 May 2014 22:50:52 +0000 (17:50 -0500)]
Initial commit for am335x-boot.dss

7 years agoadded a bunch of missing registers!
Brad Griffis [Fri, 16 May 2014 01:20:35 +0000 (20:20 -0500)]
added a bunch of missing registers!

7 years agoAdd DAP disconnect to end of file
Brad Griffis [Thu, 15 May 2014 16:31:57 +0000 (11:31 -0500)]
Add DAP disconnect to end of file

7 years agoForce usage of DAP
Brad Griffis [Thu, 15 May 2014 16:22:38 +0000 (11:22 -0500)]
Force usage of DAP
* Users no longer need to connect to a core before invoking the script
* DAP is non-intrusive to A8, i.e. don't ever have to halt A8

7 years agoinitial commit
Brad Griffis [Thu, 15 May 2014 15:20:34 +0000 (10:20 -0500)]
initial commit