/* * Copyright (c) 2019, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);} // helper function to create decimal numbers in ascii format function d2d(d) {return ((+d).toString());} var newline = "\n"; function printRegisterValue(ds, name, addr) { value = debugSessionDAP.memory.readWord(0,addr,false); value_string = d2h(value); file.write(name + " = 0x" + value_string + newline); return value; // return the register value for interrogation } // bit 0 refers to LSB, bit 31 to MSB function bits32(data, upper, lower) { data = data >>> lower; // unsigned right-shift upper = upper - lower; bitmask = 0xFFFFFFFF >>> (31 - upper); return (data & bitmask); } // Build a filename that includes date/time var today = new Date(); var year4digit = today.getFullYear(); var month2digit = ("0" + (today.getMonth()+1)).slice(-2); var day2digit = ("0" + today.getDate()).slice(-2); var hour2digit = ("0" + today.getHours()).slice(-2); var minutes2digit = ("0" + today.getMinutes()).slice(-2); var seconds2digit = ("0" + today.getSeconds()).slice(-2); var filename_date = '_' + year4digit + '-' + month2digit + '-' + day2digit + '_' + hour2digit + minutes2digit + seconds2digit; var userHomeFolder = System.getProperty("user.home"); var filename = userHomeFolder + '/Desktop/' + 'am43xx-boot-analysis' + filename_date + '.txt'; file = new java.io.FileWriter(filename); debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS"); debugSessionDAP.target.connect(); var reg_val; // CONTROL: device_id reg_val = printRegisterValue(debugSessionDAP, "CONTROL: device_id", 0x44E10600); if ( bits32(reg_val, 27, 0) == 0xb98c02f ) {file.write(" * AM43xx family" + newline);} if ( bits32(reg_val, 31, 28) == 1 ) { file.write(" * Silicon Revision 1.1" + newline); PG = 1.1; } if ( bits32(reg_val, 31, 28) == 2 ) { file.write(" * Silicon Revision 1.2" + newline); PG = 1.2; } // ROM: PRM_RSTST file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "PRM_DEVICE: PRCM_PRM_RSTST", 0x44DF4004); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : GLOBAL_COLD_RST" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : GLOBAL_WARM_RST" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : WDT1_RST" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : EXTERNAL_WARM_RST" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 5 : ICEPICK_RST" + newline);} // CONTROL: control_status file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "CONTROL: control_status", 0x44E10040); if ( PG == 1.2) { if ( bits32(reg_val, 26, 26) == 1 ) { if ( bits32(reg_val, 5, 5) == 1 ) { file.write(" * Bits 26 (SYSBOOT18=1) and 5 (SYSBOOT5=1): Route 50MHz EXTCLK to CLKOUT2" + newline); } else { file.write(" * Bits 26 (SYSBOOT18=1) and 5 (SYSBOOT5=0): Route 25MHz EXTCLK to CLKOUT2" + newline); } } else { file.write(" * Bit 26 (SYSBOOT18=0): Do not route EXTCLK to CLKOUT2" + newline); } } SYSBOOT15_14 = bits32(reg_val, 23, 22); file.write(" * Bits 23:22 (SYSBOOT15:14=" + d2d(SYSBOOT15_14) + "): "); switch (SYSBOOT15_14) { case 0: file.write("19.2 MHz"); break; case 1: file.write("24 MHz"); break; case 2: file.write("25 MHz"); break; case 3: file.write("26 MHz"); break; } file.write(newline); boot_sequence = (reg_val & 0x1F); if (boot_sequence == 0x00) {file.write(" * Boot Sequence : NAND -> USB_MS (USB1) -> MMC0 -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x01) {file.write(" * Boot Sequence : MMC0 -> MMC1 -> USB_MS (USB1) -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x02) {file.write(" * Boot Sequence : SPI -> USB_MS (USB1) -> MMC0 -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x03) {file.write(" * Boot Sequence : NAND_I2C -> USB_MS (USB1) -> MMC0 -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x04) {file.write(" * Boot Sequence : MMC1 -> MMC0 -> USB_MS (USB1) -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x05) {file.write(" * Boot Sequence : NOR -> USB_MS (USB1) -> EMAC1 -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x06) {file.write(" * Boot Sequence : NAND" + newline);} if (boot_sequence == 0x07) {file.write(" * Boot Sequence : NOR -> USB_MS (USB1) -> UART0" + newline);} if (boot_sequence == 0x08) {file.write(" * Boot Sequence : QSPI -> USB_MS (USB1) -> MMC0 -> USB_CL (USB0)" + newline);} if (boot_sequence == 0x09) {file.write(" * Boot Sequence : SPI" + newline);} if (boot_sequence == 0x0A) {file.write(" * Boot Sequence : QSPI" + newline);} if (boot_sequence == 0x0B) {file.write(" * Boot Sequence : NAND_I2C" + newline);} if (boot_sequence == 0x0C) {file.write(" * Boot Sequence : MMC0" + newline);} if (boot_sequence == 0x0D) {file.write(" * Boot Sequence : MMC1" + newline);} if (boot_sequence == 0x0E) {file.write(" * Boot Sequence : NAND_I2C -> USB_MS (USB1) -> EMAC1 -> UART0" + newline);} if (boot_sequence == 0x0F) {file.write(" * Boot Sequence : FAST_NOR" + newline);} if (boot_sequence == 0x10) {file.write(" * Boot Sequence : MMC0 -> USB_MS (USB1) -> USB_CL (USB0) -> NAND" + newline);} if (boot_sequence == 0x11) {file.write(" * Boot Sequence : MMC1 -> USB_MS (USB1) -> USB_CL (USB0) -> MMC0" + newline);} if (boot_sequence == 0x12) {file.write(" * Boot Sequence : MMC0 -> USB_MS (USB1) -> USB_CL (USB0) -> SPI" + newline);} if (boot_sequence == 0x13) {file.write(" * Boot Sequence : MMC0 -> USB_MS (USB1) -> USB_CL (USB0) -> NAND_I2C" + newline);} if (boot_sequence == 0x14) {file.write(" * Boot Sequence : MMC0 -> USB_MS (USB1) -> USB_CL (USB0) -> MMC1" + newline);} if (boot_sequence == 0x15) {file.write(" * Boot Sequence : USB_MS (USB1) -> USB_CL (USB0) -> UART0 -> NOR" + newline);} if (boot_sequence == 0x16) {file.write(" * Boot Sequence : EMAC1 -> NAND_I2C -> NAND -> MMC0" + newline);} if (boot_sequence == 0x17) {file.write(" * Boot Sequence : EMAC1 -> SPI -> QSPI -> MMC1" + newline);} if (boot_sequence == 0x18) {file.write(" * Boot Sequence : MMC0 -> USB_MS (USB1) -> USB_CL (USB0) -> QSPI" + newline);} if (boot_sequence == 0x19) {file.write(" * Boot Sequence : UART0 -> NAND_I2C -> NAND -> MMC0" + newline);} if (boot_sequence == 0x1A) {file.write(" * Boot Sequence : UART0 -> SPI -> QSPI -> MMC1" + newline);} if (boot_sequence == 0x1B) {file.write(" * Boot Sequence : EMAC1 -> UART0 -> NOR" + newline);} if (boot_sequence == 0x1C) {file.write(" * Boot Sequence : EMAC1" + newline);} if (boot_sequence == 0x1D) {file.write(" * Boot Sequence : USB_CL (USB0)" + newline);} if (boot_sequence == 0x1E) {file.write(" * Boot Sequence : USB_MS (USB1) -> NAND_I2C" + newline);} if (boot_sequence == 0x1F) {file.write(" * Boot Sequence : FAST_NOR" + newline);} // Boot Error Counters file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "Boot Error Counter 1", 0x40337DE0); reg_val = printRegisterValue(debugSessionDAP, "Boot Error Counter 2", 0x40337DE4); reg_val = printRegisterValue(debugSessionDAP, "Boot Error Counter 3", 0x40337DE8); reg_val = printRegisterValue(debugSessionDAP, "Boot Error Counter 4", 0x40337DEC); // ROM: Tracing Vector 1 file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "ROM: tracing vector, word 1", 0x40338E40); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [General] Passed the public reset vector" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [General] Entered main function" + newline);} if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [General] Running after the cold reset" + newline);} if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Boot] Main booting routine entered" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Memory booting started" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Peripheral Boot] Peripheral booting started" + newline);} if (reg_val & 1<<6 ) {file.write(" * Bit 6 : Reserved" + newline);} if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Boot] Header found" + newline);} if (reg_val & 1<<8 ) {file.write(" * Bit 8 : [Boot] Reserved" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 9 : [Boot] Reserved" + newline);} if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<11 ) {file.write(" * Bit 11 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Peripheral Boot] Device initialized" + newline);} if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Peripheral Boot] Searching for HOST (Bootp for USB_CL/MEAC, 'C' for UART)" + newline);} if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Peripheral Boot] Image received" + newline);} if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Peripheral Boot] Peripheral booting failed" + newline);} if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Peripheral Boot] HOST not found (timeout)" + newline);} if (reg_val & 1<<17 ) {file.write(" * Bit 17 : Reserved" + newline);} if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot] Image not received (timeout)" + newline);} if (reg_val & 1<<19 ) {file.write(" * Bit 19 : [Peripheral Boot] Image received is bigger than expected" + newline);} if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [MMC Configuration Header] CHSETTINGS found" + newline);} if (reg_val & 1<<21 ) {file.write(" * Bit 21 : Reserved" + newline);} if (reg_val & 1<<22 ) {file.write(" * Bit 22 : Reserved" + newline);} if (reg_val & 1<<23 ) {file.write(" * Bit 23 : Reserved" + newline);} if (reg_val & 1<<24 ) {file.write(" * Bit 24 : Reserved" + newline);} if (reg_val & 1<<25 ) {file.write(" * Bit 25 : Reserved" + newline);} if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} // ROM: Tracing Vector 2 file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "ROM: tracing vector, word 2", 0x40338E44); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : Reserved" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : Reserved" + newline);} if (reg_val & 1<<2 ) {file.write(" * Bit 2 : Reserved" + newline);} if (reg_val & 1<<3 ) {file.write(" * Bit 3 : Reserved" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [USB] USB connect" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [USB] USB_CL configured state" + newline);} if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [USB] USB_CL VBUS valid" + newline);} if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [USB] USB_CL session valid" + newline);} if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} if (reg_val & 1<<10 ) {file.write(" * Bit 10 : Reserved" + newline);} if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Memory Boot] Memory booting trial 0" + newline);} if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Memory Boot] Memory booting trial 1" + newline);} if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Memory Boot] Memory booting trial 2" + newline);} if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Memory Boot] Memory booting trial 3" + newline);} if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Memory Boot] Execute GP image" + newline);} if (reg_val & 1<<17 ) {file.write(" * Bit 17 : Reserved" + newline);} if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Memory & Peripheral Boot] Jumping to Initial SW" + newline);} if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} if (reg_val & 1<<20 ) {file.write(" * Bit 20 : Reserved" + newline);} if (reg_val & 1<<21 ) {file.write(" * Bit 21 : Reserved" + newline);} if (reg_val & 1<<22 ) {file.write(" * Bit 22 : Reserved" + newline);} if (reg_val & 1<<23 ) {file.write(" * Bit 23 : Reserved" + newline);} if (reg_val & 1<<24 ) {file.write(" * Bit 24 : Reserved" + newline);} if (reg_val & 1<<25 ) {file.write(" * Bit 25 : Reserved" + newline);} if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} // ROM: Tracing Vector 3 file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "ROM: tracing vector, word 3", 0x40338E48); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Memory Boot] Memory booting device NULL" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Memory Boot] Memory booting device XIP" + newline);} if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Memory Boot] Memory booting device NAND" + newline);} if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Memory Boot] Memory booting device NAND_I2C" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Memory booting device MMCSD0" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Memory Boot] Memory booting device MMCSD1" + newline);} if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [Memory Boot] Memory booting device SPI" + newline);} if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Memory Boot] Memory booting device QSPI" + newline);} if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} if (reg_val & 1<<10 ) {file.write(" * Bit 10 : Reserved" + newline);} if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} if (reg_val & 1<<12 ) {file.write(" * Bit 12 : Reserved" + newline);} if (reg_val & 1<<13 ) {file.write(" * Bit 13 : Reserved" + newline);} if (reg_val & 1<<14 ) {file.write(" * Bit 14 : Reserved" + newline);} if (reg_val & 1<<15 ) {file.write(" * Bit 15 : Reserved" + newline);} if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Peripheral Boot] Peripheral booting device UART0" + newline);} if (reg_val & 1<<17 ) {file.write(" * Bit 17 : Reserved" + newline);} if (reg_val & 1<<18 ) {file.write(" * Bit 18 : Reserved" + newline);} if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Peripheral Boot] Peripheral booting device USB_CL" + newline);} if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Peripheral Boot] Peripheral booting device USB_MS" + newline);} if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Peripheral Boot] Peripheral booting device CPGMAC1" + newline);} if (reg_val & 1<<23 ) {file.write(" * Bit 23 : Reserved" + newline);} if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Peripheral Boot] Peripheral booting device NULL" + newline);} if (reg_val & 1<<25 ) {file.write(" * Bit 25 : Reserved" + newline);} if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} // ROM: Tracing Vector 4 file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "ROM: tracing vector, word 4", 0x40338E4C); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Memory Boot NOR] Non-Muxed NOR detected" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Memory Boot NOR/NAND] NOR/NAND Wait 1 Selected" + newline);} if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Memory Boot NOR/QSPI] NOR/QSPI pinmux option 0 selected" + newline);} if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Memory Boot NOR/QSPI] NOR/QSPI pinmux option 1 selected" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot NOR] NOR pinmux option 2 selected" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Memory Boot NAND] NAND 16-bit bus width detected" + newline);} if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [Memory Boot NAND] NAND ECC failure found" + newline);} if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Memory Boot NAND] NAND device identified" + newline);} if (reg_val & 1<<8 ) {file.write(" * Bit 8 : [Memory Boot NAND] BCH 16 ECC scheme used" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 9 : [Memory Boot] MMC card in Ready state (CMD1 complete)" + newline);} if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Memory Boot] Data read from the MMC card" + newline);} if (reg_val & 1<<11 ) {file.write(" * Bit 11 : [Memory Boot USB_MS/MMC] Master Boot Record (MBR) found" + newline);} if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Memory Boot USB_MS/MMC] Active Partition found" + newline);} if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Memory Boot MMC] Raw image found" + newline);} if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Memory Boot USB_MS/MMC] MLO found" + newline);} if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Memory Boot USB_MS] Device protocol supported" + newline);} if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Memory Boot USB_MS] Mass Storage Class (MSC) enumeration completed" + newline);} if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Memory Boot SPI] SPI configuration completed" + newline);} if (reg_val & 1<<19 ) {file.write(" * Bit 19 : [Memory Boot SPI] SPI Read initialized" + newline);} if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<26 ) {file.write(" * Bit 26 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<27 ) {file.write(" * Bit 27 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<28 ) {file.write(" * Bit 28 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<29 ) {file.write(" * Bit 29 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<30 ) {file.write(" * Bit 30 : [Memory Boot] Reserved" + newline);} if (reg_val & 1<<31 ) {file.write(" * Bit 31 : [Memory Boot] Reserved" + newline);} // ROM: Tracing Vector 5 file.write(newline); reg_val = printRegisterValue(debugSessionDAP, "ROM: tracing vector, word 5", 0x40338E50); if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Peripheral Boot EMAC] RMII PHY detected" + newline);} if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Peripheral Boot EMAC] RGMII PHY detected" + newline);} if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Peripheral Boot EMAC] MII PHY detected" + newline);} if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Peripheral Boot EMAC] GMII PHY detected" + newline);} if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Peripheral Boot EMAC] 10 Mbps network detected" + newline);} if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Peripheral Boot EMAC] 100 Mbps network detected" + newline);} if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [Peripheral Boot EMAC] 1 Gbps network detected" + newline);} if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Peripheral Boot EMAC] RGMII internal delay enabled" + newline);} if (reg_val & 1<<8 ) {file.write(" * Bit 8 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<9 ) {file.write(" * Bit 9 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<11 ) {file.write(" * Bit 11 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Peripheral Boot USB_CL/UART] TFTP transfer started" + newline);} if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Peripheral Boot USB_CL/UART] TFTP transfer completed" + newline);} if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot USB_CL/UART] TFTP timeout occurred" + newline);} if (reg_val & 1<<19 ) {file.write(" * Bit 19 : [Peripheral Boot UART] Xmodem 1K protocol selected " + newline);} if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<26 ) {file.write(" * Bit 26 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<27 ) {file.write(" * Bit 27 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<28 ) {file.write(" * Bit 28 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<29 ) {file.write(" * Bit 29 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<30 ) {file.write(" * Bit 30 : [Peripheral Boot] Reserved" + newline);} if (reg_val & 1<<31 ) {file.write(" * Bit 31 : [Peripheral Boot] Reserved" + newline);} debugSessionDAP.target.disconnect(); debugSessionA9 = ds.openSession("*","CortexA9"); debugSessionA9.target.connect(); // Get value of ARM Program Counter value = debugSessionA9.memory.readRegister("PC"); value_string = d2h(value); file.write(newline + "Cortex A9 Program Counter = 0x" + value_string + newline); switch (value){ case 0x30080: file.write(" -> Undefined exception default handler" + newline); break; case 0x30084: file.write(" -> SWI exception default handler" + newline); break; case 0x30088: file.write(" -> Prefetch abort exception default handler" + newline); value = debugSessionA9.memory.readRegister("R0"); // handler stores IFAR in R0 file.write(" -> IFAR = " + d2h(value) + newline); value = debugSessionA9.memory.readRegister("R1"); // handler stores IFSR in R1 file.write(" -> IFSR = " + d2h(value) + newline); break; case 0x3008C: file.write(" -> Data abort exception default handler" + newline); value = debugSessionA9.memory.readRegister("R0"); // handler stores DFAR in R0 file.write(" -> DFAR = " + d2h(value) + newline); value = debugSessionA9.memory.readRegister("R1"); // handler stores DFSR in R1 file.write(" -> DFSR = " + d2h(value) + newline); break; case 0x30090: file.write(" -> Unused exception default handler" + newline); break; case 0x30094: file.write(" -> IRQ exception default handler" + newline); break; case 0x30098: file.write(" -> FIQ exception default handler" + newline); break; case 0x3009C: file.write(" -> Validation tests PASS" + newline); break; case 0x300A0: file.write(" -> Validation tests FAIL" + newline); break; case 0x300A8: file.write(" -> Image not executed or returned" + newline); break; default: break; } debugSessionA9.target.disconnect(); print("Data collection complete."); file.close(); print("Created file " + filename);