am335x-evm: beta evm bringup changes for wlan and bt
[sitara-epos/sitara-epos-kernel.git] / arch / arm / mach-omap2 / board-am335xevm.c
1 /*
2  * Code for AM335X EVM.
3  *
4  * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/i2c/at24.h>
20 #include <linux/phy.h>
21 #include <linux/gpio.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/flash.h>
24 #include <linux/gpio_keys.h>
25 #include <linux/input.h>
26 #include <linux/input/matrix_keypad.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/nand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/platform_device.h>
31 #include <linux/clk.h>
32 #include <linux/err.h>
33 #include <linux/wl12xx.h>
34 #include <linux/ethtool.h>
36 /* LCD controller is similar to DA850 */
37 #include <video/da8xx-fb.h>
39 #include <mach/hardware.h>
40 #include <mach/board-am335xevm.h>
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45 #include <asm/hardware/asp.h>
47 #include <plat/irqs.h>
48 #include <plat/board.h>
49 #include <plat/common.h>
50 #include <plat/lcdc.h>
51 #include <plat/usb.h>
52 #include <plat/mmc.h>
54 #include "board-flash.h"
55 #include "mux.h"
56 #include "devices.h"
57 #include "hsmmc.h"
59 /* Convert GPIO signal to GPIO pin number */
60 #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
62 /* TLK PHY IDs */
63 #define TLK110_PHY_ID           0x2000A201
64 #define TLK110_PHY_MASK         0xfffffff0
66 /* BBB PHY IDs */
67 #define BBB_PHY_ID              0x7c0f1
68 #define BBB_PHY_MASK            0xfffffffe
70 /* TLK110 PHY register offsets */
71 #define TLK110_COARSEGAIN_REG   0x00A3
72 #define TLK110_LPFHPF_REG       0x00AC
73 #define TLK110_SPAREANALOG_REG  0x00B9
74 #define TLK110_VRCR_REG         0x00D0
75 #define TLK110_SETFFE_REG       0x0107
76 #define TLK110_FTSP_REG         0x0154
77 #define TLK110_ALFATPIDL_REG    0x002A
78 #define TLK110_PSCOEF21_REG     0x0096
79 #define TLK110_PSCOEF3_REG      0x0097
80 #define TLK110_ALFAFACTOR1_REG  0x002C
81 #define TLK110_ALFAFACTOR2_REG  0x0023
82 #define TLK110_CFGPS_REG        0x0095
83 #define TLK110_FTSPTXGAIN_REG   0x0150
84 #define TLK110_SWSCR3_REG       0x000B
85 #define TLK110_SCFALLBACK_REG   0x0040
86 #define TLK110_PHYRCR_REG       0x001F
88 /* TLK110 register writes values */
89 #define TLK110_COARSEGAIN_VAL   0x0000
90 #define TLK110_LPFHPF_VAL       0x8000
91 #define TLK110_SPANALOG_VAL     0x0000
92 #define TLK110_VRCR_VAL         0x0008
93 #define TLK110_SETFFE_VAL       0x0605
94 #define TLK110_FTSP_VAL         0x0255
95 #define TLK110_ALFATPIDL_VAL    0x7998
96 #define TLK110_PSCOEF21_VAL     0x3A20
97 #define TLK110_PSCOEF3_VAL      0x003F
98 #define TLK110_ALFACTOR1_VAL    0xFF80
99 #define TLK110_ALFACTOR2_VAL    0x021C
100 #define TLK110_CFGPS_VAL        0x0000
101 #define TLK110_FTSPTXGAIN_VAL   0x6A88
102 #define TLK110_SWSCR3_VAL       0x0000
103 #define TLK110_SCFALLBACK_VAL   0xC11D
104 #define TLK110_PHYRCR_VAL       0x4000
106 #ifdef CONFIG_TLK110_WORKAROUND
107 #define am335x_tlk110_phy_init()\
108         do {    \
109                 phy_register_fixup_for_uid(TLK110_PHY_ID,\
110                                         TLK110_PHY_MASK,\
111                                         am335x_tlk110_phy_fixup);\
112         } while (0);
113 #else
114 #define am335x_tlk110_phy_init() do { } while (0);
115 #endif
117 static const struct display_panel disp_panel = {
118         WVGA,
119         32,
120         32,
121         COLOR_ACTIVE,
122 };
124 static struct lcd_ctrl_config lcd_cfg = {
125         &disp_panel,
126         .ac_bias                = 255,
127         .ac_bias_intrpt         = 0,
128         .dma_burst_sz           = 16,
129         .bpp                    = 32,
130         .fdd                    = 0x80,
131         .tft_alt_mode           = 0,
132         .stn_565_mode           = 0,
133         .mono_8bit_mode         = 0,
134         .invert_line_clock      = 1,
135         .invert_frm_clock       = 1,
136         .sync_edge              = 0,
137         .sync_ctrl              = 1,
138         .raster_order           = 0,
139 };
141 struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
142         .manu_name              = "ThreeFive",
143         .controller_data        = &lcd_cfg,
144         .type                   = "TFC_S9700RTWV35TR_01B",
145 };
147 #include "common.h"
149 /* TSc controller */
150 #include <linux/input/ti_tscadc.h>
152 static struct resource tsc_resources[]  = {
153         [0] = {
154                 .start  = AM33XX_TSC_BASE,
155                 .end    = AM33XX_TSC_BASE + SZ_8K - 1,
156                 .flags  = IORESOURCE_MEM,
157         },
158         [1] = {
159                 .start  = AM33XX_IRQ_ADC_GEN,
160                 .end    = AM33XX_IRQ_ADC_GEN,
161                 .flags  = IORESOURCE_IRQ,
162         },
163 };
165 static struct tsc_data am335x_touchscreen_data  = {
166         .wires  = 4,
167         .x_plate_resistance = 200,
168 };
170 static struct platform_device tsc_device = {
171         .name   = "tsc",
172         .id     = -1,
173         .dev    = {
174                         .platform_data  = &am335x_touchscreen_data,
175         },
176         .num_resources  = ARRAY_SIZE(tsc_resources),
177         .resource       = tsc_resources,
178 };
180 static u8 am335x_iis_serializer_direction1[] = {
181         INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,        RX_MODE,
182         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
183         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
184         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
185 };
187 static struct snd_platform_data am335x_evm_snd_data1 = {
188         .tx_dma_offset  = 0x46400000,   /* McASP1 */
189         .rx_dma_offset  = 0x46400000,
190         .op_mode        = DAVINCI_MCASP_IIS_MODE,
191         .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
192         .tdm_slots      = 2,
193         .serial_dir     = am335x_iis_serializer_direction1,
194         .asp_chan_q     = EVENTQ_2,
195         .version        = MCASP_VERSION_3,
196         .txnumevt       = 1,
197         .rxnumevt       = 1,
198 };
200 static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
201         {
202                 .mmc            = 1,
203                 .caps           = MMC_CAP_4_BIT_DATA,
204                 .gpio_cd        = GPIO_TO_PIN(0, 6),
205                 .gpio_wp        = GPIO_TO_PIN(3, 18),
206                 .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
207         },
208         {
209                 .mmc            = 0,    /* will be set at runtime */
210         },
211         {
212                 .mmc            = 0,    /* will be set at runtime */
213         },
214         {}      /* Terminator */
215 };
218 #ifdef CONFIG_OMAP_MUX
219 static struct omap_board_mux board_mux[] __initdata = {
220         AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
221                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
222         AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
223                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
224         { .reg_offset = OMAP_MUX_TERMINATOR },
225 };
226 #else
227 #define board_mux       NULL
228 #endif
230 /* module pin mux structure */
231 struct pinmux_config {
232         const char *string_name; /* signal name format */
233         int val; /* Options for the mux register value */
234 };
236 struct evm_dev_cfg {
237         void (*device_init)(int evm_id, int profile);
239 /*
240 * If the device is required on both baseboard & daughter board (ex i2c),
241 * specify DEV_ON_BASEBOARD
242 */
243 #define DEV_ON_BASEBOARD        0
244 #define DEV_ON_DGHTR_BRD        1
245         u32 device_on;
247         u32 profile;    /* Profiles (0-7) in which the module is present */
248 };
250 /* AM335X - CPLD Register Offsets */
251 #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
252 #define CPLD_DEVICE_ID  0x04 /* CPLD identification */
253 #define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */
254 #define CPLD_CFG_REG    0x10 /* Configuration Register */
256 static struct i2c_client *cpld_client;
257 static u32 am335x_evm_id;
258 static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
259 };
261 /*
262 * EVM Config held in On-Board eeprom device.
264 * Header Format
266 *  Name                 Size    Contents
267 *                       (Bytes)
268 *-------------------------------------------------------------
269 *  Header               4       0xAA, 0x55, 0x33, 0xEE
271 *  Board Name           8       Name for board in ASCII.
272 *                               example "A33515BB" = "AM335X
273                                 Low Cost EVM board"
275 *  Version              4       Hardware version code for board in
276 *                               in ASCII. "1.0A" = rev.01.0A
278 *  Serial Number        12      Serial number of the board. This is a 12
279 *                               character string which is WWYY4P16nnnn, where
280 *                               WW = 2 digit week of the year of production
281 *                               YY = 2 digit year of production
282 *                               nnnn = incrementing board number
284 *  Configuration option 32      Codes(TBD) to show the configuration
285 *                               setup on this board.
287 *  Available            32720   Available space for other non-volatile
288 *                               data.
289 */
290 struct am335x_evm_eeprom_config {
291         u32     header;
292         u8      name[8];
293         char    version[4];
294         u8      serial[12];
295         u8      opt[32];
296 };
298 static struct am335x_evm_eeprom_config config;
299 static bool daughter_brd_detected;
301 #define GP_EVM_REV_IS_1_0               0x1
302 #define GP_EVM_REV_IS_1_1A              0x2
303 #define GP_EVM_REV_IS_UNKNOWN           0xFF
304 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
305 unsigned int gigabit_enable = 1;
307 #define EEPROM_MAC_ADDRESS_OFFSET       60 /* 4+8+4+12+32 */
308 #define EEPROM_NO_OF_MAC_ADDR           3
309 static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];
311 #define AM335X_EEPROM_HEADER            0xEE3355AA
313 /* current profile if exists else PROFILE_0 on error */
314 static u32 am335x_get_profile_selection(void)
316         int val = 0;
318         if (!cpld_client)
319                 /* error checking is not done in func's calling this routine.
320                 so return profile 0 on error */
321                 return 0;
323         val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
324         if (val < 0)
325                 return 0;       /* default to Profile 0 on Error */
326         else
327                 return val & 0x7;
330 /* Module pin mux for LCDC */
331 static struct pinmux_config lcdc_pin_mux[] = {
332         {"lcd_data0.lcd_data0",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
333                                                        | AM33XX_PULL_DISA},
334         {"lcd_data1.lcd_data1",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
335                                                        | AM33XX_PULL_DISA},
336         {"lcd_data2.lcd_data2",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
337                                                        | AM33XX_PULL_DISA},
338         {"lcd_data3.lcd_data3",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
339                                                        | AM33XX_PULL_DISA},
340         {"lcd_data4.lcd_data4",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
341                                                        | AM33XX_PULL_DISA},
342         {"lcd_data5.lcd_data5",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
343                                                        | AM33XX_PULL_DISA},
344         {"lcd_data6.lcd_data6",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
345                                                        | AM33XX_PULL_DISA},
346         {"lcd_data7.lcd_data7",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
347                                                        | AM33XX_PULL_DISA},
348         {"lcd_data8.lcd_data8",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
349                                                        | AM33XX_PULL_DISA},
350         {"lcd_data9.lcd_data9",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
351                                                        | AM33XX_PULL_DISA},
352         {"lcd_data10.lcd_data10",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
353                                                        | AM33XX_PULL_DISA},
354         {"lcd_data11.lcd_data11",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
355                                                        | AM33XX_PULL_DISA},
356         {"lcd_data12.lcd_data12",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
357                                                        | AM33XX_PULL_DISA},
358         {"lcd_data13.lcd_data13",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
359                                                        | AM33XX_PULL_DISA},
360         {"lcd_data14.lcd_data14",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
361                                                        | AM33XX_PULL_DISA},
362         {"lcd_data15.lcd_data15",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
363                                                        | AM33XX_PULL_DISA},
364         {"gpmc_ad8.lcd_data16",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
365         {"gpmc_ad9.lcd_data17",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
366         {"gpmc_ad10.lcd_data18",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
367         {"gpmc_ad11.lcd_data19",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
368         {"gpmc_ad12.lcd_data20",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
369         {"gpmc_ad13.lcd_data21",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
370         {"gpmc_ad14.lcd_data22",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
371         {"gpmc_ad15.lcd_data23",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
372         {"lcd_vsync.lcd_vsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
373         {"lcd_hsync.lcd_hsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
374         {"lcd_pclk.lcd_pclk",           OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
375         {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
376         {NULL, 0},
377 };
379 static struct pinmux_config tsc_pin_mux[] = {
380         {"ain0.ain0",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
381         {"ain1.ain1",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
382         {"ain2.ain2",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
383         {"ain3.ain3",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
384         {"vrefp.vrefp",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
385         {"vrefn.vrefn",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
386         {NULL, 0},
387 };
389 /* Pin mux for nand flash module */
390 static struct pinmux_config nand_pin_mux[] = {
391         {"gpmc_ad0.gpmc_ad0",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
392         {"gpmc_ad1.gpmc_ad1",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
393         {"gpmc_ad2.gpmc_ad2",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
394         {"gpmc_ad3.gpmc_ad3",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
395         {"gpmc_ad4.gpmc_ad4",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
396         {"gpmc_ad5.gpmc_ad5",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
397         {"gpmc_ad6.gpmc_ad6",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
398         {"gpmc_ad7.gpmc_ad7",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
399         {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
400         {"gpmc_wpn.gpmc_wpn",     OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
401         {"gpmc_csn0.gpmc_csn0",   OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
402         {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
403         {"gpmc_oen_ren.gpmc_oen_ren",    OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
404         {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
405         {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
406         {NULL, 0},
407 };
409 /* Module pin mux for SPI fash */
410 static struct pinmux_config spi0_pin_mux[] = {
411         {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
412                                                         | AM33XX_INPUT_EN},
413         {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
414                                                         | AM33XX_INPUT_EN},
415         {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
416                                                         | AM33XX_INPUT_EN},
417         {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
418                                                         | AM33XX_INPUT_EN},
419         {NULL, 0},
420 };
422 /* Module pin mux for SPI flash */
423 static struct pinmux_config spi1_pin_mux[] = {
424         {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
425                 | AM33XX_INPUT_EN},
426         {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
427                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
428         {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
429                 | AM33XX_INPUT_EN},
430         {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
431                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
432         {NULL, 0},
433 };
435 /* Module pin mux for rgmii1 */
436 static struct pinmux_config rgmii1_pin_mux[] = {
437         {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
438         {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
439         {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
440         {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
441         {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
442         {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
443         {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
444         {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
445         {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
446         {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
447         {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
448         {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
449         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
450         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
451         {NULL, 0},
452 };
454 /* Module pin mux for rgmii2 */
455 static struct pinmux_config rgmii2_pin_mux[] = {
456         {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
457         {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
458         {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
459         {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
460         {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
461         {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
462         {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
463         {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
464         {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
465         {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
466         {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
467         {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
468         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
469         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
470         {NULL, 0},
471 };
473 /* Module pin mux for mii1 */
474 static struct pinmux_config mii1_pin_mux[] = {
475         {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
476         {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
477         {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
478         {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
479         {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
480         {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
481         {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
482         {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
483         {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
484         {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
485         {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
486         {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
487         {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
488         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
489         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
490         {NULL, 0},
491 };
493 /* Module pin mux for rmii1 */
494 static struct pinmux_config rmii1_pin_mux[] = {
495         {"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
496         {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
497         {"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
498         {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
499         {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
500         {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
501         {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
502         {"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
503         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
504         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
505         {NULL, 0},
506 };
508 static struct pinmux_config i2c1_pin_mux[] = {
509         {"spi0_d1.i2c1_sda",    OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
510                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
511         {"spi0_cs0.i2c1_scl",   OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
512                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
513         {NULL, 0},
514 };
516 /* Module pin mux for mcasp1 */
517 static struct pinmux_config mcasp1_pin_mux[] = {
518         {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
519         {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
520         {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
521         {"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |
522                                                 AM33XX_PIN_INPUT_PULLDOWN},
523         {NULL, 0},
524 };
527 /* Module pin mux for mmc0 */
528 static struct pinmux_config mmc0_pin_mux[] = {
529         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
530         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
531         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
532         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
533         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
534         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
535         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
536         {"spi0_cs1.mmc0_sdcd",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
537         {NULL, 0},
538 };
540 static struct pinmux_config mmc0_no_cd_pin_mux[] = {
541         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
542         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
543         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
544         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
545         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
546         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
547         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
548         {NULL, 0},
549 };
551 /* Module pin mux for mmc1 */
552 static struct pinmux_config mmc1_pin_mux[] = {
553         {"gpmc_ad7.mmc1_dat7",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
554         {"gpmc_ad6.mmc1_dat6",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
555         {"gpmc_ad5.mmc1_dat5",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
556         {"gpmc_ad4.mmc1_dat4",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
557         {"gpmc_ad3.mmc1_dat3",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
558         {"gpmc_ad2.mmc1_dat2",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
559         {"gpmc_ad1.mmc1_dat1",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
560         {"gpmc_ad0.mmc1_dat0",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
561         {"gpmc_csn1.mmc1_clk",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
562         {"gpmc_csn2.mmc1_cmd",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
563         {"gpmc_csn0.mmc1_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
564         {"gpmc_advn_ale.mmc1_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
565         {NULL, 0},
566 };
568 /* Module pin mux for uart3 */
569 static struct pinmux_config uart3_pin_mux[] = {
570         {"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},
571         {"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},
572         {NULL, 0},
573 };
575 static struct pinmux_config d_can_gp_pin_mux[] = {
576         {"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
577         {"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
578         {NULL, 0},
579 };
581 static struct pinmux_config d_can_ia_pin_mux[] = {
582         {"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
583         {"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
584         {NULL, 0},
585 };
587 /*
588 * @pin_mux - single module pin-mux structure which defines pin-mux
589 *                       details for all its pins.
590 */
591 static void setup_pin_mux(struct pinmux_config *pin_mux)
593         int i;
595         for (i = 0; pin_mux->string_name != NULL; pin_mux++)
596                 omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
600 /* Matrix GPIO Keypad Support for profile-0 only: TODO */
602 /* pinmux for keypad device */
603 static struct pinmux_config matrix_keypad_pin_mux[] = {
604         {"gpmc_a5.gpio1_21",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
605         {"gpmc_a6.gpio1_22",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
606         {"gpmc_a9.gpio1_25",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
607         {"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
608         {"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
609         {NULL, 0},
610 };
612 /* Keys mapping */
613 static const uint32_t am335x_evm_matrix_keys[] = {
614         KEY(0, 0, KEY_MENU),
615         KEY(1, 0, KEY_BACK),
616         KEY(2, 0, KEY_LEFT),
618         KEY(0, 1, KEY_RIGHT),
619         KEY(1, 1, KEY_ENTER),
620         KEY(2, 1, KEY_DOWN),
621 };
623 const struct matrix_keymap_data am335x_evm_keymap_data = {
624         .keymap      = am335x_evm_matrix_keys,
625         .keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),
626 };
628 static const unsigned int am335x_evm_keypad_row_gpios[] = {
629         GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)
630 };
632 static const unsigned int am335x_evm_keypad_col_gpios[] = {
633         GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)
634 };
636 static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {
637         .keymap_data       = &am335x_evm_keymap_data,
638         .row_gpios         = am335x_evm_keypad_row_gpios,
639         .num_row_gpios     = ARRAY_SIZE(am335x_evm_keypad_row_gpios),
640         .col_gpios         = am335x_evm_keypad_col_gpios,
641         .num_col_gpios     = ARRAY_SIZE(am335x_evm_keypad_col_gpios),
642         .active_low        = false,
643         .debounce_ms       = 5,
644         .col_scan_delay_us = 2,
645 };
647 static struct platform_device am335x_evm_keyboard = {
648         .name  = "matrix-keypad",
649         .id    = -1,
650         .dev   = {
651                 .platform_data = &am335x_evm_keypad_platform_data,
652         },
653 };
655 static void matrix_keypad_init(int evm_id, int profile)
657         int err;
659         setup_pin_mux(matrix_keypad_pin_mux);
660         err = platform_device_register(&am335x_evm_keyboard);
661         if (err) {
662                 pr_err("failed to register matrix keypad (2x3) device\n");
663         }
667 /* pinmux for keypad device */
668 static struct pinmux_config volume_keys_pin_mux[] = {
669         {"spi0_sclk.gpio0_2",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
670         {"spi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
671         {NULL, 0},
672 };
674 /* Configure GPIOs for Volume Keys */
675 static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {
676         {
677                 .code                   = KEY_VOLUMEUP,
678                 .gpio                   = GPIO_TO_PIN(0, 2),
679                 .active_low             = true,
680                 .desc                   = "volume-up",
681                 .type                   = EV_KEY,
682                 .wakeup                 = 1,
683         },
684         {
685                 .code                   = KEY_VOLUMEDOWN,
686                 .gpio                   = GPIO_TO_PIN(0, 3),
687                 .active_low             = true,
688                 .desc                   = "volume-down",
689                 .type                   = EV_KEY,
690                 .wakeup                 = 1,
691         },
692 };
694 static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {
695         .buttons        = am335x_evm_volume_gpio_buttons,
696         .nbuttons       = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),
697 };
699 static struct platform_device am335x_evm_volume_keys = {
700         .name   = "gpio-keys",
701         .id     = -1,
702         .dev    = {
703                 .platform_data  = &am335x_evm_volume_gpio_key_info,
704         },
705 };
707 static void volume_keys_init(int evm_id, int profile)
709         int err;
711         setup_pin_mux(volume_keys_pin_mux);
712         err = platform_device_register(&am335x_evm_volume_keys);
713         if (err)
714                 pr_err("failed to register matrix keypad (2x3) device\n");
717 /*
718 * @evm_id - evm id which needs to be configured
719 * @dev_cfg - single evm structure which includes
720 *                               all module inits, pin-mux defines
721 * @profile - if present, else PROFILE_NONE
722 * @dghtr_brd_flg - Whether Daughter board is present or not
723 */
724 static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
725         int profile)
727         int i;
729         /*
730         * Only General Purpose & Industrial Auto Motro Control
731         * EVM has profiles. So check if this evm has profile.
732         * If not, ignore the profile comparison
733         */
735         /*
736         * If the device is on baseboard, directly configure it. Else (device on
737         * Daughter board), check if the daughter card is detected.
738         */
739         if (profile == PROFILE_NONE) {
740                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
741                         if (dev_cfg->device_on == DEV_ON_BASEBOARD)
742                                 dev_cfg->device_init(evm_id, profile);
743                         else if (daughter_brd_detected == true)
744                                 dev_cfg->device_init(evm_id, profile);
745                 }
746         } else {
747                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
748                         if (dev_cfg->profile & profile) {
749                                 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
750                                         dev_cfg->device_init(evm_id, profile);
751                                 else if (daughter_brd_detected == true)
752                                         dev_cfg->device_init(evm_id, profile);
753                         }
754                 }
755         }
758 #define AM335X_LCD_BL_PIN       GPIO_TO_PIN(0, 7)
760 /* pinmux for usb0 drvvbus */
761 static struct pinmux_config usb0_pin_mux[] = {
762         {"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
763         {NULL, 0},
764 };
766 /* pinmux for usb1 drvvbus */
767 static struct pinmux_config usb1_pin_mux[] = {
768         {"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
769         {NULL, 0},
770 };
772 /* pinmux for profibus */
773 static struct pinmux_config profibus_pin_mux[] = {
774         {"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},
775         {"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
776         {"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
777         {NULL, 0},
778 };
780 /* Module pin mux for eCAP0 */
781 static struct pinmux_config ecap0_pin_mux[] = {
782         {"ecap0_in_pwm0_out.gpio0_7", AM33XX_PIN_OUTPUT},
783         {NULL, 0},
784 };
786 static int backlight_enable;
788 #define AM335XEVM_WLAN_PMENA_GPIO       GPIO_TO_PIN(1, 30)
789 #define AM335XEVM_WLAN_IRQ_GPIO         GPIO_TO_PIN(3, 17)
791 struct wl12xx_platform_data am335xevm_wlan_data = {
792         .irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
793         .board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
794 };
796 /* Module pin mux for wlan and bluetooth */
797 static struct pinmux_config mmc2_wl12xx_pin_mux[] = {
798         {"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
799         {"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
800         {"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
801         {"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
802         {"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
803         {"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
804         {NULL, 0},
805 };
807 static struct pinmux_config uart1_wl12xx_pin_mux[] = {
808         {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
809         {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
810         {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
811         {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
812         {NULL, 0},
813 };
815 static struct pinmux_config wl12xx_pin_mux_evm_rev1_1a[] = {
816         {"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
817         {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
818         {"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
819         {NULL, 0},
820  };
822 static struct pinmux_config wl12xx_pin_mux_evm_rev1_0[] = {
823         {"gpmc_csn1.gpio1_30", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
824         {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
825         {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
826         {NULL, 0},
827  };
829 static void enable_ecap0(int evm_id, int profile)
831         backlight_enable = true;
834 static int __init ecap0_init(void)
836         int status = 0;
838         if (backlight_enable) {
839                 setup_pin_mux(ecap0_pin_mux);
841                 status = gpio_request(AM335X_LCD_BL_PIN, "lcd bl\n");
842                 if (status < 0)
843                         pr_warn("Failed to request gpio for LCD backlight\n");
845                 gpio_direction_output(AM335X_LCD_BL_PIN, 1);
846         }
847         return status;
849 late_initcall(ecap0_init);
851 static int __init conf_disp_pll(int rate)
853         struct clk *disp_pll;
854         int ret = -EINVAL;
856         disp_pll = clk_get(NULL, "dpll_disp_ck");
857         if (IS_ERR(disp_pll)) {
858                 pr_err("Cannot clk_get disp_pll\n");
859                 goto out;
860         }
862         ret = clk_set_rate(disp_pll, rate);
863         clk_put(disp_pll);
864 out:
865         return ret;
868 static void lcdc_init(int evm_id, int profile)
871         setup_pin_mux(lcdc_pin_mux);
873         if (conf_disp_pll(300000000)) {
874                 pr_info("Failed configure display PLL, not attempting to"
875                                 "register LCDC\n");
876                 return;
877         }
879         if (am33xx_register_lcdc(&TFC_S9700RTWV35TR_01B_pdata))
880                 pr_info("Failed to register LCDC device\n");
881         return;
884 static void tsc_init(int evm_id, int profile)
886         int err;
888         if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
889                 am335x_touchscreen_data.analog_input = 1;
890                 pr_info("TSC connected to beta GP EVM\n");
891         } else {
892                 am335x_touchscreen_data.analog_input = 0;
893                 pr_info("TSC connected to alpha GP EVM\n");
894         }
895         setup_pin_mux(tsc_pin_mux);
896         err = platform_device_register(&tsc_device);
897         if (err)
898                 pr_err("failed to register touchscreen device\n");
901 static void rgmii1_init(int evm_id, int profile)
903         setup_pin_mux(rgmii1_pin_mux);
904         return;
907 static void rgmii2_init(int evm_id, int profile)
909         setup_pin_mux(rgmii2_pin_mux);
910         return;
913 static void mii1_init(int evm_id, int profile)
915         setup_pin_mux(mii1_pin_mux);
916         return;
919 static void rmii1_init(int evm_id, int profile)
921         setup_pin_mux(rmii1_pin_mux);
922         return;
925 static void usb0_init(int evm_id, int profile)
927         setup_pin_mux(usb0_pin_mux);
928         return;
931 static void usb1_init(int evm_id, int profile)
933         setup_pin_mux(usb1_pin_mux);
934         return;
937 /* setup uart3 */
938 static void uart3_init(int evm_id, int profile)
940         setup_pin_mux(uart3_pin_mux);
941         return;
944 /* NAND partition information */
945 static struct mtd_partition am335x_nand_partitions[] = {
946 /* All the partition sizes are listed in terms of NAND block size */
947         {
948                 .name           = "SPL",
949                 .offset         = 0,                    /* Offset = 0x0 */
950                 .size           = SZ_128K,
951         },
952         {
953                 .name           = "SPL.backup1",
954                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x20000 */
955                 .size           = SZ_128K,
956         },
957         {
958                 .name           = "SPL.backup2",
959                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x40000 */
960                 .size           = SZ_128K,
961         },
962         {
963                 .name           = "SPL.backup3",
964                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x60000 */
965                 .size           = SZ_128K,
966         },
967         {
968                 .name           = "U-Boot",
969                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
970                 .size           = 15 * SZ_128K,
971         },
972         {
973                 .name           = "U-Boot Env",
974                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
975                 .size           = 1 * SZ_128K,
976         },
977         {
978                 .name           = "Kernel",
979                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
980                 .size           = 40 * SZ_128K,
981         },
982         {
983                 .name           = "File System",
984                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
985                 .size           = MTDPART_SIZ_FULL,
986         },
987 };
989 /* SPI 0/1 Platform Data */
990 /* SPI flash information */
991 static struct mtd_partition am335x_spi_partitions[] = {
992         /* All the partition sizes are listed in terms of erase size */
993         {
994                 .name       = "SPL",
995                 .offset     = 0,                        /* Offset = 0x0 */
996                 .size       = SZ_128K,
997         },
998         {
999                 .name       = "U-Boot",
1000                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x20000 */
1001                 .size       = 2 * SZ_128K,
1002         },
1003         {
1004                 .name       = "U-Boot Env",
1005                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x60000 */
1006                 .size       = 2 * SZ_4K,
1007         },
1008         {
1009                 .name       = "Kernel",
1010                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x62000 */
1011                 .size       = 28 * SZ_128K,
1012         },
1013         {
1014                 .name       = "File System",
1015                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x3E2000 */
1016                 .size       = MTDPART_SIZ_FULL,         /* size ~= 4.1 MiB */
1017         }
1018 };
1020 static const struct flash_platform_data am335x_spi_flash = {
1021         .type      = "w25q64",
1022         .name      = "spi_flash",
1023         .parts     = am335x_spi_partitions,
1024         .nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
1025 };
1027 /*
1028  * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
1029  * So setup Max speed to be less than that of Controller speed
1030  */
1031 static struct spi_board_info am335x_spi0_slave_info[] = {
1032         {
1033                 .modalias      = "m25p80",
1034                 .platform_data = &am335x_spi_flash,
1035                 .irq           = -1,
1036                 .max_speed_hz  = 24000000,
1037                 .bus_num       = 1,
1038                 .chip_select   = 0,
1039         },
1040 };
1042 static struct spi_board_info am335x_spi1_slave_info[] = {
1043         {
1044                 .modalias      = "m25p80",
1045                 .platform_data = &am335x_spi_flash,
1046                 .irq           = -1,
1047                 .max_speed_hz  = 12000000,
1048                 .bus_num       = 2,
1049                 .chip_select   = 0,
1050         },
1051 };
1053 static void evm_nand_init(int evm_id, int profile)
1055         setup_pin_mux(nand_pin_mux);
1056         board_nand_init(am335x_nand_partitions,
1057                 ARRAY_SIZE(am335x_nand_partitions), 0, 0);
1060 static struct i2c_board_info am335x_i2c_boardinfo1[] = {
1061         {
1062                 I2C_BOARD_INFO("tlv320aic3x", 0x1b),
1063         },
1064 };
1066 static void i2c1_init(int evm_id, int profile)
1068         setup_pin_mux(i2c1_pin_mux);
1069         omap_register_i2c_bus(2, 100, am335x_i2c_boardinfo1,
1070                         ARRAY_SIZE(am335x_i2c_boardinfo1));
1071         return;
1074 /* Setup McASP 1 */
1075 static void mcasp1_init(int evm_id, int profile)
1077         /* Configure McASP */
1078         setup_pin_mux(mcasp1_pin_mux);
1079         am335x_register_mcasp1(&am335x_evm_snd_data1);
1080         return;
1083 static void mmc1_init(int evm_id, int profile)
1085         setup_pin_mux(mmc1_pin_mux);
1087         am335x_mmc[1].mmc = 2;
1088         am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
1089         am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
1090         am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
1091         am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
1093         /* mmc will be initialized when mmc0_init is called */
1094         return;
1097 static void mmc2_wl12xx_init(int evm_id, int profile)
1099         setup_pin_mux(mmc2_wl12xx_pin_mux);
1101         am335x_mmc[1].mmc = 3;
1102         am335x_mmc[1].name = "wl1271";
1103         am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
1104                                 | MMC_PM_KEEP_POWER;
1105         am335x_mmc[1].nonremovable = true;
1106         am335x_mmc[1].gpio_cd = -EINVAL;
1107         am335x_mmc[1].gpio_wp = -EINVAL;
1108         am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
1110         /* mmc will be initialized when mmc0_init is called */
1111         return;
1114 static void uart1_wl12xx_init(int evm_id, int profile)
1116         setup_pin_mux(uart1_wl12xx_pin_mux);
1119 static void wl12xx_bluetooth_enable(void)
1121         int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,
1122                 "bt_en\n");
1123         if (status < 0)
1124                 pr_err("Failed to request gpio for bt_enable");
1126         pr_info("Configure Bluetooth Enable pin...\n");
1127         gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
1130 static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
1132         if (on) {
1133                 gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 1);
1134                 mdelay(70);
1135         }
1136         else
1137                 gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 0);
1139         return 0;
1142 static void wl12xx_init(int evm_id, int profile)
1144         struct device *dev;
1145         struct omap_mmc_platform_data *pdata;
1146         int ret;
1148         /* Register WLAN and BT enable pins based on the evm board revision */
1149         if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
1150                 am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 16);
1151                 am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
1152         }
1153         else {
1154                 am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 30);
1155                 am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(1, 31);
1156         }
1158         wl12xx_bluetooth_enable();
1160         if (wl12xx_set_platform_data(&am335xevm_wlan_data))
1161                 pr_err("error setting wl12xx data\n");
1163         dev = am335x_mmc[1].dev;
1164         if (!dev) {
1165                 pr_err("wl12xx mmc device initialization failed\n");
1166                 goto out;
1167         }
1169         pdata = dev->platform_data;
1170         if (!pdata) {
1171                 pr_err("Platfrom data of wl12xx device not set\n");
1172                 goto out;
1173         }
1175         ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,
1176                 GPIOF_OUT_INIT_LOW, "wlan_en");
1177         if (ret) {
1178                 pr_err("Error requesting wlan enable gpio: %d\n", ret);
1179                 goto out;
1180         }
1182         if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
1183                 setup_pin_mux(wl12xx_pin_mux_evm_rev1_1a);
1184         else
1185                 setup_pin_mux(wl12xx_pin_mux_evm_rev1_0);
1187         pdata->slots[0].set_power = wl12xx_set_power;
1188 out:
1189         return;
1192 static void d_can_init(int evm_id, int profile)
1194         switch (evm_id) {
1195         case IND_AUT_MTR_EVM:
1196                 if ((profile == PROFILE_0) || (profile == PROFILE_1)) {
1197                         setup_pin_mux(d_can_ia_pin_mux);
1198                         /* Instance Zero */
1199                         am33xx_d_can_init(0);
1200                 }
1201                 break;
1202         case GEN_PURP_EVM:
1203                 if (profile == PROFILE_1) {
1204                         setup_pin_mux(d_can_gp_pin_mux);
1205                         /* Instance One */
1206                         am33xx_d_can_init(1);
1207                 }
1208                 break;
1209         default:
1210                 break;
1211         }
1214 static void mmc0_init(int evm_id, int profile)
1216         setup_pin_mux(mmc0_pin_mux);
1218         omap2_hsmmc_init(am335x_mmc);
1219         return;
1222 static void mmc0_no_cd_init(int evm_id, int profile)
1224         setup_pin_mux(mmc0_no_cd_pin_mux);
1226         omap2_hsmmc_init(am335x_mmc);
1227         return;
1231 /* setup spi0 */
1232 static void spi0_init(int evm_id, int profile)
1234         setup_pin_mux(spi0_pin_mux);
1235         spi_register_board_info(am335x_spi0_slave_info,
1236                         ARRAY_SIZE(am335x_spi0_slave_info));
1237         return;
1240 /* setup spi1 */
1241 static void spi1_init(int evm_id, int profile)
1243         setup_pin_mux(spi1_pin_mux);
1244         spi_register_board_info(am335x_spi1_slave_info,
1245                         ARRAY_SIZE(am335x_spi1_slave_info));
1246         return;
1250 static int beaglebone_phy_fixup(struct phy_device *phydev)
1252         phydev->supported &= ~(SUPPORTED_100baseT_Half |
1253                                 SUPPORTED_100baseT_Full);
1255         return 0;
1258 #ifdef CONFIG_TLK110_WORKAROUND
1259 static int am335x_tlk110_phy_fixup(struct phy_device *phydev)
1261         unsigned int val;
1263         /* This is done as a workaround to support TLK110 rev1.0 phy */
1264         val = phy_read(phydev, TLK110_COARSEGAIN_REG);
1265         phy_write(phydev, TLK110_COARSEGAIN_REG, (val | TLK110_COARSEGAIN_VAL));
1267         val = phy_read(phydev, TLK110_LPFHPF_REG);
1268         phy_write(phydev, TLK110_LPFHPF_REG, (val | TLK110_LPFHPF_VAL));
1270         val = phy_read(phydev, TLK110_SPAREANALOG_REG);
1271         phy_write(phydev, TLK110_SPAREANALOG_REG, (val | TLK110_SPANALOG_VAL));
1273         val = phy_read(phydev, TLK110_VRCR_REG);
1274         phy_write(phydev, TLK110_VRCR_REG, (val | TLK110_VRCR_VAL));
1276         val = phy_read(phydev, TLK110_SETFFE_REG);
1277         phy_write(phydev, TLK110_SETFFE_REG, (val | TLK110_SETFFE_VAL));
1279         val = phy_read(phydev, TLK110_FTSP_REG);
1280         phy_write(phydev, TLK110_FTSP_REG, (val | TLK110_FTSP_VAL));
1282         val = phy_read(phydev, TLK110_ALFATPIDL_REG);
1283         phy_write(phydev, TLK110_ALFATPIDL_REG, (val | TLK110_ALFATPIDL_VAL));
1285         val = phy_read(phydev, TLK110_PSCOEF21_REG);
1286         phy_write(phydev, TLK110_PSCOEF21_REG, (val | TLK110_PSCOEF21_VAL));
1288         val = phy_read(phydev, TLK110_PSCOEF3_REG);
1289         phy_write(phydev, TLK110_PSCOEF3_REG, (val | TLK110_PSCOEF3_VAL));
1291         val = phy_read(phydev, TLK110_ALFAFACTOR1_REG);
1292         phy_write(phydev, TLK110_ALFAFACTOR1_REG, (val | TLK110_ALFACTOR1_VAL));
1294         val = phy_read(phydev, TLK110_ALFAFACTOR2_REG);
1295         phy_write(phydev, TLK110_ALFAFACTOR2_REG, (val | TLK110_ALFACTOR2_VAL));
1297         val = phy_read(phydev, TLK110_CFGPS_REG);
1298         phy_write(phydev, TLK110_CFGPS_REG, (val | TLK110_CFGPS_VAL));
1300         val = phy_read(phydev, TLK110_FTSPTXGAIN_REG);
1301         phy_write(phydev, TLK110_FTSPTXGAIN_REG, (val | TLK110_FTSPTXGAIN_VAL));
1303         val = phy_read(phydev, TLK110_SWSCR3_REG);
1304         phy_write(phydev, TLK110_SWSCR3_REG, (val | TLK110_SWSCR3_VAL));
1306         val = phy_read(phydev, TLK110_SCFALLBACK_REG);
1307         phy_write(phydev, TLK110_SCFALLBACK_REG, (val | TLK110_SCFALLBACK_VAL));
1309         val = phy_read(phydev, TLK110_PHYRCR_REG);
1310         phy_write(phydev, TLK110_PHYRCR_REG, (val | TLK110_PHYRCR_VAL));
1312         return 0;
1314 #endif
1316 static void profibus_init(int evm_id, int profile)
1318         setup_pin_mux(profibus_pin_mux);
1319         return;
1322 /* Low-Cost EVM */
1323 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
1324         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
1325         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1326         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1327         {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1328         {NULL, 0, 0},
1329 };
1331 /* General Purpose EVM */
1332 static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
1333         {enable_ecap0,  DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1334                                                 PROFILE_2 | PROFILE_7) },
1335         {lcdc_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1336                                                 PROFILE_2 | PROFILE_7) },
1337         {tsc_init,      DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1338                                                 PROFILE_2 | PROFILE_7) },
1339         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
1340         {rgmii2_init,   DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
1341                                                 PROFILE_4 | PROFILE_6) },
1342         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1343         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1344         {evm_nand_init, DEV_ON_DGHTR_BRD,
1345                 (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
1346         {i2c1_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
1347         {mcasp1_init,   DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
1348         {mmc1_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
1349         {mmc2_wl12xx_init,      DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1350                                                                 PROFILE_5)},
1351         {mmc0_init,     DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
1352         {mmc0_no_cd_init,       DEV_ON_BASEBOARD, PROFILE_5},
1353         {spi0_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
1354         {uart1_wl12xx_init,     DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1355                                                                 PROFILE_5)},
1356         {wl12xx_init,   DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
1357         {d_can_init,    DEV_ON_DGHTR_BRD, PROFILE_1},
1358         {matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
1359         {volume_keys_init,  DEV_ON_DGHTR_BRD, PROFILE_0},
1360         {NULL, 0, 0},
1361 };
1363 /* Industrial Auto Motor Control EVM */
1364 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
1365         {mii1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
1366         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1367         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1368         {profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1369         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1370         {spi1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
1371         {uart3_init,    DEV_ON_DGHTR_BRD, PROFILE_ALL},
1372         {i2c1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1373         {mmc0_no_cd_init,       DEV_ON_BASEBOARD, PROFILE_ALL},
1374         {NULL, 0, 0},
1375 };
1377 /* IP-Phone EVM */
1378 static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
1379         {enable_ecap0,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
1380         {lcdc_init,     DEV_ON_DGHTR_BRD, PROFILE_NONE},
1381         {tsc_init,      DEV_ON_DGHTR_BRD, PROFILE_NONE},
1382         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
1383         {rgmii2_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
1384         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1385         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1386         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1387         {i2c1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1388         {mcasp1_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
1389         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1390         {NULL, 0, 0},
1391 };
1393 /* Beaglebone < Rev A3 */
1394 static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {
1395         {rmii1_init,    DEV_ON_BASEBOARD, PROFILE_NONE},
1396         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1397         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1398         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1399         {NULL, 0, 0},
1400 };
1402 /* Beaglebone Rev A3 and after */
1403 static struct evm_dev_cfg beaglebone_dev_cfg[] = {
1404         {mii1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1405         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1406         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1407         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1408         {NULL, 0, 0},
1409 };
1411 static void setup_low_cost_evm(void)
1413         pr_info("The board is a AM335x Low Cost EVM.\n");
1415         _configure_device(LOW_COST_EVM, low_cost_evm_dev_cfg, PROFILE_NONE);
1418 static void setup_general_purpose_evm(void)
1420         u32 prof_sel = am335x_get_profile_selection();
1421         pr_info("The board is general purpose EVM in profile %d\n", prof_sel);
1423         if (!strncmp("1.1A", config.version, 4)) {
1424                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1425         } else if (!strncmp("1.0", config.version, 3)) {
1426                 gp_evm_revision = GP_EVM_REV_IS_1_0;
1427         } else {
1428                 pr_err("Found invalid GP EVM revision, falling back to Rev1.1A");
1429                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1430         }
1432         if (gp_evm_revision == GP_EVM_REV_IS_1_0)
1433                 gigabit_enable = 0;
1434         else if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
1435                 gigabit_enable = 1;
1437         _configure_device(GEN_PURP_EVM, gen_purp_evm_dev_cfg, (1L << prof_sel));
1440 static void setup_ind_auto_motor_ctrl_evm(void)
1442         u32 prof_sel = am335x_get_profile_selection();
1444         pr_info("The board is an industrial automation EVM in profile %d\n",
1445                 prof_sel);
1447         /* Only Profile 0 is supported */
1448         if ((1L << prof_sel) != PROFILE_0) {
1449                 pr_err("AM335X: Only Profile 0 is supported\n");
1450                 pr_err("Assuming profile 0 & continuing\n");
1451                 prof_sel = PROFILE_0;
1452         }
1454         _configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
1455                 PROFILE_0);
1457         /* Fillup global evmid */
1458         am33xx_evmid_fillup(IND_AUT_MTR_EVM);
1460         /* Initialize TLK110 PHY registers for phy version 1.0 */
1461         am335x_tlk110_phy_init();
1466 static void setup_ip_phone_evm(void)
1468         pr_info("The board is an IP phone EVM\n");
1470         _configure_device(IP_PHN_EVM, ip_phn_evm_dev_cfg, PROFILE_NONE);
1473 /* BeagleBone < Rev A3 */
1474 static void setup_beaglebone_old(void)
1476         pr_info("The board is a AM335x Beaglebone < Rev A3.\n");
1478         /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
1479         am335x_mmc[0].gpio_wp = -EINVAL;
1481         _configure_device(LOW_COST_EVM, beaglebone_old_dev_cfg, PROFILE_NONE);
1483         phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,
1484                                         beaglebone_phy_fixup);
1487 /* BeagleBone after Rev A3 */
1488 static void setup_beaglebone(void)
1490         pr_info("The board is a AM335x Beaglebone.\n");
1492         /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
1493         am335x_mmc[0].gpio_wp = -EINVAL;
1495         _configure_device(LOW_COST_EVM, beaglebone_dev_cfg, PROFILE_NONE);
1499 static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
1501         u8 tmp;
1502         int ret;
1504         /*
1505          * try reading a byte from the EEPROM to see if it is
1506          * present. We could read a lot more, but that would
1507          * just slow the boot process and we have all the information
1508          * we need from the EEPROM on the base board anyway.
1509          */
1510         ret = m->read(m, &tmp, 0, sizeof(u8));
1511         if (ret == sizeof(u8)) {
1512                 pr_info("Detected a daughter card on AM335x EVM..");
1513                 daughter_brd_detected = true;
1514         } else {
1515                 pr_info("No daughter card found\n");
1516                 daughter_brd_detected = false;
1517         }
1520 static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
1522         int ret;
1523         char tmp[10];
1525         /* 1st get the MAC address from EEPROM */
1526         ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,
1527                 EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));
1529         if (ret != sizeof(am335x_mac_addr)) {
1530                 pr_warning("AM335X: EVM Config read fail: %d\n", ret);
1531                 return;
1532         }
1534         /* Fillup global mac id */
1535         am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],
1536                                 &am335x_mac_addr[1][0]);
1538         /* get board specific data */
1539         ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
1540         if (ret != sizeof(config)) {
1541                 pr_warning("AM335X EVM config read fail, read %d bytes\n", ret);
1542                 return;
1543         }
1545         if (config.header != AM335X_EEPROM_HEADER) {
1546                 pr_warning("AM335X: wrong header 0x%x, expected 0x%x\n",
1547                         config.header, AM335X_EEPROM_HEADER);
1548                 goto out;
1549         }
1551         if (strncmp("A335", config.name, 4)) {
1552                 pr_err("Board %s doesn't look like an AM335x board\n",
1553                         config.name);
1554                 goto out;
1555         }
1557         snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);
1558         pr_info("Board name: %s\n", tmp);
1559         snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);
1560         pr_info("Board version: %s\n", tmp);
1562         if (!strncmp("A335BONE", config.name, 8)) {
1563                 daughter_brd_detected = false;
1564                 if(!strncmp("00A1", config.version, 4) ||
1565                    !strncmp("00A2", config.version, 4))
1566                         setup_beaglebone_old();
1567                 else
1568                         setup_beaglebone();
1569         } else {
1570                 /* only 6 characters of options string used for now */
1571                 snprintf(tmp, 7, "%s", config.opt);
1572                 pr_info("SKU: %s\n", tmp);
1574                 if (!strncmp("SKU#00", config.opt, 6))
1575                         setup_low_cost_evm();
1576                 else if (!strncmp("SKU#01", config.opt, 6))
1577                         setup_general_purpose_evm();
1578                 else if (!strncmp("SKU#02", config.opt, 6))
1579                         setup_ind_auto_motor_ctrl_evm();
1580                 else if (!strncmp("SKU#03", config.opt, 6))
1581                         setup_ip_phone_evm();
1582                 else
1583                         goto out;
1584         }
1585         /* Initialize cpsw after board detection is completed as board
1586          * information is required for configuring phy address and hence
1587          * should be call only after board detection
1588          */
1589         am33xx_cpsw_init(gigabit_enable);
1591         return;
1592 out:
1593         /*
1594          * If the EEPROM hasn't been programed or an incorrect header
1595          * or board name are read, assume this is an old beaglebone board
1596          * (< Rev A3)
1597          */
1598         pr_err("Could not detect any board, falling back to: "
1599                 "Beaglebone (< Rev A3) with no daughter card connected\n");
1600         daughter_brd_detected = false;
1601         setup_beaglebone_old();
1603         /* Initialize cpsw after board detection is completed as board
1604          * information is required for configuring phy address and hence
1605          * should be call only after board detection
1606          */
1608         am33xx_cpsw_init(gigabit_enable);
1611 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
1612         .byte_len       = (256*1024) / 8,
1613         .page_size      = 64,
1614         .flags          = AT24_FLAG_ADDR16,
1615         .setup          = am335x_setup_daughter_board,
1616         .context        = (void *)NULL,
1617 };
1619 static struct at24_platform_data am335x_baseboard_eeprom_info = {
1620         .byte_len       = (256*1024) / 8,
1621         .page_size      = 64,
1622         .flags          = AT24_FLAG_ADDR16,
1623         .setup          = am335x_evm_setup,
1624         .context        = (void *)NULL,
1625 };
1627 /*
1628 * Daughter board Detection.
1629 * Every board has a ID memory (EEPROM) on board. We probe these devices at
1630 * machine init, starting from daughter board and ending with baseboard.
1631 * Assumptions :
1632 *       1. probe for i2c devices are called in the order they are included in
1633 *          the below struct. Daughter boards eeprom are probed 1st. Baseboard
1634 *          eeprom probe is called last.
1635 */
1636 static struct i2c_board_info __initdata am335x_i2c_boardinfo[] = {
1637         {
1638                 /* Daughter Board EEPROM */
1639                 I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
1640                 .platform_data  = &am335x_daughter_board_eeprom_info,
1641         },
1642         {
1643                 /* Baseboard board EEPROM */
1644                 I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
1645                 .platform_data  = &am335x_baseboard_eeprom_info,
1646         },
1647         {
1648                 I2C_BOARD_INFO("cpld_reg", 0x35),
1649         },
1650         {
1651                 I2C_BOARD_INFO("tlc59108", 0x40),
1652         },
1654 };
1656 static struct omap_musb_board_data musb_board_data = {
1657         .interface_type = MUSB_INTERFACE_ULPI,
1658         .mode           = MUSB_OTG,
1659         .power          = 500,
1660         .instances      = 1,
1661 };
1663 static int cpld_reg_probe(struct i2c_client *client,
1664             const struct i2c_device_id *id)
1666         cpld_client = client;
1667         return 0;
1670 static int __devexit cpld_reg_remove(struct i2c_client *client)
1672         cpld_client = NULL;
1673         return 0;
1676 static const struct i2c_device_id cpld_reg_id[] = {
1677         { "cpld_reg", 0 },
1678         { }
1679 };
1681 static struct i2c_driver cpld_reg_driver = {
1682         .driver = {
1683                 .name   = "cpld_reg",
1684         },
1685         .probe          = cpld_reg_probe,
1686         .remove         = cpld_reg_remove,
1687         .id_table       = cpld_reg_id,
1688 };
1690 static void evm_init_cpld(void)
1692         i2c_add_driver(&cpld_reg_driver);
1695 static void __init am335x_evm_i2c_init(void)
1697         /* Initially assume Low Cost EVM Config */
1698         am335x_evm_id = LOW_COST_EVM;
1700         evm_init_cpld();
1702         omap_register_i2c_bus(1, 100, am335x_i2c_boardinfo,
1703                                 ARRAY_SIZE(am335x_i2c_boardinfo));
1706 static struct resource am335x_rtc_resources[] = {
1707         {
1708                 .start          = AM33XX_RTC_BASE,
1709                 .end            = AM33XX_RTC_BASE + SZ_4K - 1,
1710                 .flags          = IORESOURCE_MEM,
1711         },
1712         { /* timer irq */
1713                 .start          = AM33XX_IRQ_RTC_TIMER,
1714                 .end            = AM33XX_IRQ_RTC_TIMER,
1715                 .flags          = IORESOURCE_IRQ,
1716         },
1717         { /* alarm irq */
1718                 .start          = AM33XX_IRQ_RTC_ALARM,
1719                 .end            = AM33XX_IRQ_RTC_ALARM,
1720                 .flags          = IORESOURCE_IRQ,
1721         },
1722 };
1724 static struct platform_device am335x_rtc_device = {
1725         .name           = "omap_rtc",
1726         .id             = -1,
1727         .num_resources  = ARRAY_SIZE(am335x_rtc_resources),
1728         .resource       = am335x_rtc_resources,
1729 };
1731 static int am335x_rtc_init(void)
1733         void __iomem *base;
1734         struct clk *clk;
1736         clk = clk_get(NULL, "rtc_fck");
1737         if (IS_ERR(clk)) {
1738                 pr_err("rtc : Failed to get RTC clock\n");
1739                 return -1;
1740         }
1742         if (clk_enable(clk)) {
1743                 pr_err("rtc: Clock Enable Failed\n");
1744                 return -1;
1745         }
1747         base = ioremap(AM33XX_RTC_BASE, SZ_4K);
1749         if (WARN_ON(!base))
1750                 return -ENOMEM;
1752         /* Unlock the rtc's registers */
1753         __raw_writel(0x83e70b13, base + 0x6c);
1754         __raw_writel(0x95a4f1e0, base + 0x70);
1756         /*
1757          * Enable the 32K OSc
1758          * TODO: Need a better way to handle this
1759          * Since we want the clock to be running before mmc init
1760          * we need to do it before the rtc probe happens
1761          */
1762         __raw_writel(0x48, base + 0x54);
1764         iounmap(base);
1766         return  platform_device_register(&am335x_rtc_device);
1769 /* Enable clkout2 */
1770 static struct pinmux_config clkout2_pin_mux[] = {
1771         {"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
1772         {NULL, 0},
1773 };
1775 static void __init clkout2_enable(void)
1777         struct clk *ck_32;
1779         ck_32 = clk_get(NULL, "clkout2_ck");
1780         if (IS_ERR(ck_32)) {
1781                 pr_err("Cannot clk_get ck_32\n");
1782                 return;
1783         }
1785         clk_enable(ck_32);
1787         setup_pin_mux(clkout2_pin_mux);
1790 static void __init am335x_evm_init(void)
1792         am33xx_mux_init(board_mux);
1793         omap_serial_init();
1794         am335x_rtc_init();
1795         clkout2_enable();
1796         am335x_evm_i2c_init();
1797         omap_sdrc_init(NULL, NULL);
1798         usb_musb_init(&musb_board_data);
1799         omap_board_config = am335x_evm_config;
1800         omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
1803 static void __init am335x_evm_map_io(void)
1805         omap2_set_globals_am33xx();
1806         omapam33xx_map_common_io();
1809 MACHINE_START(AM335XEVM, "am335xevm")
1810         /* Maintainer: Texas Instruments */
1811         .atag_offset    = 0x100,
1812         .map_io         = am335x_evm_map_io,
1813         .init_early     = am33xx_init_early,
1814         .init_irq       = ti81xx_init_irq,
1815         .handle_irq     = omap3_intc_handle_irq,
1816         .timer          = &omap3_am33xx_timer,
1817         .init_machine   = am335x_evm_init,
1818 MACHINE_END
1820 MACHINE_START(AM335XIAEVM, "am335xiaevm")
1821         /* Maintainer: Texas Instruments */
1822         .atag_offset    = 0x100,
1823         .map_io         = am335x_evm_map_io,
1824         .init_irq       = ti81xx_init_irq,
1825         .init_early     = am33xx_init_early,
1826         .timer          = &omap3_am33xx_timer,
1827         .init_machine   = am335x_evm_init,
1828 MACHINE_END