1 /*
2 * Code for AM335X EVM.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/i2c/at24.h>
20 #include <linux/gpio.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/flash.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/nand.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/wl12xx.h>
31 /* LCD controller is similar to DA850 */
32 #include <video/da8xx-fb.h>
34 #include <mach/hardware.h>
35 #include <mach/board-am335xevm.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/hardware/asp.h>
42 #include <plat/irqs.h>
43 #include <plat/board.h>
44 #include <plat/common.h>
45 #include <plat/lcdc.h>
46 #include <plat/usb.h>
47 #include <plat/mmc.h>
49 #include "board-flash.h"
50 #include "mux.h"
51 #include "devices.h"
52 #include "hsmmc.h"
54 /* Convert GPIO signal to GPIO pin number */
55 #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
57 static const struct display_panel disp_panel = {
58 WVGA,
59 32,
60 32,
61 COLOR_ACTIVE,
62 };
64 static struct lcd_ctrl_config lcd_cfg = {
65 &disp_panel,
66 .ac_bias = 255,
67 .ac_bias_intrpt = 0,
68 .dma_burst_sz = 16,
69 .bpp = 32,
70 .fdd = 0x80,
71 .tft_alt_mode = 0,
72 .stn_565_mode = 0,
73 .mono_8bit_mode = 0,
74 .invert_line_clock = 1,
75 .invert_frm_clock = 1,
76 .sync_edge = 0,
77 .sync_ctrl = 1,
78 .raster_order = 0,
79 };
81 struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
82 .manu_name = "ThreeFive",
83 .controller_data = &lcd_cfg,
84 .type = "TFC_S9700RTWV35TR_01B",
85 };
87 #include "common.h"
89 /* TSc controller */
90 #include <linux/input/ti_tscadc.h>
92 static struct resource tsc_resources[] = {
93 [0] = {
94 .start = AM33XX_TSC_BASE,
95 .end = AM33XX_TSC_BASE + SZ_8K - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 .start = AM33XX_IRQ_ADC_GEN,
100 .end = AM33XX_IRQ_ADC_GEN,
101 .flags = IORESOURCE_IRQ,
102 },
103 };
105 static struct tsc_data am335x_touchscreen_data = {
106 .wires = 4,
107 .x_plate_resistance = 200,
108 };
110 static struct platform_device tsc_device = {
111 .name = "tsc",
112 .id = -1,
113 .dev = {
114 .platform_data = &am335x_touchscreen_data,
115 },
116 .num_resources = ARRAY_SIZE(tsc_resources),
117 .resource = tsc_resources,
118 };
120 static u8 am335x_iis_serializer_direction1[] = {
121 INACTIVE_MODE, INACTIVE_MODE, TX_MODE, RX_MODE,
122 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
123 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
124 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
125 };
127 static struct snd_platform_data am335x_evm_snd_data1 = {
128 .tx_dma_offset = 0x46400000, /* McASP1 */
129 .rx_dma_offset = 0x46400000,
130 .op_mode = DAVINCI_MCASP_IIS_MODE,
131 .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
132 .tdm_slots = 2,
133 .serial_dir = am335x_iis_serializer_direction1,
134 .asp_chan_q = EVENTQ_2,
135 .version = MCASP_VERSION_3,
136 .txnumevt = 1,
137 .rxnumevt = 1,
138 };
140 static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
141 {
142 .mmc = 1,
143 .caps = MMC_CAP_4_BIT_DATA,
144 .gpio_cd = GPIO_TO_PIN(0, 6),
145 .gpio_wp = GPIO_TO_PIN(3, 18),
146 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
147 },
148 {
149 .mmc = 0, /* will be set at runtime */
150 },
151 {
152 .mmc = 0, /* will be set at runtime */
153 },
154 {} /* Terminator */
155 };
158 #ifdef CONFIG_OMAP_MUX
159 static struct omap_board_mux board_mux[] __initdata = {
160 AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
161 AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
162 AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
163 AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
164 { .reg_offset = OMAP_MUX_TERMINATOR },
165 };
166 #else
167 #define board_mux NULL
168 #endif
170 /* module pin mux structure */
171 struct pinmux_config {
172 const char *string_name; /* signal name format */
173 int val; /* Options for the mux register value */
174 };
176 struct evm_dev_cfg {
177 void (*device_init)(int evm_id, int profile);
179 /*
180 * If the device is required on both baseboard & daughter board (ex i2c),
181 * specify DEV_ON_BASEBOARD
182 */
183 #define DEV_ON_BASEBOARD 0
184 #define DEV_ON_DGHTR_BRD 1
185 u32 device_on;
187 u32 profile; /* Profiles (0-7) in which the module is present */
188 };
190 /* AM335X - CPLD Register Offsets */
191 #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
192 #define CPLD_DEVICE_ID 0x04 /* CPLD identification */
193 #define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */
194 #define CPLD_CFG_REG 0x10 /* Configuration Register */
196 static struct i2c_client *cpld_client;
197 static u32 am335x_evm_id;
198 static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
199 };
201 /*
202 * EVM Config held in On-Board eeprom device.
203 *
204 * Header Format
205 *
206 * Name Size Contents
207 * (Bytes)
208 *-------------------------------------------------------------
209 * Header 4 0xAA, 0x55, 0x33, 0xEE
210 *
211 * Board Name 8 Name for board in ASCII.
212 * example "A33515BB" = "AM335X
213 Low Cost EVM board"
214 *
215 * Version 4 Hardware version code for board in
216 * in ASCII. "1.0A" = rev.01.0A
217 *
218 * Serial Number 12 Serial number of the board. This is a 12
219 * character string which is WWYY4P16nnnn, where
220 * WW = 2 digit week of the year of production
221 * YY = 2 digit year of production
222 * nnnn = incrementing board number
223 *
224 * Configuration option 32 Codes(TBD) to show the configuration
225 * setup on this board.
226 *
227 * Available 32720 Available space for other non-volatile
228 * data.
229 */
230 struct am335x_evm_eeprom_config {
231 u32 header;
232 u8 name[8];
233 u32 version;
234 u8 serial[12];
235 u8 opt[32];
236 };
238 static struct am335x_evm_eeprom_config config;
239 static bool daughter_brd_detected;
241 #define GP_EVM_REV_IS_1_0 0x1
242 #define GP_EVM_REV_IS_1_1A 0x2
243 #define GP_EVM_REV_IS_UNKNOWN 0xFF
244 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
246 #define AM335X_EEPROM_HEADER 0xEE3355AA
248 /* current profile if exists else PROFILE_0 on error */
249 static u32 am335x_get_profile_selection(void)
250 {
251 int val = 0;
253 if (!cpld_client)
254 /* error checking is not done in func's calling this routine.
255 so return profile 0 on error */
256 return 0;
258 val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
259 if (val < 0)
260 return 0; /* default to Profile 0 on Error */
261 else
262 return val & 0x7;
263 }
265 /* Module pin mux for LCDC */
266 static struct pinmux_config lcdc_pin_mux[] = {
267 {"lcd_data0.lcd_data0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
268 | AM33XX_PULL_DISA},
269 {"lcd_data1.lcd_data1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
270 | AM33XX_PULL_DISA},
271 {"lcd_data2.lcd_data2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
272 | AM33XX_PULL_DISA},
273 {"lcd_data3.lcd_data3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
274 | AM33XX_PULL_DISA},
275 {"lcd_data4.lcd_data4", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
276 | AM33XX_PULL_DISA},
277 {"lcd_data5.lcd_data5", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
278 | AM33XX_PULL_DISA},
279 {"lcd_data6.lcd_data6", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
280 | AM33XX_PULL_DISA},
281 {"lcd_data7.lcd_data7", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
282 | AM33XX_PULL_DISA},
283 {"lcd_data8.lcd_data8", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
284 | AM33XX_PULL_DISA},
285 {"lcd_data9.lcd_data9", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
286 | AM33XX_PULL_DISA},
287 {"lcd_data10.lcd_data10", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
288 | AM33XX_PULL_DISA},
289 {"lcd_data11.lcd_data11", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
290 | AM33XX_PULL_DISA},
291 {"lcd_data12.lcd_data12", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
292 | AM33XX_PULL_DISA},
293 {"lcd_data13.lcd_data13", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
294 | AM33XX_PULL_DISA},
295 {"lcd_data14.lcd_data14", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
296 | AM33XX_PULL_DISA},
297 {"lcd_data15.lcd_data15", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
298 | AM33XX_PULL_DISA},
299 {"gpmc_ad8.lcd_data16", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
300 {"gpmc_ad9.lcd_data17", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
301 {"gpmc_ad10.lcd_data18", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
302 {"gpmc_ad11.lcd_data19", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
303 {"gpmc_ad12.lcd_data20", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
304 {"gpmc_ad13.lcd_data21", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
305 {"gpmc_ad14.lcd_data22", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
306 {"gpmc_ad15.lcd_data23", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
307 {"lcd_vsync.lcd_vsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
308 {"lcd_hsync.lcd_hsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
309 {"lcd_pclk.lcd_pclk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
310 {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
311 {NULL, 0},
312 };
314 static struct pinmux_config tsc_pin_mux[] = {
315 {"ain0.ain0", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
316 {"ain1.ain1", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
317 {"ain2.ain2", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
318 {"ain3.ain3", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
319 {"vrefp.vrefp", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
320 {"vrefn.vrefn", OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
321 {NULL, 0},
322 };
324 /* Pin mux for nand flash module */
325 static struct pinmux_config nand_pin_mux[] = {
326 {"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
327 {"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
328 {"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
329 {"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
330 {"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
331 {"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
332 {"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
333 {"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
334 {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
335 {"gpmc_wpn.gpmc_wpn", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
336 {"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
337 {"gpmc_advn_ale.gpmc_advn_ale", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
338 {"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
339 {"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
340 {"gpmc_ben0_cle.gpmc_ben0_cle", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
341 {NULL, 0},
342 };
344 /* Module pin mux for SPI fash */
345 static struct pinmux_config spi0_pin_mux[] = {
346 {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
347 | AM33XX_INPUT_EN},
348 {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
349 | AM33XX_INPUT_EN},
350 {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
351 | AM33XX_INPUT_EN},
352 {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
353 | AM33XX_INPUT_EN},
354 {NULL, 0},
355 };
357 /* Module pin mux for SPI flash */
358 static struct pinmux_config spi1_pin_mux[] = {
359 {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
360 | AM33XX_INPUT_EN},
361 {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
362 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
363 {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
364 | AM33XX_INPUT_EN},
365 {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
366 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
367 {NULL, 0},
368 };
370 /* Module pin mux for rgmii1 */
371 static struct pinmux_config rgmii1_pin_mux[] = {
372 {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
373 {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
374 {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
375 {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
376 {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
377 {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
378 {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
379 {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
380 {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
381 {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
382 {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
383 {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
384 {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
385 {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
386 {NULL, 0},
387 };
389 /* Module pin mux for rgmii2 */
390 static struct pinmux_config rgmii2_pin_mux[] = {
391 {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
392 {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
393 {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
394 {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
395 {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
396 {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
397 {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
398 {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
399 {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
400 {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
401 {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
402 {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
403 {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
404 {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
405 {NULL, 0},
406 };
408 /* Module pin mux for mii1 */
409 static struct pinmux_config mii1_pin_mux[] = {
410 {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
411 {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
412 {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
413 {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
414 {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
415 {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
416 {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
417 {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
418 {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
419 {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
420 {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
421 {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
422 {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
423 {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
424 {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
425 {NULL, 0},
426 };
428 static struct pinmux_config i2c1_pin_mux[] = {
429 {"spi0_d1.i2c1_sda", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
430 AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
431 {"spi0_cs0.i2c1_scl", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
432 AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
433 {NULL, 0},
434 };
436 /* Module pin mux for mcasp1 */
437 static struct pinmux_config mcasp1_pin_mux[] = {
438 {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
439 {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
440 {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
441 {"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |
442 AM33XX_PIN_INPUT_PULLDOWN},
443 {NULL, 0},
444 };
447 /* Module pin mux for mmc0 */
448 static struct pinmux_config mmc0_pin_mux[] = {
449 {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
450 {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
451 {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
452 {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
453 {"mmc0_clk.mmc0_clk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
454 {"mmc0_cmd.mmc0_cmd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
455 {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
456 {"spi0_cs1.mmc0_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
457 {NULL, 0},
458 };
460 static struct pinmux_config mmc0_no_cd_pin_mux[] = {
461 {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
462 {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
463 {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
464 {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
465 {"mmc0_clk.mmc0_clk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
466 {"mmc0_cmd.mmc0_cmd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
467 {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
468 {NULL, 0},
469 };
471 /* Module pin mux for mmc1 */
472 static struct pinmux_config mmc1_pin_mux[] = {
473 {"gpmc_ad7.mmc1_dat7", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
474 {"gpmc_ad6.mmc1_dat6", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
475 {"gpmc_ad5.mmc1_dat5", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
476 {"gpmc_ad4.mmc1_dat4", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
477 {"gpmc_ad3.mmc1_dat3", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
478 {"gpmc_ad2.mmc1_dat2", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
479 {"gpmc_ad1.mmc1_dat1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
480 {"gpmc_ad0.mmc1_dat0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
481 {"gpmc_csn1.mmc1_clk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
482 {"gpmc_csn2.mmc1_cmd", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
483 {"gpmc_csn0.mmc1_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
484 {"gpmc_advn_ale.mmc1_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
485 {NULL, 0},
486 };
488 /* Module pin mux for uart3 */
489 static struct pinmux_config uart3_pin_mux[] = {
490 {"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},
491 {"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},
492 {NULL, 0},
493 };
495 /*
496 * @pin_mux - single module pin-mux structure which defines pin-mux
497 * details for all its pins.
498 */
499 static void setup_pin_mux(struct pinmux_config *pin_mux)
500 {
501 int i;
503 for (i = 0; pin_mux->string_name != NULL; pin_mux++)
504 omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
506 }
508 /*
509 * @evm_id - evm id which needs to be configured
510 * @dev_cfg - single evm structure which includes
511 * all module inits, pin-mux defines
512 * @profile - if present, else PROFILE_NONE
513 * @dghtr_brd_flg - Whether Daughter board is present or not
514 */
515 static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
516 int profile)
517 {
518 int i;
520 /*
521 * Only General Purpose & Industrial Auto Motro Control
522 * EVM has profiles. So check if this evm has profile.
523 * If not, ignore the profile comparison
524 */
526 /*
527 * If the device is on baseboard, directly configure it. Else (device on
528 * Daughter board), check if the daughter card is detected.
529 */
530 if (profile == PROFILE_NONE) {
531 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
532 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
533 dev_cfg->device_init(evm_id, profile);
534 else if (daughter_brd_detected == true)
535 dev_cfg->device_init(evm_id, profile);
536 }
537 } else {
538 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
539 if (dev_cfg->profile & profile) {
540 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
541 dev_cfg->device_init(evm_id, profile);
542 else if (daughter_brd_detected == true)
543 dev_cfg->device_init(evm_id, profile);
544 }
545 }
546 }
547 }
549 #define AM335X_LCD_BL_PIN GPIO_TO_PIN(0, 7)
551 /* pinmux for usb0 drvvbus */
552 static struct pinmux_config usb0_pin_mux[] = {
553 {"usb0_drvvbus.usb0_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
554 {NULL, 0},
555 };
557 /* pinmux for usb1 drvvbus */
558 static struct pinmux_config usb1_pin_mux[] = {
559 {"usb1_drvvbus.usb1_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
560 {NULL, 0},
561 };
563 /* Module pin mux for eCAP0 */
564 static struct pinmux_config ecap0_pin_mux[] = {
565 {"ecap0_in_pwm0_out.gpio0_7", AM33XX_PIN_OUTPUT},
566 {NULL, 0},
567 };
569 static int backlight_enable;
571 #define AM335XEVM_WLAN_PMENA_GPIO GPIO_TO_PIN(1, 30)
572 #define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(3, 17)
573 #define AM335XEVM_BT_ENABLE_GPIO GPIO_TO_PIN(1, 31)
575 struct wl12xx_platform_data am335xevm_wlan_data = {
576 .irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
577 .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
578 .board_tcxo_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
579 };
581 /* Module pin mux for wlan and bluetooth */
582 static struct pinmux_config mmc2_wl12xx_pin_mux[] = {
583 {"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
584 {"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
585 {"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
586 {"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
587 {"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
588 {"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
589 {NULL, 0},
590 };
592 static struct pinmux_config uart1_wl12xx_pin_mux[] = {
593 {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
594 {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
595 {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
596 {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
597 {NULL, 0},
598 };
600 static struct pinmux_config wl12xx_pin_mux[] = {
601 {"gpmc_csn1.gpio1_30", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
602 {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
603 {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
604 {NULL, 0},
605 };
607 static void enable_ecap0(int evm_id, int profile)
608 {
609 backlight_enable = true;
610 }
612 static int __init ecap0_init(void)
613 {
614 int status = 0;
616 if (backlight_enable) {
617 setup_pin_mux(ecap0_pin_mux);
619 status = gpio_request(AM335X_LCD_BL_PIN, "lcd bl\n");
620 if (status < 0)
621 pr_warn("Failed to request gpio for LCD backlight\n");
623 gpio_direction_output(AM335X_LCD_BL_PIN, 1);
624 }
625 return status;
626 }
627 late_initcall(ecap0_init);
629 static int __init conf_disp_pll(int rate)
630 {
631 struct clk *disp_pll;
632 int ret = -EINVAL;
634 disp_pll = clk_get(NULL, "dpll_disp_ck");
635 if (IS_ERR(disp_pll)) {
636 pr_err("Cannot clk_get disp_pll\n");
637 goto out;
638 }
640 ret = clk_set_rate(disp_pll, rate);
641 clk_put(disp_pll);
642 out:
643 return ret;
644 }
646 static void lcdc_init(int evm_id, int profile)
647 {
649 setup_pin_mux(lcdc_pin_mux);
651 if (conf_disp_pll(300000000)) {
652 pr_info("Failed configure display PLL, not attempting to"
653 "register LCDC\n");
654 return;
655 }
657 if (am33xx_register_lcdc(&TFC_S9700RTWV35TR_01B_pdata))
658 pr_info("Failed to register LCDC device\n");
659 return;
660 }
662 static void tsc_init(int evm_id, int profile)
663 {
664 int err;
666 if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
667 am335x_touchscreen_data.analog_input = 1;
668 pr_info("TSC connected to beta GP EVM\n");
669 } else {
670 am335x_touchscreen_data.analog_input = 0;
671 pr_info("TSC connected to alpha GP EVM\n");
672 }
673 setup_pin_mux(tsc_pin_mux);
674 err = platform_device_register(&tsc_device);
675 if (err)
676 pr_err("failed to register touchscreen device\n");
677 }
679 static void rgmii1_init(int evm_id, int profile)
680 {
681 setup_pin_mux(rgmii1_pin_mux);
682 return;
683 }
685 static void rgmii2_init(int evm_id, int profile)
686 {
687 setup_pin_mux(rgmii2_pin_mux);
688 return;
689 }
691 static void mii1_init(int evm_id, int profile)
692 {
693 setup_pin_mux(mii1_pin_mux);
694 return;
695 }
697 static void usb0_init(int evm_id, int profile)
698 {
699 setup_pin_mux(usb0_pin_mux);
700 return;
701 }
703 static void usb1_init(int evm_id, int profile)
704 {
705 setup_pin_mux(usb1_pin_mux);
706 return;
707 }
709 /* setup uart3 */
710 static void uart3_init(int evm_id, int profile)
711 {
712 setup_pin_mux(uart3_pin_mux);
713 return;
714 }
716 /* NAND partition information */
717 static struct mtd_partition am335x_nand_partitions[] = {
718 /* All the partition sizes are listed in terms of NAND block size */
719 {
720 .name = "SPL",
721 .offset = 0, /* Offset = 0x0 */
722 .size = SZ_128K,
723 },
724 {
725 .name = "SPL.backup1",
726 .offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
727 .size = SZ_128K,
728 },
729 {
730 .name = "SPL.backup2",
731 .offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */
732 .size = SZ_128K,
733 },
734 {
735 .name = "SPL.backup3",
736 .offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
737 .size = SZ_128K,
738 },
739 {
740 .name = "U-Boot",
741 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
742 .size = 15 * SZ_128K,
743 },
744 {
745 .name = "U-Boot Env",
746 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
747 .size = 1 * SZ_128K,
748 },
749 {
750 .name = "Kernel",
751 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
752 .size = 40 * SZ_128K,
753 },
754 {
755 .name = "File System",
756 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
757 .size = MTDPART_SIZ_FULL,
758 },
759 };
761 /* SPI 0/1 Platform Data */
762 /* SPI flash information */
763 static struct mtd_partition am335x_spi_partitions[] = {
764 /* All the partition sizes are listed in terms of erase size */
765 {
766 .name = "SPL",
767 .offset = 0, /* Offset = 0x0 */
768 .size = SZ_128K,
769 },
770 {
771 .name = "U-Boot",
772 .offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
773 .size = 2 * SZ_128K,
774 },
775 {
776 .name = "U-Boot Env",
777 .offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
778 .size = 2 * SZ_4K,
779 },
780 {
781 .name = "Kernel",
782 .offset = MTDPART_OFS_APPEND, /* Offset = 0x62000 */
783 .size = 28 * SZ_128K,
784 },
785 {
786 .name = "File System",
787 .offset = MTDPART_OFS_APPEND, /* Offset = 0x3E2000 */
788 .size = MTDPART_SIZ_FULL, /* size ~= 4.1 MiB */
789 }
790 };
792 static const struct flash_platform_data am335x_spi_flash = {
793 .type = "w25q64",
794 .name = "spi_flash",
795 .parts = am335x_spi_partitions,
796 .nr_parts = ARRAY_SIZE(am335x_spi_partitions),
797 };
799 /*
800 * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
801 * So setup Max speed to be less than that of Controller speed
802 */
803 static struct spi_board_info am335x_spi0_slave_info[] = {
804 {
805 .modalias = "m25p80",
806 .platform_data = &am335x_spi_flash,
807 .irq = -1,
808 .max_speed_hz = 24000000,
809 .bus_num = 1,
810 .chip_select = 0,
811 },
812 };
814 static struct spi_board_info am335x_spi1_slave_info[] = {
815 {
816 .modalias = "m25p80",
817 .platform_data = &am335x_spi_flash,
818 .irq = -1,
819 .max_speed_hz = 12000000,
820 .bus_num = 2,
821 .chip_select = 0,
822 },
823 };
825 static void evm_nand_init(int evm_id, int profile)
826 {
827 setup_pin_mux(nand_pin_mux);
828 board_nand_init(am335x_nand_partitions,
829 ARRAY_SIZE(am335x_nand_partitions), 0, 0);
830 }
832 static struct i2c_board_info am335x_i2c_boardinfo1[] = {
833 {
834 I2C_BOARD_INFO("tlv320aic3x", 0x1b),
835 },
836 };
838 static void i2c1_init(int evm_id, int profile)
839 {
840 setup_pin_mux(i2c1_pin_mux);
841 omap_register_i2c_bus(2, 100, am335x_i2c_boardinfo1,
842 ARRAY_SIZE(am335x_i2c_boardinfo1));
843 return;
844 }
846 /* Setup McASP 1 */
847 static void mcasp1_init(int evm_id, int profile)
848 {
849 /* Configure McASP */
850 setup_pin_mux(mcasp1_pin_mux);
851 am335x_register_mcasp1(&am335x_evm_snd_data1);
852 return;
853 }
855 static void mmc1_init(int evm_id, int profile)
856 {
857 setup_pin_mux(mmc1_pin_mux);
859 am335x_mmc[1].mmc = 2;
860 am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
861 am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
862 am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
863 am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
865 /* mmc will be initialized when mmc0_init is called */
866 return;
867 }
869 static void mmc2_wl12xx_init(int evm_id, int profile)
870 {
871 setup_pin_mux(mmc2_wl12xx_pin_mux);
873 am335x_mmc[1].mmc = 3;
874 am335x_mmc[1].name = "wl1271";
875 am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
876 | MMC_PM_KEEP_POWER;
877 am335x_mmc[1].nonremovable = true;
878 am335x_mmc[1].gpio_cd = -EINVAL;
879 am335x_mmc[1].gpio_wp = -EINVAL;
880 am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
882 /* mmc will be initialized when mmc0_init is called */
883 return;
884 }
886 static void uart1_wl12xx_init(int evm_id, int profile)
887 {
888 setup_pin_mux(uart1_wl12xx_pin_mux);
889 }
891 static void wl12xx_bluetooth_enable(void)
892 {
893 int status = gpio_request(AM335XEVM_BT_ENABLE_GPIO, "bt_en\n");
894 if (status < 0)
895 pr_err("Failed to request gpio for bt_enable");
897 pr_info("Enable bluetooth...\n");
898 gpio_direction_output(AM335XEVM_BT_ENABLE_GPIO, 0);
899 msleep(1);
900 gpio_set_value(AM335XEVM_BT_ENABLE_GPIO, 1);
901 }
903 static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
904 {
905 if (on)
906 gpio_set_value(AM335XEVM_WLAN_PMENA_GPIO, 1);
907 else
908 gpio_set_value(AM335XEVM_WLAN_PMENA_GPIO, 0);
910 return 0;
911 }
913 static void wl12xx_init(int evm_id, int profile)
914 {
915 struct device *dev;
916 struct omap_mmc_platform_data *pdata;
917 int ret;
919 wl12xx_bluetooth_enable();
921 if (wl12xx_set_platform_data(&am335xevm_wlan_data))
922 pr_err("error setting wl12xx data\n");
924 dev = am335x_mmc[1].dev;
925 if (!dev) {
926 pr_err("wl12xx mmc device initialization failed\n");
927 goto out;
928 }
930 pdata = dev->platform_data;
931 if (!pdata) {
932 pr_err("Platfrom data of wl12xx device not set\n");
933 goto out;
934 }
936 ret = gpio_request_one(AM335XEVM_WLAN_PMENA_GPIO, GPIOF_OUT_INIT_LOW,
937 "wlan_en");
938 if (ret) {
939 pr_err("Error requesting wlan enable gpio: %d\n", ret);
940 goto out;
941 }
943 setup_pin_mux(wl12xx_pin_mux);
945 pdata->slots[0].set_power = wl12xx_set_power;
946 out:
947 return;
948 }
950 static void mmc0_init(int evm_id, int profile)
951 {
952 setup_pin_mux(mmc0_pin_mux);
954 omap2_hsmmc_init(am335x_mmc);
955 return;
956 }
958 static void mmc0_no_cd_init(int evm_id, int profile)
959 {
960 setup_pin_mux(mmc0_no_cd_pin_mux);
962 omap2_hsmmc_init(am335x_mmc);
963 return;
964 }
967 /* setup spi0 */
968 static void spi0_init(int evm_id, int profile)
969 {
970 setup_pin_mux(spi0_pin_mux);
971 spi_register_board_info(am335x_spi0_slave_info,
972 ARRAY_SIZE(am335x_spi0_slave_info));
973 return;
974 }
976 /* setup spi1 */
977 static void spi1_init(int evm_id, int profile)
978 {
979 setup_pin_mux(spi1_pin_mux);
980 spi_register_board_info(am335x_spi1_slave_info,
981 ARRAY_SIZE(am335x_spi1_slave_info));
982 return;
983 }
985 /* Low-Cost EVM */
986 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
987 {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
988 {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
989 {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
990 {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
991 {NULL, 0, 0},
992 };
994 /* General Purpose EVM */
995 static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
996 {enable_ecap0, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
997 PROFILE_2 | PROFILE_7) },
998 {lcdc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
999 PROFILE_2 | PROFILE_7) },
1000 {tsc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1001 PROFILE_2 | PROFILE_7) },
1002 {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
1003 {rgmii2_init, DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
1004 PROFILE_4 | PROFILE_6) },
1005 {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
1006 {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
1007 {evm_nand_init, DEV_ON_DGHTR_BRD,
1008 (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
1009 {i2c1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
1010 {mcasp1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
1011 {mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},
1012 {mmc2_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1013 PROFILE_5)},
1014 {mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
1015 {mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},
1016 {spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},
1017 {uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1018 PROFILE_5)},
1019 {wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
1020 {NULL, 0, 0},
1021 };
1023 /* Industrial Auto Motor Control EVM */
1024 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
1025 {mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1026 {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
1027 {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
1028 {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1029 {spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1030 {uart3_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1031 {NULL, 0, 0},
1032 };
1034 /* IP-Phone EVM */
1035 static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
1036 {enable_ecap0, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1037 {lcdc_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1038 {tsc_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1039 {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1040 {rgmii2_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1041 {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1042 {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1043 {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1044 {i2c1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1045 {mcasp1_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1046 {mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1047 {NULL, 0, 0},
1048 };
1050 static void setup_low_cost_evm(void)
1051 {
1052 pr_info("The board is a AM335x Low Cost EVM.\n");
1054 _configure_device(LOW_COST_EVM, low_cost_evm_dev_cfg, PROFILE_NONE);
1055 }
1057 static void setup_general_purpose_evm(void)
1058 {
1059 u32 prof_sel = am335x_get_profile_selection();
1060 pr_info("The board is general purpose EVM in profile %d\n", prof_sel);
1062 if (!strncmp("1.1A", config.version, 4)) {
1063 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1064 } else if (!strncmp("1.0", config.version, 3)) {
1065 gp_evm_revision = GP_EVM_REV_IS_1_0;
1066 } else {
1067 pr_err("Found invalid GP EVM revision, falling back to Rev1.1A");
1068 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1069 }
1071 if (gp_evm_revision == GP_EVM_REV_IS_1_0)
1072 gigabit_enable = 0;
1073 else if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
1074 gigabit_enable = 1;
1076 _configure_device(GEN_PURP_EVM, gen_purp_evm_dev_cfg, (1L << prof_sel));
1077 }
1079 static void setup_ind_auto_motor_ctrl_evm(void)
1080 {
1081 u32 prof_sel = am335x_get_profile_selection();
1083 pr_info("The board is an industrial automation EVM in profile %d\n",
1084 prof_sel);
1086 /* Only Profile 0 is supported */
1087 if ((1L << prof_sel) != PROFILE_0) {
1088 pr_err("AM335X: Only Profile 0 is supported\n");
1089 pr_err("Assuming profile 0 & continuing\n");
1090 prof_sel = PROFILE_0;
1091 }
1093 _configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
1094 PROFILE_0);
1096 }
1098 static void setup_ip_phone_evm(void)
1099 {
1100 pr_info("The board is an IP phone EVM\n");
1102 _configure_device(IP_PHN_EVM, ip_phn_evm_dev_cfg, PROFILE_NONE);
1103 }
1105 static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
1106 {
1107 u8 tmp;
1108 int ret;
1110 /*
1111 * try reading a byte from the EEPROM to see if it is
1112 * present. We could read a lot more, but that would
1113 * just slow the boot process and we have all the information
1114 * we need from the EEPROM on the base board anyway.
1115 */
1116 ret = m->read(m, &tmp, 0, sizeof(u8));
1117 if (ret == sizeof(u8)) {
1118 pr_info("Detected a daughter card on AM335x EVM..");
1119 daughter_brd_detected = true;
1120 } else {
1121 pr_info("No daughter card found\n");
1122 daughter_brd_detected = false;
1123 }
1124 }
1126 static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
1127 {
1128 int ret;
1129 char tmp[10];
1131 /* get board specific data */
1132 ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
1133 if (ret != sizeof(config)) {
1134 pr_warning("AM335X EVM config read fail, read %d bytes\n", ret);
1135 return;
1136 }
1138 if (config.header != AM335X_EEPROM_HEADER) {
1139 pr_warning("AM335X: wrong header 0x%x, expected 0x%x\n",
1140 config.header, AM335X_EEPROM_HEADER);
1141 goto out;
1142 }
1144 if (strncmp("A335", config.name, 4)) {
1145 pr_err("Board %s doesn't look like an AM335x board\n",
1146 config.name);
1147 goto out;
1148 }
1150 snprintf(tmp, sizeof(config.name), "%s", config.name);
1151 pr_info("Board name: %s\n", tmp);
1152 /* only 6 characters of options string used for now */
1153 snprintf(tmp, 7, "%s", config.opt);
1154 pr_info("SKU: %s\n", tmp);
1156 if (!strncmp("SKU#00", config.opt, 6))
1157 setup_low_cost_evm();
1158 else if (!strncmp("SKU#01", config.opt, 6))
1159 setup_general_purpose_evm();
1160 else if (!strncmp("SKU#02", config.opt, 6))
1161 setup_ind_auto_motor_ctrl_evm();
1162 else if (!strncmp("SKU#03", config.opt, 6))
1163 setup_ip_phone_evm();
1164 else
1165 goto out;
1167 /* Initialize cpsw after board detection is completed as board
1168 * information is required for configuring phy address and hence
1169 * should be call only after board detection
1170 */
1171 am33xx_cpsw_init();
1173 return;
1174 out:
1175 /*
1176 * for bring-up assume a full configuration, this should
1177 * eventually be changed to assume a minimal configuration
1178 */
1179 pr_err("Could not detect any board, falling back to: "
1180 "General purpose EVM in profile 0 with daughter card connected\n");
1181 daughter_brd_detected = true;
1182 setup_general_purpose_evm();
1184 /* Initialize cpsw after board detection is completed as board
1185 * information is required for configuring phy address and hence
1186 * should be call only after board detection
1187 */
1188 am33xx_cpsw_init();
1190 }
1192 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
1193 .byte_len = (256*1024) / 8,
1194 .page_size = 64,
1195 .flags = AT24_FLAG_ADDR16,
1196 .setup = am335x_setup_daughter_board,
1197 .context = (void *)NULL,
1198 };
1200 static struct at24_platform_data am335x_baseboard_eeprom_info = {
1201 .byte_len = (256*1024) / 8,
1202 .page_size = 64,
1203 .flags = AT24_FLAG_ADDR16,
1204 .setup = am335x_evm_setup,
1205 .context = (void *)NULL,
1206 };
1208 /*
1209 * Daughter board Detection.
1210 * Every board has a ID memory (EEPROM) on board. We probe these devices at
1211 * machine init, starting from daughter board and ending with baseboard.
1212 * Assumptions :
1213 * 1. probe for i2c devices are called in the order they are included in
1214 * the below struct. Daughter boards eeprom are probed 1st. Baseboard
1215 * eeprom probe is called last.
1216 */
1217 static struct i2c_board_info __initdata am335x_i2c_boardinfo[] = {
1218 {
1219 /* Daughter Board EEPROM */
1220 I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
1221 .platform_data = &am335x_daughter_board_eeprom_info,
1222 },
1223 {
1224 /* Baseboard board EEPROM */
1225 I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
1226 .platform_data = &am335x_baseboard_eeprom_info,
1227 },
1228 {
1229 I2C_BOARD_INFO("cpld_reg", 0x35),
1230 },
1231 {
1232 I2C_BOARD_INFO("tlc59108", 0x40),
1233 },
1235 };
1237 static struct omap_musb_board_data musb_board_data = {
1238 .interface_type = MUSB_INTERFACE_ULPI,
1239 .mode = MUSB_OTG,
1240 .power = 500,
1241 .instances = 1,
1242 };
1244 static int cpld_reg_probe(struct i2c_client *client,
1245 const struct i2c_device_id *id)
1246 {
1247 cpld_client = client;
1248 return 0;
1249 }
1251 static int __devexit cpld_reg_remove(struct i2c_client *client)
1252 {
1253 cpld_client = NULL;
1254 return 0;
1255 }
1257 static const struct i2c_device_id cpld_reg_id[] = {
1258 { "cpld_reg", 0 },
1259 { }
1260 };
1262 static struct i2c_driver cpld_reg_driver = {
1263 .driver = {
1264 .name = "cpld_reg",
1265 },
1266 .probe = cpld_reg_probe,
1267 .remove = cpld_reg_remove,
1268 .id_table = cpld_reg_id,
1269 };
1271 static void evm_init_cpld(void)
1272 {
1273 i2c_add_driver(&cpld_reg_driver);
1274 }
1276 static void __init am335x_evm_i2c_init(void)
1277 {
1278 /* Initially assume Low Cost EVM Config */
1279 am335x_evm_id = LOW_COST_EVM;
1281 evm_init_cpld();
1283 omap_register_i2c_bus(1, 100, am335x_i2c_boardinfo,
1284 ARRAY_SIZE(am335x_i2c_boardinfo));
1285 }
1287 static struct resource am335x_rtc_resources[] = {
1288 {
1289 .start = AM33XX_RTC_BASE,
1290 .end = AM33XX_RTC_BASE + SZ_4K - 1,
1291 .flags = IORESOURCE_MEM,
1292 },
1293 { /* timer irq */
1294 .start = AM33XX_IRQ_RTC_TIMER,
1295 .end = AM33XX_IRQ_RTC_TIMER,
1296 .flags = IORESOURCE_IRQ,
1297 },
1298 { /* alarm irq */
1299 .start = AM33XX_IRQ_RTC_ALARM,
1300 .end = AM33XX_IRQ_RTC_ALARM,
1301 .flags = IORESOURCE_IRQ,
1302 },
1303 };
1305 static struct platform_device am335x_rtc_device = {
1306 .name = "omap_rtc",
1307 .id = -1,
1308 .num_resources = ARRAY_SIZE(am335x_rtc_resources),
1309 .resource = am335x_rtc_resources,
1310 };
1312 static int am335x_rtc_init(void)
1313 {
1314 void __iomem *base;
1315 struct clk *clk;
1317 clk = clk_get(NULL, "rtc_fck");
1318 if (IS_ERR(clk)) {
1319 pr_err("rtc : Failed to get RTC clock\n");
1320 return -1;
1321 }
1323 if (clk_enable(clk)) {
1324 pr_err("rtc: Clock Enable Failed\n");
1325 return -1;
1326 }
1328 base = ioremap(AM33XX_RTC_BASE, SZ_4K);
1330 if (WARN_ON(!base))
1331 return -ENOMEM;
1333 /* Unlock the rtc's registers */
1334 __raw_writel(0x83e70b13, base + 0x6c);
1335 __raw_writel(0x95a4f1e0, base + 0x70);
1337 /*
1338 * Enable the 32K OSc
1339 * TODO: Need a better way to handle this
1340 * Since we want the clock to be running before mmc init
1341 * we need to do it before the rtc probe happens
1342 */
1343 __raw_writel(0x48, base + 0x54);
1345 iounmap(base);
1347 return platform_device_register(&am335x_rtc_device);
1348 }
1350 /* Enable clkout2 */
1351 static struct pinmux_config clkout2_pin_mux[] = {
1352 {"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
1353 {NULL, 0},
1354 };
1356 static void __init clkout2_enable(void)
1357 {
1358 struct clk *ck_32;
1360 ck_32 = clk_get(NULL, "clkout2_ck");
1361 if (IS_ERR(ck_32)) {
1362 pr_err("Cannot clk_get ck_32\n");
1363 return;
1364 }
1366 clk_enable(ck_32);
1368 setup_pin_mux(clkout2_pin_mux);
1369 }
1371 static void __init am335x_evm_init(void)
1372 {
1373 am33xx_mux_init(board_mux);
1374 omap_serial_init();
1375 am335x_rtc_init();
1376 clkout2_enable();
1377 am335x_evm_i2c_init();
1378 omap_sdrc_init(NULL, NULL);
1379 usb_musb_init(&musb_board_data);
1380 omap_board_config = am335x_evm_config;
1381 omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
1382 }
1384 static void __init am335x_evm_map_io(void)
1385 {
1386 omap2_set_globals_am33xx();
1387 omapam33xx_map_common_io();
1388 }
1390 MACHINE_START(AM335XEVM, "am335xevm")
1391 /* Maintainer: Texas Instruments */
1392 .atag_offset = 0x100,
1393 .map_io = am335x_evm_map_io,
1394 .init_early = am33xx_init_early,
1395 .init_irq = ti81xx_init_irq,
1396 .handle_irq = omap3_intc_handle_irq,
1397 .timer = &omap3_am33xx_timer,
1398 .init_machine = am335x_evm_init,
1399 MACHINE_END
1401 MACHINE_START(AM335XIAEVM, "am335xiaevm")
1402 /* Maintainer: Texas Instruments */
1403 .atag_offset = 0x100,
1404 .map_io = am335x_evm_map_io,
1405 .init_irq = ti81xx_init_irq,
1406 .init_early = am33xx_init_early,
1407 .timer = &omap3_am33xx_timer,
1408 .init_machine = am335x_evm_init,
1409 MACHINE_END