48d0bdd592e561d773be1bf554e2ee30fc8be6aa
[sitara-epos/sitara-epos-kernel.git] / arch / arm / mach-omap2 / board-am335xevm.c
1 /*
2  * Code for AM335X EVM.
3  *
4  * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/i2c/at24.h>
20 #include <linux/phy.h>
21 #include <linux/gpio.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/flash.h>
24 #include <linux/gpio_keys.h>
25 #include <linux/input.h>
26 #include <linux/input/matrix_keypad.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/nand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/platform_device.h>
31 #include <linux/clk.h>
32 #include <linux/err.h>
33 #include <linux/wl12xx.h>
34 #include <linux/ethtool.h>
36 /* LCD controller is similar to DA850 */
37 #include <video/da8xx-fb.h>
39 #include <mach/hardware.h>
40 #include <mach/board-am335xevm.h>
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45 #include <asm/hardware/asp.h>
47 #include <plat/irqs.h>
48 #include <plat/board.h>
49 #include <plat/common.h>
50 #include <plat/lcdc.h>
51 #include <plat/usb.h>
52 #include <plat/mmc.h>
54 #include "board-flash.h"
55 #include "mux.h"
56 #include "devices.h"
57 #include "hsmmc.h"
59 /* Convert GPIO signal to GPIO pin number */
60 #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
62 /* TLK PHY IDs */
63 #define TLK110_PHY_ID           0x2000A201
64 #define TLK110_PHY_MASK         0xfffffff0
66 /* BBB PHY IDs */
67 #define BBB_PHY_ID              0x7c0f1
68 #define BBB_PHY_MASK            0xfffffffe
70 /* TLK110 PHY register offsets */
71 #define TLK110_COARSEGAIN_REG   0x00A3
72 #define TLK110_LPFHPF_REG       0x00AC
73 #define TLK110_SPAREANALOG_REG  0x00B9
74 #define TLK110_VRCR_REG         0x00D0
75 #define TLK110_SETFFE_REG       0x0107
76 #define TLK110_FTSP_REG         0x0154
77 #define TLK110_ALFATPIDL_REG    0x002A
78 #define TLK110_PSCOEF21_REG     0x0096
79 #define TLK110_PSCOEF3_REG      0x0097
80 #define TLK110_ALFAFACTOR1_REG  0x002C
81 #define TLK110_ALFAFACTOR2_REG  0x0023
82 #define TLK110_CFGPS_REG        0x0095
83 #define TLK110_FTSPTXGAIN_REG   0x0150
84 #define TLK110_SWSCR3_REG       0x000B
85 #define TLK110_SCFALLBACK_REG   0x0040
86 #define TLK110_PHYRCR_REG       0x001F
88 /* TLK110 register writes values */
89 #define TLK110_COARSEGAIN_VAL   0x0000
90 #define TLK110_LPFHPF_VAL       0x8000
91 #define TLK110_SPANALOG_VAL     0x0000
92 #define TLK110_VRCR_VAL         0x0008
93 #define TLK110_SETFFE_VAL       0x0605
94 #define TLK110_FTSP_VAL         0x0255
95 #define TLK110_ALFATPIDL_VAL    0x7998
96 #define TLK110_PSCOEF21_VAL     0x3A20
97 #define TLK110_PSCOEF3_VAL      0x003F
98 #define TLK110_ALFACTOR1_VAL    0xFF80
99 #define TLK110_ALFACTOR2_VAL    0x021C
100 #define TLK110_CFGPS_VAL        0x0000
101 #define TLK110_FTSPTXGAIN_VAL   0x6A88
102 #define TLK110_SWSCR3_VAL       0x0000
103 #define TLK110_SCFALLBACK_VAL   0xC11D
104 #define TLK110_PHYRCR_VAL       0x4000
106 #ifdef CONFIG_TLK110_WORKAROUND
107 #define am335x_tlk110_phy_init()\
108         do {    \
109                 phy_register_fixup_for_uid(TLK110_PHY_ID,\
110                                         TLK110_PHY_MASK,\
111                                         am335x_tlk110_phy_fixup);\
112         } while (0);
113 #else
114 #define am335x_tlk110_phy_init() do { } while (0);
115 #endif
117 static const struct display_panel disp_panel = {
118         WVGA,
119         32,
120         32,
121         COLOR_ACTIVE,
122 };
124 static struct lcd_ctrl_config lcd_cfg = {
125         &disp_panel,
126         .ac_bias                = 255,
127         .ac_bias_intrpt         = 0,
128         .dma_burst_sz           = 16,
129         .bpp                    = 32,
130         .fdd                    = 0x80,
131         .tft_alt_mode           = 0,
132         .stn_565_mode           = 0,
133         .mono_8bit_mode         = 0,
134         .invert_line_clock      = 1,
135         .invert_frm_clock       = 1,
136         .sync_edge              = 0,
137         .sync_ctrl              = 1,
138         .raster_order           = 0,
139 };
141 struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
142         .manu_name              = "ThreeFive",
143         .controller_data        = &lcd_cfg,
144         .type                   = "TFC_S9700RTWV35TR_01B",
145 };
147 #include "common.h"
149 /* TSc controller */
150 #include <linux/input/ti_tscadc.h>
151 #include <linux/lis3lv02d.h>
153 static struct resource tsc_resources[]  = {
154         [0] = {
155                 .start  = AM33XX_TSC_BASE,
156                 .end    = AM33XX_TSC_BASE + SZ_8K - 1,
157                 .flags  = IORESOURCE_MEM,
158         },
159         [1] = {
160                 .start  = AM33XX_IRQ_ADC_GEN,
161                 .end    = AM33XX_IRQ_ADC_GEN,
162                 .flags  = IORESOURCE_IRQ,
163         },
164 };
166 static struct tsc_data am335x_touchscreen_data  = {
167         .wires  = 4,
168         .x_plate_resistance = 200,
169 };
171 static struct platform_device tsc_device = {
172         .name   = "tsc",
173         .id     = -1,
174         .dev    = {
175                         .platform_data  = &am335x_touchscreen_data,
176         },
177         .num_resources  = ARRAY_SIZE(tsc_resources),
178         .resource       = tsc_resources,
179 };
181 static u8 am335x_iis_serializer_direction1[] = {
182         INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,        RX_MODE,
183         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
184         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
185         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
186 };
188 static struct snd_platform_data am335x_evm_snd_data1 = {
189         .tx_dma_offset  = 0x46400000,   /* McASP1 */
190         .rx_dma_offset  = 0x46400000,
191         .op_mode        = DAVINCI_MCASP_IIS_MODE,
192         .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
193         .tdm_slots      = 2,
194         .serial_dir     = am335x_iis_serializer_direction1,
195         .asp_chan_q     = EVENTQ_2,
196         .version        = MCASP_VERSION_3,
197         .txnumevt       = 1,
198         .rxnumevt       = 1,
199 };
201 static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
202         {
203                 .mmc            = 1,
204                 .caps           = MMC_CAP_4_BIT_DATA,
205                 .gpio_cd        = GPIO_TO_PIN(0, 6),
206                 .gpio_wp        = GPIO_TO_PIN(3, 18),
207                 .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
208         },
209         {
210                 .mmc            = 0,    /* will be set at runtime */
211         },
212         {
213                 .mmc            = 0,    /* will be set at runtime */
214         },
215         {}      /* Terminator */
216 };
219 #ifdef CONFIG_OMAP_MUX
220 static struct omap_board_mux board_mux[] __initdata = {
221         AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
222                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
223         AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
224                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
225         { .reg_offset = OMAP_MUX_TERMINATOR },
226 };
227 #else
228 #define board_mux       NULL
229 #endif
231 /* module pin mux structure */
232 struct pinmux_config {
233         const char *string_name; /* signal name format */
234         int val; /* Options for the mux register value */
235 };
237 struct evm_dev_cfg {
238         void (*device_init)(int evm_id, int profile);
240 /*
241 * If the device is required on both baseboard & daughter board (ex i2c),
242 * specify DEV_ON_BASEBOARD
243 */
244 #define DEV_ON_BASEBOARD        0
245 #define DEV_ON_DGHTR_BRD        1
246         u32 device_on;
248         u32 profile;    /* Profiles (0-7) in which the module is present */
249 };
251 /* AM335X - CPLD Register Offsets */
252 #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
253 #define CPLD_DEVICE_ID  0x04 /* CPLD identification */
254 #define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */
255 #define CPLD_CFG_REG    0x10 /* Configuration Register */
257 static struct i2c_client *cpld_client;
258 static u32 am335x_evm_id;
259 static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
260 };
262 /*
263 * EVM Config held in On-Board eeprom device.
265 * Header Format
267 *  Name                 Size    Contents
268 *                       (Bytes)
269 *-------------------------------------------------------------
270 *  Header               4       0xAA, 0x55, 0x33, 0xEE
272 *  Board Name           8       Name for board in ASCII.
273 *                               example "A33515BB" = "AM335X
274                                 Low Cost EVM board"
276 *  Version              4       Hardware version code for board in
277 *                               in ASCII. "1.0A" = rev.01.0A
279 *  Serial Number        12      Serial number of the board. This is a 12
280 *                               character string which is WWYY4P16nnnn, where
281 *                               WW = 2 digit week of the year of production
282 *                               YY = 2 digit year of production
283 *                               nnnn = incrementing board number
285 *  Configuration option 32      Codes(TBD) to show the configuration
286 *                               setup on this board.
288 *  Available            32720   Available space for other non-volatile
289 *                               data.
290 */
291 struct am335x_evm_eeprom_config {
292         u32     header;
293         u8      name[8];
294         char    version[4];
295         u8      serial[12];
296         u8      opt[32];
297 };
299 static struct am335x_evm_eeprom_config config;
300 static bool daughter_brd_detected;
302 #define GP_EVM_REV_IS_1_0               0x1
303 #define GP_EVM_REV_IS_1_1A              0x2
304 #define GP_EVM_REV_IS_UNKNOWN           0xFF
305 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
306 unsigned int gigabit_enable = 1;
308 #define EEPROM_MAC_ADDRESS_OFFSET       60 /* 4+8+4+12+32 */
309 #define EEPROM_NO_OF_MAC_ADDR           3
310 static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];
312 #define AM335X_EEPROM_HEADER            0xEE3355AA
314 /* current profile if exists else PROFILE_0 on error */
315 static u32 am335x_get_profile_selection(void)
317         int val = 0;
319         if (!cpld_client)
320                 /* error checking is not done in func's calling this routine.
321                 so return profile 0 on error */
322                 return 0;
324         val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
325         if (val < 0)
326                 return 0;       /* default to Profile 0 on Error */
327         else
328                 return val & 0x7;
331 /* Module pin mux for LCDC */
332 static struct pinmux_config lcdc_pin_mux[] = {
333         {"lcd_data0.lcd_data0",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
334                                                        | AM33XX_PULL_DISA},
335         {"lcd_data1.lcd_data1",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
336                                                        | AM33XX_PULL_DISA},
337         {"lcd_data2.lcd_data2",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
338                                                        | AM33XX_PULL_DISA},
339         {"lcd_data3.lcd_data3",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
340                                                        | AM33XX_PULL_DISA},
341         {"lcd_data4.lcd_data4",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
342                                                        | AM33XX_PULL_DISA},
343         {"lcd_data5.lcd_data5",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
344                                                        | AM33XX_PULL_DISA},
345         {"lcd_data6.lcd_data6",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
346                                                        | AM33XX_PULL_DISA},
347         {"lcd_data7.lcd_data7",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
348                                                        | AM33XX_PULL_DISA},
349         {"lcd_data8.lcd_data8",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
350                                                        | AM33XX_PULL_DISA},
351         {"lcd_data9.lcd_data9",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
352                                                        | AM33XX_PULL_DISA},
353         {"lcd_data10.lcd_data10",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
354                                                        | AM33XX_PULL_DISA},
355         {"lcd_data11.lcd_data11",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
356                                                        | AM33XX_PULL_DISA},
357         {"lcd_data12.lcd_data12",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
358                                                        | AM33XX_PULL_DISA},
359         {"lcd_data13.lcd_data13",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
360                                                        | AM33XX_PULL_DISA},
361         {"lcd_data14.lcd_data14",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
362                                                        | AM33XX_PULL_DISA},
363         {"lcd_data15.lcd_data15",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
364                                                        | AM33XX_PULL_DISA},
365         {"gpmc_ad8.lcd_data16",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
366         {"gpmc_ad9.lcd_data17",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
367         {"gpmc_ad10.lcd_data18",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
368         {"gpmc_ad11.lcd_data19",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
369         {"gpmc_ad12.lcd_data20",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
370         {"gpmc_ad13.lcd_data21",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
371         {"gpmc_ad14.lcd_data22",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
372         {"gpmc_ad15.lcd_data23",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
373         {"lcd_vsync.lcd_vsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
374         {"lcd_hsync.lcd_hsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
375         {"lcd_pclk.lcd_pclk",           OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
376         {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
377         {NULL, 0},
378 };
380 static struct pinmux_config tsc_pin_mux[] = {
381         {"ain0.ain0",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
382         {"ain1.ain1",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
383         {"ain2.ain2",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
384         {"ain3.ain3",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
385         {"vrefp.vrefp",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
386         {"vrefn.vrefn",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
387         {NULL, 0},
388 };
390 /* Pin mux for nand flash module */
391 static struct pinmux_config nand_pin_mux[] = {
392         {"gpmc_ad0.gpmc_ad0",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
393         {"gpmc_ad1.gpmc_ad1",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
394         {"gpmc_ad2.gpmc_ad2",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
395         {"gpmc_ad3.gpmc_ad3",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
396         {"gpmc_ad4.gpmc_ad4",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
397         {"gpmc_ad5.gpmc_ad5",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
398         {"gpmc_ad6.gpmc_ad6",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
399         {"gpmc_ad7.gpmc_ad7",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
400         {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
401         {"gpmc_wpn.gpmc_wpn",     OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
402         {"gpmc_csn0.gpmc_csn0",   OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
403         {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
404         {"gpmc_oen_ren.gpmc_oen_ren",    OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
405         {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
406         {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
407         {NULL, 0},
408 };
410 /* Module pin mux for SPI fash */
411 static struct pinmux_config spi0_pin_mux[] = {
412         {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
413                                                         | AM33XX_INPUT_EN},
414         {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
415                                                         | AM33XX_INPUT_EN},
416         {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
417                                                         | AM33XX_INPUT_EN},
418         {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
419                                                         | AM33XX_INPUT_EN},
420         {NULL, 0},
421 };
423 /* Module pin mux for SPI flash */
424 static struct pinmux_config spi1_pin_mux[] = {
425         {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
426                 | AM33XX_INPUT_EN},
427         {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
428                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
429         {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
430                 | AM33XX_INPUT_EN},
431         {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
432                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
433         {NULL, 0},
434 };
436 /* Module pin mux for rgmii1 */
437 static struct pinmux_config rgmii1_pin_mux[] = {
438         {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
439         {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
440         {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
441         {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
442         {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
443         {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
444         {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
445         {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
446         {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
447         {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
448         {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
449         {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
450         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
451         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
452         {NULL, 0},
453 };
455 /* Module pin mux for rgmii2 */
456 static struct pinmux_config rgmii2_pin_mux[] = {
457         {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
458         {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
459         {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
460         {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
461         {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
462         {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
463         {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
464         {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
465         {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
466         {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
467         {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
468         {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
469         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
470         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
471         {NULL, 0},
472 };
474 /* Module pin mux for mii1 */
475 static struct pinmux_config mii1_pin_mux[] = {
476         {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
477         {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
478         {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
479         {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
480         {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
481         {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
482         {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
483         {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
484         {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
485         {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
486         {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
487         {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
488         {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
489         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
490         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
491         {NULL, 0},
492 };
494 /* Module pin mux for rmii1 */
495 static struct pinmux_config rmii1_pin_mux[] = {
496         {"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
497         {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
498         {"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
499         {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
500         {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
501         {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
502         {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
503         {"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
504         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
505         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
506         {NULL, 0},
507 };
509 static struct pinmux_config i2c1_pin_mux[] = {
510         {"spi0_d1.i2c1_sda",    OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
511                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
512         {"spi0_cs0.i2c1_scl",   OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
513                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
514         {NULL, 0},
515 };
517 /* Module pin mux for mcasp1 */
518 static struct pinmux_config mcasp1_pin_mux[] = {
519         {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
520         {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
521         {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
522         {"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |
523                                                 AM33XX_PIN_INPUT_PULLDOWN},
524         {NULL, 0},
525 };
528 /* Module pin mux for mmc0 */
529 static struct pinmux_config mmc0_pin_mux[] = {
530         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
531         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
532         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
533         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
534         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
535         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
536         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
537         {"spi0_cs1.mmc0_sdcd",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
538         {NULL, 0},
539 };
541 static struct pinmux_config mmc0_no_cd_pin_mux[] = {
542         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
543         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
544         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
545         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
546         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
547         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
548         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
549         {NULL, 0},
550 };
552 /* Module pin mux for mmc1 */
553 static struct pinmux_config mmc1_pin_mux[] = {
554         {"gpmc_ad7.mmc1_dat7",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
555         {"gpmc_ad6.mmc1_dat6",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
556         {"gpmc_ad5.mmc1_dat5",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
557         {"gpmc_ad4.mmc1_dat4",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
558         {"gpmc_ad3.mmc1_dat3",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
559         {"gpmc_ad2.mmc1_dat2",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
560         {"gpmc_ad1.mmc1_dat1",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
561         {"gpmc_ad0.mmc1_dat0",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
562         {"gpmc_csn1.mmc1_clk",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
563         {"gpmc_csn2.mmc1_cmd",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
564         {"gpmc_csn0.mmc1_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
565         {"gpmc_advn_ale.mmc1_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
566         {NULL, 0},
567 };
569 /* Module pin mux for uart3 */
570 static struct pinmux_config uart3_pin_mux[] = {
571         {"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},
572         {"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},
573         {NULL, 0},
574 };
576 static struct pinmux_config d_can_gp_pin_mux[] = {
577         {"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
578         {"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
579         {NULL, 0},
580 };
582 static struct pinmux_config d_can_ia_pin_mux[] = {
583         {"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
584         {"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
585         {NULL, 0},
586 };
588 /*
589 * @pin_mux - single module pin-mux structure which defines pin-mux
590 *                       details for all its pins.
591 */
592 static void setup_pin_mux(struct pinmux_config *pin_mux)
594         int i;
596         for (i = 0; pin_mux->string_name != NULL; pin_mux++)
597                 omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
601 /* Matrix GPIO Keypad Support for profile-0 only: TODO */
603 /* pinmux for keypad device */
604 static struct pinmux_config matrix_keypad_pin_mux[] = {
605         {"gpmc_a5.gpio1_21",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
606         {"gpmc_a6.gpio1_22",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
607         {"gpmc_a9.gpio1_25",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
608         {"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
609         {"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
610         {NULL, 0},
611 };
613 /* Keys mapping */
614 static const uint32_t am335x_evm_matrix_keys[] = {
615         KEY(0, 0, KEY_MENU),
616         KEY(1, 0, KEY_BACK),
617         KEY(2, 0, KEY_LEFT),
619         KEY(0, 1, KEY_RIGHT),
620         KEY(1, 1, KEY_ENTER),
621         KEY(2, 1, KEY_DOWN),
622 };
624 const struct matrix_keymap_data am335x_evm_keymap_data = {
625         .keymap      = am335x_evm_matrix_keys,
626         .keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),
627 };
629 static const unsigned int am335x_evm_keypad_row_gpios[] = {
630         GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)
631 };
633 static const unsigned int am335x_evm_keypad_col_gpios[] = {
634         GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)
635 };
637 static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {
638         .keymap_data       = &am335x_evm_keymap_data,
639         .row_gpios         = am335x_evm_keypad_row_gpios,
640         .num_row_gpios     = ARRAY_SIZE(am335x_evm_keypad_row_gpios),
641         .col_gpios         = am335x_evm_keypad_col_gpios,
642         .num_col_gpios     = ARRAY_SIZE(am335x_evm_keypad_col_gpios),
643         .active_low        = false,
644         .debounce_ms       = 5,
645         .col_scan_delay_us = 2,
646 };
648 static struct platform_device am335x_evm_keyboard = {
649         .name  = "matrix-keypad",
650         .id    = -1,
651         .dev   = {
652                 .platform_data = &am335x_evm_keypad_platform_data,
653         },
654 };
656 static void matrix_keypad_init(int evm_id, int profile)
658         int err;
660         setup_pin_mux(matrix_keypad_pin_mux);
661         err = platform_device_register(&am335x_evm_keyboard);
662         if (err) {
663                 pr_err("failed to register matrix keypad (2x3) device\n");
664         }
668 /* pinmux for keypad device */
669 static struct pinmux_config volume_keys_pin_mux[] = {
670         {"spi0_sclk.gpio0_2",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
671         {"spi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
672         {NULL, 0},
673 };
675 /* Configure GPIOs for Volume Keys */
676 static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {
677         {
678                 .code                   = KEY_VOLUMEUP,
679                 .gpio                   = GPIO_TO_PIN(0, 2),
680                 .active_low             = true,
681                 .desc                   = "volume-up",
682                 .type                   = EV_KEY,
683                 .wakeup                 = 1,
684         },
685         {
686                 .code                   = KEY_VOLUMEDOWN,
687                 .gpio                   = GPIO_TO_PIN(0, 3),
688                 .active_low             = true,
689                 .desc                   = "volume-down",
690                 .type                   = EV_KEY,
691                 .wakeup                 = 1,
692         },
693 };
695 static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {
696         .buttons        = am335x_evm_volume_gpio_buttons,
697         .nbuttons       = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),
698 };
700 static struct platform_device am335x_evm_volume_keys = {
701         .name   = "gpio-keys",
702         .id     = -1,
703         .dev    = {
704                 .platform_data  = &am335x_evm_volume_gpio_key_info,
705         },
706 };
708 static void volume_keys_init(int evm_id, int profile)
710         int err;
712         setup_pin_mux(volume_keys_pin_mux);
713         err = platform_device_register(&am335x_evm_volume_keys);
714         if (err)
715                 pr_err("failed to register matrix keypad (2x3) device\n");
718 /*
719 * @evm_id - evm id which needs to be configured
720 * @dev_cfg - single evm structure which includes
721 *                               all module inits, pin-mux defines
722 * @profile - if present, else PROFILE_NONE
723 * @dghtr_brd_flg - Whether Daughter board is present or not
724 */
725 static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
726         int profile)
728         int i;
730         /*
731         * Only General Purpose & Industrial Auto Motro Control
732         * EVM has profiles. So check if this evm has profile.
733         * If not, ignore the profile comparison
734         */
736         /*
737         * If the device is on baseboard, directly configure it. Else (device on
738         * Daughter board), check if the daughter card is detected.
739         */
740         if (profile == PROFILE_NONE) {
741                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
742                         if (dev_cfg->device_on == DEV_ON_BASEBOARD)
743                                 dev_cfg->device_init(evm_id, profile);
744                         else if (daughter_brd_detected == true)
745                                 dev_cfg->device_init(evm_id, profile);
746                 }
747         } else {
748                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
749                         if (dev_cfg->profile & profile) {
750                                 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
751                                         dev_cfg->device_init(evm_id, profile);
752                                 else if (daughter_brd_detected == true)
753                                         dev_cfg->device_init(evm_id, profile);
754                         }
755                 }
756         }
759 #define AM335X_LCD_BL_PIN       GPIO_TO_PIN(0, 7)
761 /* pinmux for usb0 drvvbus */
762 static struct pinmux_config usb0_pin_mux[] = {
763         {"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
764         {NULL, 0},
765 };
767 /* pinmux for usb1 drvvbus */
768 static struct pinmux_config usb1_pin_mux[] = {
769         {"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
770         {NULL, 0},
771 };
773 /* pinmux for profibus */
774 static struct pinmux_config profibus_pin_mux[] = {
775         {"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},
776         {"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
777         {"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
778         {NULL, 0},
779 };
781 /* Module pin mux for eCAP0 */
782 static struct pinmux_config ecap0_pin_mux[] = {
783         {"ecap0_in_pwm0_out.gpio0_7", AM33XX_PIN_OUTPUT},
784         {NULL, 0},
785 };
787 static int backlight_enable;
789 #define AM335XEVM_WLAN_PMENA_GPIO       GPIO_TO_PIN(1, 30)
790 #define AM335XEVM_WLAN_IRQ_GPIO         GPIO_TO_PIN(3, 17)
792 struct wl12xx_platform_data am335xevm_wlan_data = {
793         .irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
794         .board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
795 };
797 /* Module pin mux for wlan and bluetooth */
798 static struct pinmux_config mmc2_wl12xx_pin_mux[] = {
799         {"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
800         {"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
801         {"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
802         {"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
803         {"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
804         {"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
805         {NULL, 0},
806 };
808 static struct pinmux_config uart1_wl12xx_pin_mux[] = {
809         {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
810         {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
811         {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
812         {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
813         {NULL, 0},
814 };
816 static struct pinmux_config wl12xx_pin_mux_evm_rev1_1a[] = {
817         {"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
818         {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
819         {"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
820         {NULL, 0},
821  };
823 static struct pinmux_config wl12xx_pin_mux_evm_rev1_0[] = {
824         {"gpmc_csn1.gpio1_30", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
825         {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
826         {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
827         {NULL, 0},
828  };
830 static void enable_ecap0(int evm_id, int profile)
832         backlight_enable = true;
835 static int __init ecap0_init(void)
837         int status = 0;
839         if (backlight_enable) {
840                 setup_pin_mux(ecap0_pin_mux);
842                 status = gpio_request(AM335X_LCD_BL_PIN, "lcd bl\n");
843                 if (status < 0)
844                         pr_warn("Failed to request gpio for LCD backlight\n");
846                 gpio_direction_output(AM335X_LCD_BL_PIN, 1);
847         }
848         return status;
850 late_initcall(ecap0_init);
852 static int __init conf_disp_pll(int rate)
854         struct clk *disp_pll;
855         int ret = -EINVAL;
857         disp_pll = clk_get(NULL, "dpll_disp_ck");
858         if (IS_ERR(disp_pll)) {
859                 pr_err("Cannot clk_get disp_pll\n");
860                 goto out;
861         }
863         ret = clk_set_rate(disp_pll, rate);
864         clk_put(disp_pll);
865 out:
866         return ret;
869 static void lcdc_init(int evm_id, int profile)
872         setup_pin_mux(lcdc_pin_mux);
874         if (conf_disp_pll(300000000)) {
875                 pr_info("Failed configure display PLL, not attempting to"
876                                 "register LCDC\n");
877                 return;
878         }
880         if (am33xx_register_lcdc(&TFC_S9700RTWV35TR_01B_pdata))
881                 pr_info("Failed to register LCDC device\n");
882         return;
885 static void tsc_init(int evm_id, int profile)
887         int err;
889         if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
890                 am335x_touchscreen_data.analog_input = 1;
891                 pr_info("TSC connected to beta GP EVM\n");
892         } else {
893                 am335x_touchscreen_data.analog_input = 0;
894                 pr_info("TSC connected to alpha GP EVM\n");
895         }
896         setup_pin_mux(tsc_pin_mux);
897         err = platform_device_register(&tsc_device);
898         if (err)
899                 pr_err("failed to register touchscreen device\n");
902 static void rgmii1_init(int evm_id, int profile)
904         setup_pin_mux(rgmii1_pin_mux);
905         return;
908 static void rgmii2_init(int evm_id, int profile)
910         setup_pin_mux(rgmii2_pin_mux);
911         return;
914 static void mii1_init(int evm_id, int profile)
916         setup_pin_mux(mii1_pin_mux);
917         return;
920 static void rmii1_init(int evm_id, int profile)
922         setup_pin_mux(rmii1_pin_mux);
923         return;
926 static void usb0_init(int evm_id, int profile)
928         setup_pin_mux(usb0_pin_mux);
929         return;
932 static void usb1_init(int evm_id, int profile)
934         setup_pin_mux(usb1_pin_mux);
935         return;
938 /* setup uart3 */
939 static void uart3_init(int evm_id, int profile)
941         setup_pin_mux(uart3_pin_mux);
942         return;
945 /* NAND partition information */
946 static struct mtd_partition am335x_nand_partitions[] = {
947 /* All the partition sizes are listed in terms of NAND block size */
948         {
949                 .name           = "SPL",
950                 .offset         = 0,                    /* Offset = 0x0 */
951                 .size           = SZ_128K,
952         },
953         {
954                 .name           = "SPL.backup1",
955                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x20000 */
956                 .size           = SZ_128K,
957         },
958         {
959                 .name           = "SPL.backup2",
960                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x40000 */
961                 .size           = SZ_128K,
962         },
963         {
964                 .name           = "SPL.backup3",
965                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x60000 */
966                 .size           = SZ_128K,
967         },
968         {
969                 .name           = "U-Boot",
970                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
971                 .size           = 15 * SZ_128K,
972         },
973         {
974                 .name           = "U-Boot Env",
975                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
976                 .size           = 1 * SZ_128K,
977         },
978         {
979                 .name           = "Kernel",
980                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
981                 .size           = 40 * SZ_128K,
982         },
983         {
984                 .name           = "File System",
985                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
986                 .size           = MTDPART_SIZ_FULL,
987         },
988 };
990 /* SPI 0/1 Platform Data */
991 /* SPI flash information */
992 static struct mtd_partition am335x_spi_partitions[] = {
993         /* All the partition sizes are listed in terms of erase size */
994         {
995                 .name       = "SPL",
996                 .offset     = 0,                        /* Offset = 0x0 */
997                 .size       = SZ_128K,
998         },
999         {
1000                 .name       = "U-Boot",
1001                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x20000 */
1002                 .size       = 2 * SZ_128K,
1003         },
1004         {
1005                 .name       = "U-Boot Env",
1006                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x60000 */
1007                 .size       = 2 * SZ_4K,
1008         },
1009         {
1010                 .name       = "Kernel",
1011                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x62000 */
1012                 .size       = 28 * SZ_128K,
1013         },
1014         {
1015                 .name       = "File System",
1016                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x3E2000 */
1017                 .size       = MTDPART_SIZ_FULL,         /* size ~= 4.1 MiB */
1018         }
1019 };
1021 static const struct flash_platform_data am335x_spi_flash = {
1022         .type      = "w25q64",
1023         .name      = "spi_flash",
1024         .parts     = am335x_spi_partitions,
1025         .nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
1026 };
1028 /*
1029  * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
1030  * So setup Max speed to be less than that of Controller speed
1031  */
1032 static struct spi_board_info am335x_spi0_slave_info[] = {
1033         {
1034                 .modalias      = "m25p80",
1035                 .platform_data = &am335x_spi_flash,
1036                 .irq           = -1,
1037                 .max_speed_hz  = 24000000,
1038                 .bus_num       = 1,
1039                 .chip_select   = 0,
1040         },
1041 };
1043 static struct spi_board_info am335x_spi1_slave_info[] = {
1044         {
1045                 .modalias      = "m25p80",
1046                 .platform_data = &am335x_spi_flash,
1047                 .irq           = -1,
1048                 .max_speed_hz  = 12000000,
1049                 .bus_num       = 2,
1050                 .chip_select   = 0,
1051         },
1052 };
1054 static void evm_nand_init(int evm_id, int profile)
1056         setup_pin_mux(nand_pin_mux);
1057         board_nand_init(am335x_nand_partitions,
1058                 ARRAY_SIZE(am335x_nand_partitions), 0, 0);
1061 static struct lis3lv02d_platform_data lis331dlh_pdata = {
1062         .click_flags = LIS3_CLICK_SINGLE_X |
1063                         LIS3_CLICK_SINGLE_Y |
1064                         LIS3_CLICK_SINGLE_Z,
1065         .wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
1066                         LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
1067                         LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
1068         .irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
1069         .wakeup_thresh  = 10,
1070         .click_thresh_x = 10,
1071         .click_thresh_y = 10,
1072         .click_thresh_z = 10,
1073         .g_range        = 2,
1074         .st_min_limits[0] = 120,
1075         .st_min_limits[1] = 120,
1076         .st_min_limits[2] = 140,
1077         .st_max_limits[0] = 550,
1078         .st_max_limits[1] = 550,
1079         .st_max_limits[2] = 750,
1080 };
1082 static struct i2c_board_info am335x_i2c_boardinfo1[] = {
1083         {
1084                 I2C_BOARD_INFO("tlv320aic3x", 0x1b),
1085         },
1086         {
1087                 I2C_BOARD_INFO("lis331dlh", 0x18),
1088                 .platform_data = &lis331dlh_pdata,
1089         },
1090         {
1091                 I2C_BOARD_INFO("tmp275", 0x48),
1092         },
1093 };
1095 static void i2c1_init(int evm_id, int profile)
1097         setup_pin_mux(i2c1_pin_mux);
1098         omap_register_i2c_bus(2, 100, am335x_i2c_boardinfo1,
1099                         ARRAY_SIZE(am335x_i2c_boardinfo1));
1100         return;
1103 /* Setup McASP 1 */
1104 static void mcasp1_init(int evm_id, int profile)
1106         /* Configure McASP */
1107         setup_pin_mux(mcasp1_pin_mux);
1108         am335x_register_mcasp1(&am335x_evm_snd_data1);
1109         return;
1112 static void mmc1_init(int evm_id, int profile)
1114         setup_pin_mux(mmc1_pin_mux);
1116         am335x_mmc[1].mmc = 2;
1117         am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
1118         am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
1119         am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
1120         am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
1122         /* mmc will be initialized when mmc0_init is called */
1123         return;
1126 static void mmc2_wl12xx_init(int evm_id, int profile)
1128         setup_pin_mux(mmc2_wl12xx_pin_mux);
1130         am335x_mmc[1].mmc = 3;
1131         am335x_mmc[1].name = "wl1271";
1132         am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
1133                                 | MMC_PM_KEEP_POWER;
1134         am335x_mmc[1].nonremovable = true;
1135         am335x_mmc[1].gpio_cd = -EINVAL;
1136         am335x_mmc[1].gpio_wp = -EINVAL;
1137         am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
1139         /* mmc will be initialized when mmc0_init is called */
1140         return;
1143 static void uart1_wl12xx_init(int evm_id, int profile)
1145         setup_pin_mux(uart1_wl12xx_pin_mux);
1148 static void wl12xx_bluetooth_enable(void)
1150         int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,
1151                 "bt_en\n");
1152         if (status < 0)
1153                 pr_err("Failed to request gpio for bt_enable");
1155         pr_info("Configure Bluetooth Enable pin...\n");
1156         gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
1159 static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
1161         if (on) {
1162                 gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 1);
1163                 mdelay(70);
1164         }
1165         else
1166                 gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 0);
1168         return 0;
1171 static void wl12xx_init(int evm_id, int profile)
1173         struct device *dev;
1174         struct omap_mmc_platform_data *pdata;
1175         int ret;
1177         /* Register WLAN and BT enable pins based on the evm board revision */
1178         if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
1179                 am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 16);
1180                 am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
1181         }
1182         else {
1183                 am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 30);
1184                 am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(1, 31);
1185         }
1187         wl12xx_bluetooth_enable();
1189         if (wl12xx_set_platform_data(&am335xevm_wlan_data))
1190                 pr_err("error setting wl12xx data\n");
1192         dev = am335x_mmc[1].dev;
1193         if (!dev) {
1194                 pr_err("wl12xx mmc device initialization failed\n");
1195                 goto out;
1196         }
1198         pdata = dev->platform_data;
1199         if (!pdata) {
1200                 pr_err("Platfrom data of wl12xx device not set\n");
1201                 goto out;
1202         }
1204         ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,
1205                 GPIOF_OUT_INIT_LOW, "wlan_en");
1206         if (ret) {
1207                 pr_err("Error requesting wlan enable gpio: %d\n", ret);
1208                 goto out;
1209         }
1211         if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
1212                 setup_pin_mux(wl12xx_pin_mux_evm_rev1_1a);
1213         else
1214                 setup_pin_mux(wl12xx_pin_mux_evm_rev1_0);
1216         pdata->slots[0].set_power = wl12xx_set_power;
1217 out:
1218         return;
1221 static void d_can_init(int evm_id, int profile)
1223         switch (evm_id) {
1224         case IND_AUT_MTR_EVM:
1225                 if ((profile == PROFILE_0) || (profile == PROFILE_1)) {
1226                         setup_pin_mux(d_can_ia_pin_mux);
1227                         /* Instance Zero */
1228                         am33xx_d_can_init(0);
1229                 }
1230                 break;
1231         case GEN_PURP_EVM:
1232                 if (profile == PROFILE_1) {
1233                         setup_pin_mux(d_can_gp_pin_mux);
1234                         /* Instance One */
1235                         am33xx_d_can_init(1);
1236                 }
1237                 break;
1238         default:
1239                 break;
1240         }
1243 static void mmc0_init(int evm_id, int profile)
1245         setup_pin_mux(mmc0_pin_mux);
1247         omap2_hsmmc_init(am335x_mmc);
1248         return;
1251 static void mmc0_no_cd_init(int evm_id, int profile)
1253         setup_pin_mux(mmc0_no_cd_pin_mux);
1255         omap2_hsmmc_init(am335x_mmc);
1256         return;
1260 /* setup spi0 */
1261 static void spi0_init(int evm_id, int profile)
1263         setup_pin_mux(spi0_pin_mux);
1264         spi_register_board_info(am335x_spi0_slave_info,
1265                         ARRAY_SIZE(am335x_spi0_slave_info));
1266         return;
1269 /* setup spi1 */
1270 static void spi1_init(int evm_id, int profile)
1272         setup_pin_mux(spi1_pin_mux);
1273         spi_register_board_info(am335x_spi1_slave_info,
1274                         ARRAY_SIZE(am335x_spi1_slave_info));
1275         return;
1279 static int beaglebone_phy_fixup(struct phy_device *phydev)
1281         phydev->supported &= ~(SUPPORTED_100baseT_Half |
1282                                 SUPPORTED_100baseT_Full);
1284         return 0;
1287 #ifdef CONFIG_TLK110_WORKAROUND
1288 static int am335x_tlk110_phy_fixup(struct phy_device *phydev)
1290         unsigned int val;
1292         /* This is done as a workaround to support TLK110 rev1.0 phy */
1293         val = phy_read(phydev, TLK110_COARSEGAIN_REG);
1294         phy_write(phydev, TLK110_COARSEGAIN_REG, (val | TLK110_COARSEGAIN_VAL));
1296         val = phy_read(phydev, TLK110_LPFHPF_REG);
1297         phy_write(phydev, TLK110_LPFHPF_REG, (val | TLK110_LPFHPF_VAL));
1299         val = phy_read(phydev, TLK110_SPAREANALOG_REG);
1300         phy_write(phydev, TLK110_SPAREANALOG_REG, (val | TLK110_SPANALOG_VAL));
1302         val = phy_read(phydev, TLK110_VRCR_REG);
1303         phy_write(phydev, TLK110_VRCR_REG, (val | TLK110_VRCR_VAL));
1305         val = phy_read(phydev, TLK110_SETFFE_REG);
1306         phy_write(phydev, TLK110_SETFFE_REG, (val | TLK110_SETFFE_VAL));
1308         val = phy_read(phydev, TLK110_FTSP_REG);
1309         phy_write(phydev, TLK110_FTSP_REG, (val | TLK110_FTSP_VAL));
1311         val = phy_read(phydev, TLK110_ALFATPIDL_REG);
1312         phy_write(phydev, TLK110_ALFATPIDL_REG, (val | TLK110_ALFATPIDL_VAL));
1314         val = phy_read(phydev, TLK110_PSCOEF21_REG);
1315         phy_write(phydev, TLK110_PSCOEF21_REG, (val | TLK110_PSCOEF21_VAL));
1317         val = phy_read(phydev, TLK110_PSCOEF3_REG);
1318         phy_write(phydev, TLK110_PSCOEF3_REG, (val | TLK110_PSCOEF3_VAL));
1320         val = phy_read(phydev, TLK110_ALFAFACTOR1_REG);
1321         phy_write(phydev, TLK110_ALFAFACTOR1_REG, (val | TLK110_ALFACTOR1_VAL));
1323         val = phy_read(phydev, TLK110_ALFAFACTOR2_REG);
1324         phy_write(phydev, TLK110_ALFAFACTOR2_REG, (val | TLK110_ALFACTOR2_VAL));
1326         val = phy_read(phydev, TLK110_CFGPS_REG);
1327         phy_write(phydev, TLK110_CFGPS_REG, (val | TLK110_CFGPS_VAL));
1329         val = phy_read(phydev, TLK110_FTSPTXGAIN_REG);
1330         phy_write(phydev, TLK110_FTSPTXGAIN_REG, (val | TLK110_FTSPTXGAIN_VAL));
1332         val = phy_read(phydev, TLK110_SWSCR3_REG);
1333         phy_write(phydev, TLK110_SWSCR3_REG, (val | TLK110_SWSCR3_VAL));
1335         val = phy_read(phydev, TLK110_SCFALLBACK_REG);
1336         phy_write(phydev, TLK110_SCFALLBACK_REG, (val | TLK110_SCFALLBACK_VAL));
1338         val = phy_read(phydev, TLK110_PHYRCR_REG);
1339         phy_write(phydev, TLK110_PHYRCR_REG, (val | TLK110_PHYRCR_VAL));
1341         return 0;
1343 #endif
1345 static void profibus_init(int evm_id, int profile)
1347         setup_pin_mux(profibus_pin_mux);
1348         return;
1351 /* Low-Cost EVM */
1352 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
1353         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
1354         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1355         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1356         {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
1357         {NULL, 0, 0},
1358 };
1360 /* General Purpose EVM */
1361 static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
1362         {enable_ecap0,  DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1363                                                 PROFILE_2 | PROFILE_7) },
1364         {lcdc_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1365                                                 PROFILE_2 | PROFILE_7) },
1366         {tsc_init,      DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
1367                                                 PROFILE_2 | PROFILE_7) },
1368         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
1369         {rgmii2_init,   DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
1370                                                 PROFILE_4 | PROFILE_6) },
1371         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1372         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1373         {evm_nand_init, DEV_ON_DGHTR_BRD,
1374                 (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
1375         {i2c1_init,     DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
1376         {mcasp1_init,   DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
1377         {mmc1_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
1378         {mmc2_wl12xx_init,      DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1379                                                                 PROFILE_5)},
1380         {mmc0_init,     DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
1381         {mmc0_no_cd_init,       DEV_ON_BASEBOARD, PROFILE_5},
1382         {spi0_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
1383         {uart1_wl12xx_init,     DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
1384                                                                 PROFILE_5)},
1385         {wl12xx_init,   DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
1386         {d_can_init,    DEV_ON_DGHTR_BRD, PROFILE_1},
1387         {matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
1388         {volume_keys_init,  DEV_ON_DGHTR_BRD, PROFILE_0},
1389         {NULL, 0, 0},
1390 };
1392 /* Industrial Auto Motor Control EVM */
1393 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
1394         {mii1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
1395         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1396         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1397         {profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1398         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
1399         {spi1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
1400         {uart3_init,    DEV_ON_DGHTR_BRD, PROFILE_ALL},
1401         {i2c1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
1402         {mmc0_no_cd_init,       DEV_ON_BASEBOARD, PROFILE_ALL},
1403         {NULL, 0, 0},
1404 };
1406 /* IP-Phone EVM */
1407 static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
1408         {enable_ecap0,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
1409         {lcdc_init,     DEV_ON_DGHTR_BRD, PROFILE_NONE},
1410         {tsc_init,      DEV_ON_DGHTR_BRD, PROFILE_NONE},
1411         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
1412         {rgmii2_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
1413         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1414         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1415         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
1416         {i2c1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1417         {mcasp1_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
1418         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1419         {NULL, 0, 0},
1420 };
1422 /* Beaglebone < Rev A3 */
1423 static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {
1424         {rmii1_init,    DEV_ON_BASEBOARD, PROFILE_NONE},
1425         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1426         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1427         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1428         {NULL, 0, 0},
1429 };
1431 /* Beaglebone Rev A3 and after */
1432 static struct evm_dev_cfg beaglebone_dev_cfg[] = {
1433         {mii1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1434         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1435         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1436         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
1437         {NULL, 0, 0},
1438 };
1440 static void setup_low_cost_evm(void)
1442         pr_info("The board is a AM335x Low Cost EVM.\n");
1444         _configure_device(LOW_COST_EVM, low_cost_evm_dev_cfg, PROFILE_NONE);
1447 static void setup_general_purpose_evm(void)
1449         u32 prof_sel = am335x_get_profile_selection();
1450         pr_info("The board is general purpose EVM in profile %d\n", prof_sel);
1452         if (!strncmp("1.1A", config.version, 4)) {
1453                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1454         } else if (!strncmp("1.0", config.version, 3)) {
1455                 gp_evm_revision = GP_EVM_REV_IS_1_0;
1456         } else {
1457                 pr_err("Found invalid GP EVM revision, falling back to Rev1.1A");
1458                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
1459         }
1461         if (gp_evm_revision == GP_EVM_REV_IS_1_0)
1462                 gigabit_enable = 0;
1463         else if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
1464                 gigabit_enable = 1;
1466         _configure_device(GEN_PURP_EVM, gen_purp_evm_dev_cfg, (1L << prof_sel));
1469 static void setup_ind_auto_motor_ctrl_evm(void)
1471         u32 prof_sel = am335x_get_profile_selection();
1473         pr_info("The board is an industrial automation EVM in profile %d\n",
1474                 prof_sel);
1476         /* Only Profile 0 is supported */
1477         if ((1L << prof_sel) != PROFILE_0) {
1478                 pr_err("AM335X: Only Profile 0 is supported\n");
1479                 pr_err("Assuming profile 0 & continuing\n");
1480                 prof_sel = PROFILE_0;
1481         }
1483         _configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
1484                 PROFILE_0);
1486         /* Fillup global evmid */
1487         am33xx_evmid_fillup(IND_AUT_MTR_EVM);
1489         /* Initialize TLK110 PHY registers for phy version 1.0 */
1490         am335x_tlk110_phy_init();
1495 static void setup_ip_phone_evm(void)
1497         pr_info("The board is an IP phone EVM\n");
1499         _configure_device(IP_PHN_EVM, ip_phn_evm_dev_cfg, PROFILE_NONE);
1502 /* BeagleBone < Rev A3 */
1503 static void setup_beaglebone_old(void)
1505         pr_info("The board is a AM335x Beaglebone < Rev A3.\n");
1507         /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
1508         am335x_mmc[0].gpio_wp = -EINVAL;
1510         _configure_device(LOW_COST_EVM, beaglebone_old_dev_cfg, PROFILE_NONE);
1512         phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,
1513                                         beaglebone_phy_fixup);
1516 /* BeagleBone after Rev A3 */
1517 static void setup_beaglebone(void)
1519         pr_info("The board is a AM335x Beaglebone.\n");
1521         /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
1522         am335x_mmc[0].gpio_wp = -EINVAL;
1524         _configure_device(LOW_COST_EVM, beaglebone_dev_cfg, PROFILE_NONE);
1528 static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
1530         u8 tmp;
1531         int ret;
1533         /*
1534          * try reading a byte from the EEPROM to see if it is
1535          * present. We could read a lot more, but that would
1536          * just slow the boot process and we have all the information
1537          * we need from the EEPROM on the base board anyway.
1538          */
1539         ret = m->read(m, &tmp, 0, sizeof(u8));
1540         if (ret == sizeof(u8)) {
1541                 pr_info("Detected a daughter card on AM335x EVM..");
1542                 daughter_brd_detected = true;
1543         } else {
1544                 pr_info("No daughter card found\n");
1545                 daughter_brd_detected = false;
1546         }
1549 static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
1551         int ret;
1552         char tmp[10];
1554         /* 1st get the MAC address from EEPROM */
1555         ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,
1556                 EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));
1558         if (ret != sizeof(am335x_mac_addr)) {
1559                 pr_warning("AM335X: EVM Config read fail: %d\n", ret);
1560                 return;
1561         }
1563         /* Fillup global mac id */
1564         am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],
1565                                 &am335x_mac_addr[1][0]);
1567         /* get board specific data */
1568         ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
1569         if (ret != sizeof(config)) {
1570                 pr_warning("AM335X EVM config read fail, read %d bytes\n", ret);
1571                 return;
1572         }
1574         if (config.header != AM335X_EEPROM_HEADER) {
1575                 pr_warning("AM335X: wrong header 0x%x, expected 0x%x\n",
1576                         config.header, AM335X_EEPROM_HEADER);
1577                 goto out;
1578         }
1580         if (strncmp("A335", config.name, 4)) {
1581                 pr_err("Board %s doesn't look like an AM335x board\n",
1582                         config.name);
1583                 goto out;
1584         }
1586         snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);
1587         pr_info("Board name: %s\n", tmp);
1588         snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);
1589         pr_info("Board version: %s\n", tmp);
1591         if (!strncmp("A335BONE", config.name, 8)) {
1592                 daughter_brd_detected = false;
1593                 if(!strncmp("00A1", config.version, 4) ||
1594                    !strncmp("00A2", config.version, 4))
1595                         setup_beaglebone_old();
1596                 else
1597                         setup_beaglebone();
1598         } else {
1599                 /* only 6 characters of options string used for now */
1600                 snprintf(tmp, 7, "%s", config.opt);
1601                 pr_info("SKU: %s\n", tmp);
1603                 if (!strncmp("SKU#00", config.opt, 6))
1604                         setup_low_cost_evm();
1605                 else if (!strncmp("SKU#01", config.opt, 6))
1606                         setup_general_purpose_evm();
1607                 else if (!strncmp("SKU#02", config.opt, 6))
1608                         setup_ind_auto_motor_ctrl_evm();
1609                 else if (!strncmp("SKU#03", config.opt, 6))
1610                         setup_ip_phone_evm();
1611                 else
1612                         goto out;
1613         }
1614         /* Initialize cpsw after board detection is completed as board
1615          * information is required for configuring phy address and hence
1616          * should be call only after board detection
1617          */
1618         am33xx_cpsw_init(gigabit_enable);
1620         return;
1621 out:
1622         /*
1623          * If the EEPROM hasn't been programed or an incorrect header
1624          * or board name are read, assume this is an old beaglebone board
1625          * (< Rev A3)
1626          */
1627         pr_err("Could not detect any board, falling back to: "
1628                 "Beaglebone (< Rev A3) with no daughter card connected\n");
1629         daughter_brd_detected = false;
1630         setup_beaglebone_old();
1632         /* Initialize cpsw after board detection is completed as board
1633          * information is required for configuring phy address and hence
1634          * should be call only after board detection
1635          */
1637         am33xx_cpsw_init(gigabit_enable);
1640 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
1641         .byte_len       = (256*1024) / 8,
1642         .page_size      = 64,
1643         .flags          = AT24_FLAG_ADDR16,
1644         .setup          = am335x_setup_daughter_board,
1645         .context        = (void *)NULL,
1646 };
1648 static struct at24_platform_data am335x_baseboard_eeprom_info = {
1649         .byte_len       = (256*1024) / 8,
1650         .page_size      = 64,
1651         .flags          = AT24_FLAG_ADDR16,
1652         .setup          = am335x_evm_setup,
1653         .context        = (void *)NULL,
1654 };
1656 /*
1657 * Daughter board Detection.
1658 * Every board has a ID memory (EEPROM) on board. We probe these devices at
1659 * machine init, starting from daughter board and ending with baseboard.
1660 * Assumptions :
1661 *       1. probe for i2c devices are called in the order they are included in
1662 *          the below struct. Daughter boards eeprom are probed 1st. Baseboard
1663 *          eeprom probe is called last.
1664 */
1665 static struct i2c_board_info __initdata am335x_i2c_boardinfo[] = {
1666         {
1667                 /* Daughter Board EEPROM */
1668                 I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
1669                 .platform_data  = &am335x_daughter_board_eeprom_info,
1670         },
1671         {
1672                 /* Baseboard board EEPROM */
1673                 I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
1674                 .platform_data  = &am335x_baseboard_eeprom_info,
1675         },
1676         {
1677                 I2C_BOARD_INFO("cpld_reg", 0x35),
1678         },
1679         {
1680                 I2C_BOARD_INFO("tlc59108", 0x40),
1681         },
1683 };
1685 static struct omap_musb_board_data musb_board_data = {
1686         .interface_type = MUSB_INTERFACE_ULPI,
1687         .mode           = MUSB_OTG,
1688         .power          = 500,
1689         .instances      = 1,
1690 };
1692 static int cpld_reg_probe(struct i2c_client *client,
1693             const struct i2c_device_id *id)
1695         cpld_client = client;
1696         return 0;
1699 static int __devexit cpld_reg_remove(struct i2c_client *client)
1701         cpld_client = NULL;
1702         return 0;
1705 static const struct i2c_device_id cpld_reg_id[] = {
1706         { "cpld_reg", 0 },
1707         { }
1708 };
1710 static struct i2c_driver cpld_reg_driver = {
1711         .driver = {
1712                 .name   = "cpld_reg",
1713         },
1714         .probe          = cpld_reg_probe,
1715         .remove         = cpld_reg_remove,
1716         .id_table       = cpld_reg_id,
1717 };
1719 static void evm_init_cpld(void)
1721         i2c_add_driver(&cpld_reg_driver);
1724 static void __init am335x_evm_i2c_init(void)
1726         /* Initially assume Low Cost EVM Config */
1727         am335x_evm_id = LOW_COST_EVM;
1729         evm_init_cpld();
1731         omap_register_i2c_bus(1, 100, am335x_i2c_boardinfo,
1732                                 ARRAY_SIZE(am335x_i2c_boardinfo));
1735 static struct resource am335x_rtc_resources[] = {
1736         {
1737                 .start          = AM33XX_RTC_BASE,
1738                 .end            = AM33XX_RTC_BASE + SZ_4K - 1,
1739                 .flags          = IORESOURCE_MEM,
1740         },
1741         { /* timer irq */
1742                 .start          = AM33XX_IRQ_RTC_TIMER,
1743                 .end            = AM33XX_IRQ_RTC_TIMER,
1744                 .flags          = IORESOURCE_IRQ,
1745         },
1746         { /* alarm irq */
1747                 .start          = AM33XX_IRQ_RTC_ALARM,
1748                 .end            = AM33XX_IRQ_RTC_ALARM,
1749                 .flags          = IORESOURCE_IRQ,
1750         },
1751 };
1753 static struct platform_device am335x_rtc_device = {
1754         .name           = "omap_rtc",
1755         .id             = -1,
1756         .num_resources  = ARRAY_SIZE(am335x_rtc_resources),
1757         .resource       = am335x_rtc_resources,
1758 };
1760 static int am335x_rtc_init(void)
1762         void __iomem *base;
1763         struct clk *clk;
1765         clk = clk_get(NULL, "rtc_fck");
1766         if (IS_ERR(clk)) {
1767                 pr_err("rtc : Failed to get RTC clock\n");
1768                 return -1;
1769         }
1771         if (clk_enable(clk)) {
1772                 pr_err("rtc: Clock Enable Failed\n");
1773                 return -1;
1774         }
1776         base = ioremap(AM33XX_RTC_BASE, SZ_4K);
1778         if (WARN_ON(!base))
1779                 return -ENOMEM;
1781         /* Unlock the rtc's registers */
1782         __raw_writel(0x83e70b13, base + 0x6c);
1783         __raw_writel(0x95a4f1e0, base + 0x70);
1785         /*
1786          * Enable the 32K OSc
1787          * TODO: Need a better way to handle this
1788          * Since we want the clock to be running before mmc init
1789          * we need to do it before the rtc probe happens
1790          */
1791         __raw_writel(0x48, base + 0x54);
1793         iounmap(base);
1795         return  platform_device_register(&am335x_rtc_device);
1798 /* Enable clkout2 */
1799 static struct pinmux_config clkout2_pin_mux[] = {
1800         {"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
1801         {NULL, 0},
1802 };
1804 static void __init clkout2_enable(void)
1806         struct clk *ck_32;
1808         ck_32 = clk_get(NULL, "clkout2_ck");
1809         if (IS_ERR(ck_32)) {
1810                 pr_err("Cannot clk_get ck_32\n");
1811                 return;
1812         }
1814         clk_enable(ck_32);
1816         setup_pin_mux(clkout2_pin_mux);
1819 static void __init am335x_evm_init(void)
1821         am33xx_mux_init(board_mux);
1822         omap_serial_init();
1823         am335x_rtc_init();
1824         clkout2_enable();
1825         am335x_evm_i2c_init();
1826         omap_sdrc_init(NULL, NULL);
1827         usb_musb_init(&musb_board_data);
1828         omap_board_config = am335x_evm_config;
1829         omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
1830         /* Create an alias for icss clock */
1831         if (clk_add_alias("pruss", NULL, "icss_uart_gclk", NULL))
1832                 pr_err("failed to create an alias: icss_uart_gclk --> pruss\n");
1833         /* Create an alias for gfx/sgx clock */
1834         if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))
1835                 pr_err("failed to create an alias: gfx_fclk --> sgx_ck\n");
1838 static void __init am335x_evm_map_io(void)
1840         omap2_set_globals_am33xx();
1841         omapam33xx_map_common_io();
1844 MACHINE_START(AM335XEVM, "am335xevm")
1845         /* Maintainer: Texas Instruments */
1846         .atag_offset    = 0x100,
1847         .map_io         = am335x_evm_map_io,
1848         .init_early     = am33xx_init_early,
1849         .init_irq       = ti81xx_init_irq,
1850         .handle_irq     = omap3_intc_handle_irq,
1851         .timer          = &omap3_am33xx_timer,
1852         .init_machine   = am335x_evm_init,
1853 MACHINE_END
1855 MACHINE_START(AM335XIAEVM, "am335xiaevm")
1856         /* Maintainer: Texas Instruments */
1857         .atag_offset    = 0x100,
1858         .map_io         = am335x_evm_map_io,
1859         .init_irq       = ti81xx_init_irq,
1860         .init_early     = am33xx_init_early,
1861         .timer          = &omap3_am33xx_timer,
1862         .init_machine   = am335x_evm_init,
1863 MACHINE_END