a9fc494ba1f9ccb42603e22b4a943505a65be524
[sitara-epos/sitara-epos-kernel.git] / arch / arm / mach-omap2 / board-am335xevm.c
1 /*
2  * Code for AM335X EVM.
3  *
4  * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/i2c/at24.h>
20 #include <linux/gpio.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/flash.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/nand.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
30 /* LCD controller is similar to DA850 */
31 #include <video/da8xx-fb.h>
33 #include <mach/hardware.h>
34 #include <mach/board-am335xevm.h>
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/hardware/asp.h>
41 #include <plat/irqs.h>
42 #include <plat/board.h>
43 #include <plat/common.h>
44 #include <plat/lcdc.h>
45 #include <plat/usb.h>
46 #include <plat/mmc.h>
48 #include "board-flash.h"
49 #include "mux.h"
50 #include "devices.h"
51 #include "hsmmc.h"
53 /* Convert GPIO signal to GPIO pin number */
54 #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
56 static const struct display_panel disp_panel = {
57         WVGA,
58         32,
59         32,
60         COLOR_ACTIVE,
61 };
63 static struct lcd_ctrl_config lcd_cfg = {
64         &disp_panel,
65         .ac_bias                = 255,
66         .ac_bias_intrpt         = 0,
67         .dma_burst_sz           = 16,
68         .bpp                    = 32,
69         .fdd                    = 0x80,
70         .tft_alt_mode           = 0,
71         .stn_565_mode           = 0,
72         .mono_8bit_mode         = 0,
73         .invert_line_clock      = 1,
74         .invert_frm_clock       = 1,
75         .sync_edge              = 0,
76         .sync_ctrl              = 1,
77         .raster_order           = 0,
78 };
80 struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
81         .manu_name              = "ThreeFive",
82         .controller_data        = &lcd_cfg,
83         .type                   = "TFC_S9700RTWV35TR_01B",
84 };
86 #include "common.h"
88 /* TSc controller */
89 #include <linux/input/ti_tscadc.h>
91 static struct resource tsc_resources[]  = {
92         [0] = {
93                 .start  = AM33XX_TSC_BASE,
94                 .end    = AM33XX_TSC_BASE + SZ_8K - 1,
95                 .flags  = IORESOURCE_MEM,
96         },
97         [1] = {
98                 .start  = AM33XX_IRQ_ADC_GEN,
99                 .end    = AM33XX_IRQ_ADC_GEN,
100                 .flags  = IORESOURCE_IRQ,
101         },
102 };
104 static struct tsc_data am335x_touchscreen_data  = {
105         .wires  = 4,
106         .x_plate_resistance = 200,
107 };
109 static struct platform_device tsc_device = {
110         .name   = "tsc",
111         .id     = -1,
112         .dev    = {
113                         .platform_data  = &am335x_touchscreen_data,
114         },
115         .num_resources  = ARRAY_SIZE(tsc_resources),
116         .resource       = tsc_resources,
117 };
119 static u8 am335x_iis_serializer_direction1[] = {
120         INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,        RX_MODE,
121         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
122         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
123         INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
124 };
126 static struct snd_platform_data am335x_evm_snd_data1 = {
127         .tx_dma_offset  = 0x46400000,   /* McASP1 */
128         .rx_dma_offset  = 0x46400000,
129         .op_mode        = DAVINCI_MCASP_IIS_MODE,
130         .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
131         .tdm_slots      = 2,
132         .serial_dir     = am335x_iis_serializer_direction1,
133         .asp_chan_q     = EVENTQ_2,
134         .version        = MCASP_VERSION_3,
135         .txnumevt       = 1,
136         .rxnumevt       = 1,
137 };
139 static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
140         {
141                 .mmc            = 1,
142                 .caps           = MMC_CAP_4_BIT_DATA,
143                 .gpio_cd        = GPIO_TO_PIN(0, 6),
144                 .gpio_wp        = GPIO_TO_PIN(3, 18),
145                 .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
146         },
147         {
148                 .mmc            = 0,    /* will be set at runtime */
149         },
150         {
151                 .mmc            = 0,    /* will be set at runtime */
152         },
153         {}      /* Terminator */
154 };
157 #ifdef CONFIG_OMAP_MUX
158 static struct omap_board_mux board_mux[] __initdata = {
159         AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
160                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
161         AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
162                         AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
163         { .reg_offset = OMAP_MUX_TERMINATOR },
164 };
165 #else
166 #define board_mux       NULL
167 #endif
169 /* module pin mux structure */
170 struct pinmux_config {
171         const char *string_name; /* signal name format */
172         int val; /* Options for the mux register value */
173 };
175 struct evm_dev_cfg {
176         void (*device_init)(int evm_id, int profile);
178 /*
179 * If the device is required on both baseboard & daughter board (ex i2c),
180 * specify DEV_ON_BASEBOARD
181 */
182 #define DEV_ON_BASEBOARD        0
183 #define DEV_ON_DGHTR_BRD        1
184         u32 device_on;
186         u32 profile;    /* Profiles (0-7) in which the module is present */
187 };
189 /* AM335X - CPLD Register Offsets */
190 #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
191 #define CPLD_DEVICE_ID  0x04 /* CPLD identification */
192 #define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */
193 #define CPLD_CFG_REG    0x10 /* Configuration Register */
195 static struct i2c_client *cpld_client;
196 static u32 am335x_evm_id;
197 static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
198 };
200 /*
201 * EVM Config held in On-Board eeprom device.
203 * Header Format
205 *  Name                 Size    Contents
206 *                       (Bytes)
207 *-------------------------------------------------------------
208 *  Header               4       0xAA, 0x55, 0x33, 0xEE
210 *  Board Name           8       Name for board in ASCII.
211 *                               example "A33515BB" = "AM335X
212                                 Low Cost EVM board"
214 *  Version              4       Hardware version code for board in
215 *                               in ASCII. "1.0A" = rev.01.0A
217 *  Serial Number        12      Serial number of the board. This is a 12
218 *                               character string which is WWYY4P16nnnn, where
219 *                               WW = 2 digit week of the year of production
220 *                               YY = 2 digit year of production
221 *                               nnnn = incrementing board number
223 *  Configuration option 32      Codes(TBD) to show the configuration
224 *                               setup on this board.
226 *  Available            32720   Available space for other non-volatile
227 *                               data.
228 */
229 struct am335x_evm_eeprom_config {
230         u32     header;
231         u8      name[8];
232         u32     version;
233         u8      serial[12];
234         u8      opt[32];
235 };
237 static struct am335x_evm_eeprom_config config;
238 static bool daughter_brd_detected;
240 #define GP_EVM_REV_IS_1_0               0x1
241 #define GP_EVM_REV_IS_1_1A              0x2
242 #define GP_EVM_REV_IS_UNKNOWN           0xFF
243 static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
245 #define AM335X_EEPROM_HEADER            0xEE3355AA
247 /* current profile if exists else PROFILE_0 on error */
248 static u32 am335x_get_profile_selection(void)
250         int val = 0;
252         if (!cpld_client)
253                 /* error checking is not done in func's calling this routine.
254                 so return profile 0 on error */
255                 return 0;
257         val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
258         if (val < 0)
259                 return 0;       /* default to Profile 0 on Error */
260         else
261                 return val & 0x7;
264 /* Module pin mux for LCDC */
265 static struct pinmux_config lcdc_pin_mux[] = {
266         {"lcd_data0.lcd_data0",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
267                                                        | AM33XX_PULL_DISA},
268         {"lcd_data1.lcd_data1",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
269                                                        | AM33XX_PULL_DISA},
270         {"lcd_data2.lcd_data2",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
271                                                        | AM33XX_PULL_DISA},
272         {"lcd_data3.lcd_data3",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
273                                                        | AM33XX_PULL_DISA},
274         {"lcd_data4.lcd_data4",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
275                                                        | AM33XX_PULL_DISA},
276         {"lcd_data5.lcd_data5",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
277                                                        | AM33XX_PULL_DISA},
278         {"lcd_data6.lcd_data6",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
279                                                        | AM33XX_PULL_DISA},
280         {"lcd_data7.lcd_data7",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
281                                                        | AM33XX_PULL_DISA},
282         {"lcd_data8.lcd_data8",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
283                                                        | AM33XX_PULL_DISA},
284         {"lcd_data9.lcd_data9",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
285                                                        | AM33XX_PULL_DISA},
286         {"lcd_data10.lcd_data10",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
287                                                        | AM33XX_PULL_DISA},
288         {"lcd_data11.lcd_data11",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
289                                                        | AM33XX_PULL_DISA},
290         {"lcd_data12.lcd_data12",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
291                                                        | AM33XX_PULL_DISA},
292         {"lcd_data13.lcd_data13",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
293                                                        | AM33XX_PULL_DISA},
294         {"lcd_data14.lcd_data14",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
295                                                        | AM33XX_PULL_DISA},
296         {"lcd_data15.lcd_data15",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
297                                                        | AM33XX_PULL_DISA},
298         {"gpmc_ad8.lcd_data16",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
299         {"gpmc_ad9.lcd_data17",         OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
300         {"gpmc_ad10.lcd_data18",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
301         {"gpmc_ad11.lcd_data19",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
302         {"gpmc_ad12.lcd_data20",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
303         {"gpmc_ad13.lcd_data21",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
304         {"gpmc_ad14.lcd_data22",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
305         {"gpmc_ad15.lcd_data23",        OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
306         {"lcd_vsync.lcd_vsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
307         {"lcd_hsync.lcd_hsync",         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
308         {"lcd_pclk.lcd_pclk",           OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
309         {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
310         {NULL, 0},
311 };
313 static struct pinmux_config tsc_pin_mux[] = {
314         {"ain0.ain0",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
315         {"ain1.ain1",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
316         {"ain2.ain2",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
317         {"ain3.ain3",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
318         {"vrefp.vrefp",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
319         {"vrefn.vrefn",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
320         {NULL, 0},
321 };
323 /* Pin mux for nand flash module */
324 static struct pinmux_config nand_pin_mux[] = {
325         {"gpmc_ad0.gpmc_ad0",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
326         {"gpmc_ad1.gpmc_ad1",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
327         {"gpmc_ad2.gpmc_ad2",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
328         {"gpmc_ad3.gpmc_ad3",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
329         {"gpmc_ad4.gpmc_ad4",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
330         {"gpmc_ad5.gpmc_ad5",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
331         {"gpmc_ad6.gpmc_ad6",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
332         {"gpmc_ad7.gpmc_ad7",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
333         {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
334         {"gpmc_wpn.gpmc_wpn",     OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
335         {"gpmc_csn0.gpmc_csn0",   OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
336         {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
337         {"gpmc_oen_ren.gpmc_oen_ren",    OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
338         {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
339         {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
340         {NULL, 0},
341 };
343 /* Module pin mux for SPI fash */
344 static struct pinmux_config spi0_pin_mux[] = {
345         {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
346                                                         | AM33XX_INPUT_EN},
347         {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
348                                                         | AM33XX_INPUT_EN},
349         {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
350                                                         | AM33XX_INPUT_EN},
351         {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
352                                                         | AM33XX_INPUT_EN},
353         {NULL, 0},
354 };
356 /* Module pin mux for SPI flash */
357 static struct pinmux_config spi1_pin_mux[] = {
358         {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
359                 | AM33XX_INPUT_EN},
360         {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
361                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
362         {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
363                 | AM33XX_INPUT_EN},
364         {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
365                 | AM33XX_PULL_UP | AM33XX_INPUT_EN},
366         {NULL, 0},
367 };
369 /* Module pin mux for rgmii1 */
370 static struct pinmux_config rgmii1_pin_mux[] = {
371         {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
372         {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
373         {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
374         {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
375         {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
376         {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
377         {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
378         {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
379         {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
380         {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
381         {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
382         {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
383         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
384         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
385         {NULL, 0},
386 };
388 /* Module pin mux for rgmii2 */
389 static struct pinmux_config rgmii2_pin_mux[] = {
390         {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
391         {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
392         {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
393         {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
394         {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
395         {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
396         {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
397         {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
398         {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
399         {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
400         {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
401         {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
402         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
403         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
404         {NULL, 0},
405 };
407 /* Module pin mux for mii1 */
408 static struct pinmux_config mii1_pin_mux[] = {
409         {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
410         {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
411         {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
412         {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
413         {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
414         {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
415         {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
416         {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
417         {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
418         {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
419         {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
420         {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
421         {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
422         {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
423         {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
424         {NULL, 0},
425 };
427 static struct pinmux_config i2c1_pin_mux[] = {
428         {"spi0_d1.i2c1_sda",    OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
429                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
430         {"spi0_cs0.i2c1_scl",   OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
431                                         AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
432         {NULL, 0},
433 };
435 /* Module pin mux for mcasp1 */
436 static struct pinmux_config mcasp1_pin_mux[] = {
437         {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
438         {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
439         {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
440         {"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |
441                                                 AM33XX_PIN_INPUT_PULLDOWN},
442         {NULL, 0},
443 };
446 /* Module pin mux for mmc0 */
447 static struct pinmux_config mmc0_pin_mux[] = {
448         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
449         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
450         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
451         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
452         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
453         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
454         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
455         {"spi0_cs1.mmc0_sdcd",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
456         {NULL, 0},
457 };
459 static struct pinmux_config mmc0_no_cd_pin_mux[] = {
460         {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
461         {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
462         {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
463         {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
464         {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
465         {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
466         {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
467         {NULL, 0},
468 };
470 /* Module pin mux for mmc1 */
471 static struct pinmux_config mmc1_pin_mux[] = {
472         {"gpmc_ad7.mmc1_dat7",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
473         {"gpmc_ad6.mmc1_dat6",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
474         {"gpmc_ad5.mmc1_dat5",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
475         {"gpmc_ad4.mmc1_dat4",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
476         {"gpmc_ad3.mmc1_dat3",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
477         {"gpmc_ad2.mmc1_dat2",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
478         {"gpmc_ad1.mmc1_dat1",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
479         {"gpmc_ad0.mmc1_dat0",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
480         {"gpmc_csn1.mmc1_clk",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
481         {"gpmc_csn2.mmc1_cmd",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
482         {"gpmc_csn0.mmc1_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
483         {"gpmc_advn_ale.mmc1_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
484         {NULL, 0},
485 };
487 /*
488 * @pin_mux - single module pin-mux structure which defines pin-mux
489 *                       details for all its pins.
490 */
491 static void setup_pin_mux(struct pinmux_config *pin_mux)
493         int i;
495         for (i = 0; pin_mux->string_name != NULL; pin_mux++)
496                 omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
500 /*
501 * @evm_id - evm id which needs to be configured
502 * @dev_cfg - single evm structure which includes
503 *                               all module inits, pin-mux defines
504 * @profile - if present, else PROFILE_NONE
505 * @dghtr_brd_flg - Whether Daughter board is present or not
506 */
507 static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
508         int profile)
510         int i;
512         /*
513         * Only General Purpose & Industrial Auto Motro Control
514         * EVM has profiles. So check if this evm has profile.
515         * If not, ignore the profile comparison
516         */
518         /*
519         * If the device is on baseboard, directly configure it. Else (device on
520         * Daughter board), check if the daughter card is detected.
521         */
522         if (profile == PROFILE_NONE) {
523                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
524                         if (dev_cfg->device_on == DEV_ON_BASEBOARD)
525                                 dev_cfg->device_init(evm_id, profile);
526                         else if (daughter_brd_detected == true)
527                                 dev_cfg->device_init(evm_id, profile);
528                 }
529         } else {
530                 for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
531                         if (dev_cfg->profile & profile) {
532                                 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
533                                         dev_cfg->device_init(evm_id, profile);
534                                 else if (daughter_brd_detected == true)
535                                         dev_cfg->device_init(evm_id, profile);
536                         }
537                 }
538         }
541 #define AM335X_LCD_BL_PIN       GPIO_TO_PIN(0, 7)
543 /* pinmux for usb0 drvvbus */
544 static struct pinmux_config usb0_pin_mux[] = {
545         {"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
546         {NULL, 0},
547 };
549 /* pinmux for usb1 drvvbus */
550 static struct pinmux_config usb1_pin_mux[] = {
551         {"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
552         {NULL, 0},
553 };
555 /* Module pin mux for eCAP0 */
556 static struct pinmux_config ecap0_pin_mux[] = {
557         {"ecap0_in_pwm0_out.gpio0_7", AM33XX_PIN_OUTPUT},
558         {NULL, 0},
559 };
561 static int backlight_enable;
563 static void enable_ecap0(int evm_id, int profile)
565         backlight_enable = true;
568 static int __init ecap0_init(void)
570         int status = 0;
572         if (backlight_enable) {
573                 setup_pin_mux(ecap0_pin_mux);
575                 status = gpio_request(AM335X_LCD_BL_PIN, "lcd bl\n");
576                 if (status < 0)
577                         pr_warn("Failed to request gpio for LCD backlight\n");
579                 gpio_direction_output(AM335X_LCD_BL_PIN, 1);
580         }
581         return status;
583 late_initcall(ecap0_init);
585 static int __init conf_disp_pll(int rate)
587         struct clk *disp_pll;
588         int ret = -EINVAL;
590         disp_pll = clk_get(NULL, "dpll_disp_ck");
591         if (IS_ERR(disp_pll)) {
592                 pr_err("Cannot clk_get disp_pll\n");
593                 goto out;
594         }
596         ret = clk_set_rate(disp_pll, rate);
597         clk_put(disp_pll);
598 out:
599         return ret;
602 static void lcdc_init(int evm_id, int profile)
605         setup_pin_mux(lcdc_pin_mux);
607         if (conf_disp_pll(300000000)) {
608                 pr_info("Failed configure display PLL, not attempting to"
609                                 "register LCDC\n");
610                 return;
611         }
613         if (am33xx_register_lcdc(&TFC_S9700RTWV35TR_01B_pdata))
614                 pr_info("Failed to register LCDC device\n");
615         return;
618 static void tsc_init(int evm_id, int profile)
620         int err;
622         if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
623                 am335x_touchscreen_data.analog_input = 1;
624                 pr_info("TSC connected to beta GP EVM\n");
625         } else {
626                 am335x_touchscreen_data.analog_input = 0;
627                 pr_info("TSC connected to alpha GP EVM\n");
628         }
629         setup_pin_mux(tsc_pin_mux);
630         err = platform_device_register(&tsc_device);
631         if (err)
632                 pr_err("failed to register touchscreen device\n");
635 static void rgmii1_init(int evm_id, int profile)
637         setup_pin_mux(rgmii1_pin_mux);
638         return;
641 static void rgmii2_init(int evm_id, int profile)
643         setup_pin_mux(rgmii2_pin_mux);
644         return;
647 static void mii1_init(int evm_id, int profile)
649         setup_pin_mux(mii1_pin_mux);
650         return;
653 static void usb0_init(int evm_id, int profile)
655         setup_pin_mux(usb0_pin_mux);
656         return;
659 static void usb1_init(int evm_id, int profile)
661         setup_pin_mux(usb1_pin_mux);
662         return;
665 /* NAND partition information */
666 static struct mtd_partition am335x_nand_partitions[] = {
667 /* All the partition sizes are listed in terms of NAND block size */
668         {
669                 .name           = "SPL",
670                 .offset         = 0,                    /* Offset = 0x0 */
671                 .size           = SZ_128K,
672         },
673         {
674                 .name           = "SPL.backup1",
675                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x20000 */
676                 .size           = SZ_128K,
677         },
678         {
679                 .name           = "SPL.backup2",
680                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x40000 */
681                 .size           = SZ_128K,
682         },
683         {
684                 .name           = "SPL.backup3",
685                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x60000 */
686                 .size           = SZ_128K,
687         },
688         {
689                 .name           = "U-Boot",
690                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
691                 .size           = 15 * SZ_128K,
692         },
693         {
694                 .name           = "U-Boot Env",
695                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
696                 .size           = 1 * SZ_128K,
697         },
698         {
699                 .name           = "Kernel",
700                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
701                 .size           = 40 * SZ_128K,
702         },
703         {
704                 .name           = "File System",
705                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
706                 .size           = MTDPART_SIZ_FULL,
707         },
708 };
710 /* SPI 0/1 Platform Data */
711 /* SPI flash information */
712 static struct mtd_partition am335x_spi_partitions[] = {
713         /* All the partition sizes are listed in terms of erase size */
714         {
715                 .name       = "SPL",
716                 .offset     = 0,                        /* Offset = 0x0 */
717                 .size       = SZ_128K,
718         },
719         {
720                 .name       = "U-Boot",
721                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x20000 */
722                 .size       = 2 * SZ_128K,
723         },
724         {
725                 .name       = "U-Boot Env",
726                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x60000 */
727                 .size       = 2 * SZ_4K,
728         },
729         {
730                 .name       = "Kernel",
731                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x62000 */
732                 .size       = 28 * SZ_128K,
733         },
734         {
735                 .name       = "File System",
736                 .offset     = MTDPART_OFS_APPEND,       /* Offset = 0x3E2000 */
737                 .size       = MTDPART_SIZ_FULL,         /* size ~= 4.1 MiB */
738         }
739 };
741 static const struct flash_platform_data am335x_spi_flash = {
742         .type      = "w25q64",
743         .name      = "spi_flash",
744         .parts     = am335x_spi_partitions,
745         .nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
746 };
748 /*
749  * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
750  * So setup Max speed to be less than that of Controller speed
751  */
752 static struct spi_board_info am335x_spi0_slave_info[] = {
753         {
754                 .modalias      = "m25p80",
755                 .platform_data = &am335x_spi_flash,
756                 .irq           = -1,
757                 .max_speed_hz  = 24000000,
758                 .bus_num       = 1,
759                 .chip_select   = 0,
760         },
761 };
763 static struct spi_board_info am335x_spi1_slave_info[] = {
764         {
765                 .modalias      = "m25p80",
766                 .platform_data = &am335x_spi_flash,
767                 .irq           = -1,
768                 .max_speed_hz  = 12000000,
769                 .bus_num       = 2,
770                 .chip_select   = 0,
771         },
772 };
774 static void evm_nand_init(int evm_id, int profile)
776         setup_pin_mux(nand_pin_mux);
777         board_nand_init(am335x_nand_partitions,
778                 ARRAY_SIZE(am335x_nand_partitions), 0, 0);
781 static struct i2c_board_info am335x_i2c_boardinfo1[] = {
782         {
783                 I2C_BOARD_INFO("tlv320aic3x", 0x1b),
784         },
785 };
787 static void i2c1_init(int evm_id, int profile)
789         setup_pin_mux(i2c1_pin_mux);
790         omap_register_i2c_bus(2, 100, am335x_i2c_boardinfo1,
791                         ARRAY_SIZE(am335x_i2c_boardinfo1));
792         return;
795 /* Setup McASP 1 */
796 static void mcasp1_init(int evm_id, int profile)
798         /* Configure McASP */
799         setup_pin_mux(mcasp1_pin_mux);
800         am335x_register_mcasp1(&am335x_evm_snd_data1);
801         return;
804 static void mmc1_init(int evm_id, int profile)
806         setup_pin_mux(mmc1_pin_mux);
808         am335x_mmc[1].mmc = 2;
809         am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
810         am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
811         am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
812         am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
814         /* mmc will be initialized when mmc0_init is called */
815         return;
818 static void mmc0_init(int evm_id, int profile)
820         setup_pin_mux(mmc0_pin_mux);
822         omap2_hsmmc_init(am335x_mmc);
823         return;
826 static void mmc0_no_cd_init(int evm_id, int profile)
828         setup_pin_mux(mmc0_no_cd_pin_mux);
830         omap2_hsmmc_init(am335x_mmc);
831         return;
835 /* setup spi0 */
836 static void spi0_init(int evm_id, int profile)
838         setup_pin_mux(spi0_pin_mux);
839         spi_register_board_info(am335x_spi0_slave_info,
840                         ARRAY_SIZE(am335x_spi0_slave_info));
841         return;
844 /* setup spi1 */
845 static void spi1_init(int evm_id, int profile)
847         setup_pin_mux(spi1_pin_mux);
848         spi_register_board_info(am335x_spi1_slave_info,
849                         ARRAY_SIZE(am335x_spi1_slave_info));
850         return;
853 /* Low-Cost EVM */
854 static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
855         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
856         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
857         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
858         {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
859         {NULL, 0, 0},
860 };
862 /* General Purpose EVM */
863 static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
864         {enable_ecap0,  DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
865                                                 PROFILE_2 | PROFILE_7) },
866         {lcdc_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
867                                                 PROFILE_2 | PROFILE_7) },
868         {tsc_init,      DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
869                                                 PROFILE_2 | PROFILE_7) },
870         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
871         {rgmii2_init,   DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
872                                                 PROFILE_4 | PROFILE_6) },
873         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
874         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
875         {evm_nand_init, DEV_ON_DGHTR_BRD,
876                 (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
877         {i2c1_init,     DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
878         {mcasp1_init,   DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
879         {mmc1_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
880         {mmc0_init,     DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
881         {mmc0_no_cd_init,       DEV_ON_BASEBOARD, PROFILE_5},
882         {spi0_init,     DEV_ON_DGHTR_BRD, PROFILE_2},
883         {NULL, 0, 0},
884 };
886 /* Industrial Auto Motor Control EVM */
887 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
888         {mii1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
889         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
890         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
891         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
892         {spi1_init,     DEV_ON_DGHTR_BRD, PROFILE_ALL},
893         {NULL, 0, 0},
894 };
896 /* IP-Phone EVM */
897 static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
898         {enable_ecap0,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
899         {lcdc_init,     DEV_ON_DGHTR_BRD, PROFILE_NONE},
900         {tsc_init,      DEV_ON_DGHTR_BRD, PROFILE_NONE},
901         {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
902         {rgmii2_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
903         {usb0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
904         {usb1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
905         {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
906         {i2c1_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
907         {mcasp1_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
908         {mmc0_init,     DEV_ON_BASEBOARD, PROFILE_NONE},
909         {NULL, 0, 0},
910 };
912 static void setup_low_cost_evm(void)
914         pr_info("The board is a AM335x Low Cost EVM.\n");
916         _configure_device(LOW_COST_EVM, low_cost_evm_dev_cfg, PROFILE_NONE);
919 static void setup_general_purpose_evm(void)
921         u32 prof_sel = am335x_get_profile_selection();
922         pr_info("The board is general purpose EVM in profile %d\n", prof_sel);
924         if (!strncmp("1.1A", config.version, 4)) {
925                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
926         } else if (!strncmp("1.0", config.version, 3)) {
927                 gp_evm_revision = GP_EVM_REV_IS_1_0;
928         } else {
929                 pr_err("Found invalid GP EVM revision, falling back to Rev1.1A");
930                 gp_evm_revision = GP_EVM_REV_IS_1_1A;
931         }
933         if (gp_evm_revision == GP_EVM_REV_IS_1_0)
934                 gigabit_enable = 0;
935         else if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
936                 gigabit_enable = 1;
938         _configure_device(GEN_PURP_EVM, gen_purp_evm_dev_cfg, (1L << prof_sel));
941 static void setup_ind_auto_motor_ctrl_evm(void)
943         u32 prof_sel = am335x_get_profile_selection();
945         pr_info("The board is an industrial automation EVM in profile %d\n",
946                 prof_sel);
948         /* Only Profile 0 is supported */
949         if ((1L << prof_sel) != PROFILE_0) {
950                 pr_err("AM335X: Only Profile 0 is supported\n");
951                 pr_err("Assuming profile 0 & continuing\n");
952                 prof_sel = PROFILE_0;
953         }
955         _configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
956                 PROFILE_0);
960 static void setup_ip_phone_evm(void)
962         pr_info("The board is an IP phone EVM\n");
964         _configure_device(IP_PHN_EVM, ip_phn_evm_dev_cfg, PROFILE_NONE);
967 static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
969         u8 tmp;
970         int ret;
972         /*
973          * try reading a byte from the EEPROM to see if it is
974          * present. We could read a lot more, but that would
975          * just slow the boot process and we have all the information
976          * we need from the EEPROM on the base board anyway.
977          */
978         ret = m->read(m, &tmp, 0, sizeof(u8));
979         if (ret == sizeof(u8)) {
980                 pr_info("Detected a daughter card on AM335x EVM..");
981                 daughter_brd_detected = true;
982         } else {
983                 pr_info("No daughter card found\n");
984                 daughter_brd_detected = false;
985         }
988 static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
990         int ret;
991         char tmp[10];
993         /* get board specific data */
994         ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
995         if (ret != sizeof(config)) {
996                 pr_warning("AM335X EVM config read fail, read %d bytes\n", ret);
997                 return;
998         }
1000         if (config.header != AM335X_EEPROM_HEADER) {
1001                 pr_warning("AM335X: wrong header 0x%x, expected 0x%x\n",
1002                         config.header, AM335X_EEPROM_HEADER);
1003                 goto out;
1004         }
1006         if (strncmp("A335", config.name, 4)) {
1007                 pr_err("Board %s doesn't look like an AM335x board\n",
1008                         config.name);
1009                 goto out;
1010         }
1012         snprintf(tmp, sizeof(config.name), "%s", config.name);
1013         pr_info("Board name: %s\n", tmp);
1014         /* only 6 characters of options string used for now */
1015         snprintf(tmp, 7, "%s", config.opt);
1016         pr_info("SKU: %s\n", tmp);
1018         if (!strncmp("SKU#00", config.opt, 6))
1019                 setup_low_cost_evm();
1020         else if (!strncmp("SKU#01", config.opt, 6))
1021                 setup_general_purpose_evm();
1022         else if (!strncmp("SKU#02", config.opt, 6))
1023                 setup_ind_auto_motor_ctrl_evm();
1024         else if (!strncmp("SKU#03", config.opt, 6))
1025                 setup_ip_phone_evm();
1026         else
1027                 goto out;
1029         /* Initialize cpsw after board detection is completed as board
1030          * information is required for configuring phy address and hence
1031          * should be call only after board detection
1032          */
1033         am33xx_cpsw_init();
1035         return;
1036 out:
1037         /*
1038          * for bring-up assume a full configuration, this should
1039          * eventually be changed to assume a minimal configuration
1040          */
1041         pr_err("Could not detect any board, falling back to: "
1042                 "General purpose EVM in profile 0 with daughter card connected\n");
1043         daughter_brd_detected = true;
1044         setup_general_purpose_evm();
1046         /* Initialize cpsw after board detection is completed as board
1047          * information is required for configuring phy address and hence
1048          * should be call only after board detection
1049          */
1050         am33xx_cpsw_init();
1054 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
1055         .byte_len       = (256*1024) / 8,
1056         .page_size      = 64,
1057         .flags          = AT24_FLAG_ADDR16,
1058         .setup          = am335x_setup_daughter_board,
1059         .context        = (void *)NULL,
1060 };
1062 static struct at24_platform_data am335x_baseboard_eeprom_info = {
1063         .byte_len       = (256*1024) / 8,
1064         .page_size      = 64,
1065         .flags          = AT24_FLAG_ADDR16,
1066         .setup          = am335x_evm_setup,
1067         .context        = (void *)NULL,
1068 };
1070 /*
1071 * Daughter board Detection.
1072 * Every board has a ID memory (EEPROM) on board. We probe these devices at
1073 * machine init, starting from daughter board and ending with baseboard.
1074 * Assumptions :
1075 *       1. probe for i2c devices are called in the order they are included in
1076 *          the below struct. Daughter boards eeprom are probed 1st. Baseboard
1077 *          eeprom probe is called last.
1078 */
1079 static struct i2c_board_info __initdata am335x_i2c_boardinfo[] = {
1080         {
1081                 /* Daughter Board EEPROM */
1082                 I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
1083                 .platform_data  = &am335x_daughter_board_eeprom_info,
1084         },
1085         {
1086                 /* Baseboard board EEPROM */
1087                 I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
1088                 .platform_data  = &am335x_baseboard_eeprom_info,
1089         },
1090         {
1091                 I2C_BOARD_INFO("cpld_reg", 0x35),
1092         },
1093         {
1094                 I2C_BOARD_INFO("tlc59108", 0x40),
1095         },
1097 };
1099 static struct omap_musb_board_data musb_board_data = {
1100         .interface_type = MUSB_INTERFACE_ULPI,
1101         .mode           = MUSB_OTG,
1102         .power          = 500,
1103         .instances      = 1,
1104 };
1106 static int cpld_reg_probe(struct i2c_client *client,
1107             const struct i2c_device_id *id)
1109         cpld_client = client;
1110         return 0;
1113 static int __devexit cpld_reg_remove(struct i2c_client *client)
1115         cpld_client = NULL;
1116         return 0;
1119 static const struct i2c_device_id cpld_reg_id[] = {
1120         { "cpld_reg", 0 },
1121         { }
1122 };
1124 static struct i2c_driver cpld_reg_driver = {
1125         .driver = {
1126                 .name   = "cpld_reg",
1127         },
1128         .probe          = cpld_reg_probe,
1129         .remove         = cpld_reg_remove,
1130         .id_table       = cpld_reg_id,
1131 };
1133 static void evm_init_cpld(void)
1135         i2c_add_driver(&cpld_reg_driver);
1138 static void __init am335x_evm_i2c_init(void)
1140         /* Initially assume Low Cost EVM Config */
1141         am335x_evm_id = LOW_COST_EVM;
1143         evm_init_cpld();
1145         omap_register_i2c_bus(1, 100, am335x_i2c_boardinfo,
1146                                 ARRAY_SIZE(am335x_i2c_boardinfo));
1149 static void __init am335x_evm_init(void)
1151         am33xx_mux_init(board_mux);
1152         omap_serial_init();
1153         am335x_evm_i2c_init();
1154         omap_sdrc_init(NULL, NULL);
1155         usb_musb_init(&musb_board_data);
1156         omap_board_config = am335x_evm_config;
1157         omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
1160 static void __init am335x_evm_map_io(void)
1162         omap2_set_globals_am33xx();
1163         omapam33xx_map_common_io();
1166 MACHINE_START(AM335XEVM, "am335xevm")
1167         /* Maintainer: Texas Instruments */
1168         .atag_offset    = 0x100,
1169         .map_io         = am335x_evm_map_io,
1170         .init_early     = am33xx_init_early,
1171         .init_irq       = ti81xx_init_irq,
1172         .handle_irq     = omap3_intc_handle_irq,
1173         .timer          = &omap3_am33xx_timer,
1174         .init_machine   = am335x_evm_init,
1175 MACHINE_END