caa1e82f1e72a95910663aaf71f2e71df9b18a04
1 /*
2 * board-flash.c
3 * Modified from mach-omap2/board-3430sdp-flash.c
4 *
5 * Copyright (C) 2009 Nokia Corporation
6 * Copyright (C) 2009 Texas Instruments
7 *
8 * Vimal Singh <vimalsingh@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/io.h>
19 #include <plat/irqs.h>
21 #include <plat/gpmc.h>
22 #include <plat/nand.h>
23 #include <plat/onenand.h>
24 #include <plat/tc.h>
26 #include "board-flash.h"
28 #define REG_FPGA_REV 0x10
29 #define REG_FPGA_DIP_SWITCH_INPUT2 0x60
30 #define MAX_SUPPORTED_GPMC_CONFIG 3
32 #define DEBUG_BASE 0x08000000 /* debug board */
34 /* various memory sizes */
35 #define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
36 #define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
38 static struct physmap_flash_data board_nor_data = {
39 .width = 2,
40 };
42 static struct resource board_nor_resource = {
43 .flags = IORESOURCE_MEM,
44 };
46 static struct platform_device board_nor_device = {
47 .name = "physmap-flash",
48 .id = 0,
49 .dev = {
50 .platform_data = &board_nor_data,
51 },
52 .num_resources = 1,
53 .resource = &board_nor_resource,
54 };
56 static void
57 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
58 {
59 int err;
61 board_nor_data.parts = nor_parts;
62 board_nor_data.nr_parts = nr_parts;
64 /* Configure start address and size of NOR device */
65 if (omap_rev() >= OMAP3430_REV_ES1_0) {
66 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
67 (unsigned long *)&board_nor_resource.start);
68 board_nor_resource.end = board_nor_resource.start
69 + FLASH_SIZE_SDPV2 - 1;
70 } else {
71 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
72 (unsigned long *)&board_nor_resource.start);
73 board_nor_resource.end = board_nor_resource.start
74 + FLASH_SIZE_SDPV1 - 1;
75 }
76 if (err < 0) {
77 pr_err("NOR: Can't request GPMC CS\n");
78 return;
79 }
80 if (platform_device_register(&board_nor_device) < 0)
81 pr_err("Unable to register NOR device\n");
82 }
84 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
85 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
86 static struct omap_onenand_platform_data board_onenand_data = {
87 .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
88 };
90 static void
91 __init board_onenand_init(struct mtd_partition *onenand_parts,
92 u8 nr_parts, u8 cs)
93 {
94 board_onenand_data.cs = cs;
95 board_onenand_data.parts = onenand_parts;
96 board_onenand_data.nr_parts = nr_parts;
98 gpmc_onenand_init(&board_onenand_data);
99 }
100 #else
101 static void
102 __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
103 {
104 }
105 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
107 #if defined(CONFIG_MTD_NAND_OMAP2) || \
108 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
110 /* Note that all values in this struct are in nanoseconds */
111 struct gpmc_timings nand_default_timings = {
113 .sync_clk = 0,
115 .cs_on = 0,
116 .cs_rd_off = 36,
117 .cs_wr_off = 36,
119 .adv_on = 6,
120 .adv_rd_off = 24,
121 .adv_wr_off = 36,
123 .we_off = 30,
124 .oe_off = 48,
126 .access = 54,
127 .rd_cycle = 72,
128 .wr_cycle = 72,
130 .wr_access = 30,
131 .wr_data_mux_bus = 0,
132 };
134 static struct omap_nand_platform_data omap_nand_data = {
135 .gpmc_t = &nand_default_timings,
136 };
138 struct omap_nand_platform_data *
139 __init omap_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
140 int nand_type, struct gpmc_timings *gpmc_t)
141 {
142 omap_nand_data.cs = cs;
143 omap_nand_data.parts = nand_parts;
144 omap_nand_data.nr_parts = nr_parts;
145 omap_nand_data.devsize = nand_type;
146 omap_nand_data.gpmc_t = gpmc_t;
148 return &omap_nand_data;
149 }
150 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
152 /**
153 * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
154 * the various cs values.
155 */
156 static u8 get_gpmc0_type(void)
157 {
158 u8 cs = 0;
159 void __iomem *fpga_map_addr;
161 fpga_map_addr = ioremap(DEBUG_BASE, 4096);
162 if (!fpga_map_addr)
163 return -ENOMEM;
165 if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
166 /* we dont have an DEBUG FPGA??? */
167 /* Depend on #defines!! default to strata boot return param */
168 goto unmap;
170 /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
171 cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
173 /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
174 if (omap_rev() >= OMAP3430_REV_ES1_0)
175 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
176 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
177 ((cs & 2) << 1) | ((cs & 1) << 3);
178 else
179 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
180 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
181 unmap:
182 iounmap(fpga_map_addr);
183 return cs;
184 }
186 /**
187 * board_flash_init - Identify devices connected to GPMC and register.
188 *
189 * @return - void.
190 */
191 void board_flash_init(struct flash_partitions partition_info[],
192 char chip_sel_board[][GPMC_CS_NUM], int nand_type)
193 {
194 u8 cs = 0;
195 u8 norcs = GPMC_CS_NUM + 1;
196 u8 nandcs = GPMC_CS_NUM + 1;
197 u8 onenandcs = GPMC_CS_NUM + 1;
198 u8 idx;
199 unsigned char *config_sel = NULL;
201 /* REVISIT: Is this return correct idx for 2430 SDP?
202 * for which cs configuration matches for 2430 SDP?
203 */
204 idx = get_gpmc0_type();
205 if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
206 pr_err("%s: Invalid chip select: %d\n", __func__, cs);
207 return;
208 }
209 config_sel = (unsigned char *)(chip_sel_board[idx]);
211 while (cs < GPMC_CS_NUM) {
212 switch (config_sel[cs]) {
213 case PDC_NOR:
214 if (norcs > GPMC_CS_NUM)
215 norcs = cs;
216 break;
217 case PDC_NAND:
218 if (nandcs > GPMC_CS_NUM)
219 nandcs = cs;
220 break;
221 case PDC_ONENAND:
222 if (onenandcs > GPMC_CS_NUM)
223 onenandcs = cs;
224 break;
225 };
226 cs++;
227 }
229 if (norcs > GPMC_CS_NUM)
230 pr_err("NOR: Unable to find configuration in GPMC\n");
231 else
232 board_nor_init(partition_info[0].parts,
233 partition_info[0].nr_parts, norcs);
235 if (onenandcs > GPMC_CS_NUM)
236 pr_err("OneNAND: Unable to find configuration in GPMC\n");
237 else
238 board_onenand_init(partition_info[1].parts,
239 partition_info[1].nr_parts, onenandcs);
241 if (nandcs > GPMC_CS_NUM)
242 pr_err("NAND: Unable to find configuration in GPMC\n");
243 else
244 omap_nand_init(partition_info[2].parts,
245 partition_info[2].nr_parts, nandcs,
246 nand_type, &nand_default_timings);
247 }