arch/arm/mach-omap2/clockdomain2xxx_3xxx.c

   1 /*
   2  * OMAP2 and OMAP3 clockdomain control
   3  *
   4  * Copyright (C) 2008-2010 Texas Instruments, Inc.
   5  * Copyright (C) 2008-2010 Nokia Corporation
   6  *
   7  * Derived from mach-omap2/clockdomain.c written by Paul Walmsley
   8  * Rajendra Nayak <rnayak@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <plat/prcm.h>
  17 #include "prm.h"
  18 #include "prm2xxx_3xxx.h"
  19 #include "cm.h"
  20 #include "cm2xxx_3xxx.h"
  21 #include "cm-regbits-24xx.h"
  22 #include "cm-regbits-34xx.h"
  23 #include "prm-regbits-24xx.h"
  24 #include "clockdomain.h"
  25
  26 static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
  27                                                 struct clockdomain *clkdm2)
  28 {
  29         omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
  30                                 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
  31         return 0;
  32 }
  33
  34 static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
  35                                                  struct clockdomain *clkdm2)
  36 {
  37         omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
  38                                 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
  39         return 0;
  40 }
  41
  42 static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
  43                                                  struct clockdomain *clkdm2)
  44 {
  45         return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
  46                                 PM_WKDEP, (1 << clkdm2->dep_bit));
  47 }
  48
  49 static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
  50 {
  51         struct clkdm_dep *cd;
  52         u32 mask = 0;
  53
  54         for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
  55                 if (!cd->clkdm)
  56                         continue; /* only happens if data is erroneous */
  57
  58                 /* PRM accesses are slow, so minimize them */
  59                 mask |= 1 << cd->clkdm->dep_bit;
  60                 atomic_set(&cd->wkdep_usecount, 0);
  61         }
  62
  63         omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
  64                                  PM_WKDEP);
  65         return 0;
  66 }
  67
  68 static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1,
  69                                                  struct clockdomain *clkdm2)
  70 {
  71         omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
  72                                 clkdm1->pwrdm.ptr->prcm_offs,
  73                                 OMAP3430_CM_SLEEPDEP);
  74         return 0;
  75 }
  76
  77 static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1,
  78                                                  struct clockdomain *clkdm2)
  79 {
  80         omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
  81                                 clkdm1->pwrdm.ptr->prcm_offs,
  82                                 OMAP3430_CM_SLEEPDEP);
  83         return 0;
  84 }
  85
  86 static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1,
  87                                                  struct clockdomain *clkdm2)
  88 {
  89         return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
  90                                 OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit));
  91 }
  92
  93 static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
  94 {
  95         struct clkdm_dep *cd;
  96         u32 mask = 0;
  97
  98         for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
  99                 if (!cd->clkdm)
 100                         continue; /* only happens if data is erroneous */
 101
 102                 /* PRM accesses are slow, so minimize them */
 103                 mask |= 1 << cd->clkdm->dep_bit;
 104                 atomic_set(&cd->sleepdep_usecount, 0);
 105         }
 106         omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
 107                                 OMAP3430_CM_SLEEPDEP);
 108         return 0;
 109 }
 110
 111 static int omap2_clkdm_sleep(struct clockdomain *clkdm)
 112 {
 113         omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 114                                 clkdm->pwrdm.ptr->prcm_offs,
 115                                 OMAP2_PM_PWSTCTRL);
 116         return 0;
 117 }
 118
 119 static int omap2_clkdm_wakeup(struct clockdomain *clkdm)
 120 {
 121         omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 122                                 clkdm->pwrdm.ptr->prcm_offs,
 123                                 OMAP2_PM_PWSTCTRL);
 124         return 0;
 125 }
 126
 127 static void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
 128 {
 129         if (atomic_read(&clkdm->usecount) > 0)
 130                 _clkdm_add_autodeps(clkdm);
 131
 132         omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 133                                 clkdm->clktrctrl_mask);
 134 }
 135
 136 static void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
 137 {
 138         omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 139                                 clkdm->clktrctrl_mask);
 140
 141         if (atomic_read(&clkdm->usecount) > 0)
 142                 _clkdm_del_autodeps(clkdm);
 143 }
 144
 145 static void _enable_hwsup(struct clockdomain *clkdm)
 146 {
 147         if (cpu_is_omap24xx())
 148                 omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 149                                                clkdm->clktrctrl_mask);
 150         else if (cpu_is_am33xx())
 151                 am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs,
 152                                                clkdm->clktrctrl_mask);
 153         else if (cpu_is_omap34xx())
 154                 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 155                                                clkdm->clktrctrl_mask);
 156 }
 157
 158 static void _disable_hwsup(struct clockdomain *clkdm)
 159 {
 160         if (cpu_is_omap24xx())
 161                 omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 162                                                 clkdm->clktrctrl_mask);
 163         else if (cpu_is_am33xx())
 164                 am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs,
 165                                                clkdm->clktrctrl_mask);
 166         else if (cpu_is_omap34xx())
 167                 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 168                                                 clkdm->clktrctrl_mask);
 169 }
 170
 171
 172 static int omap2_clkdm_clk_enable(struct clockdomain *clkdm)
 173 {
 174         bool hwsup = false;
 175
 176         if (!clkdm->clktrctrl_mask)
 177                 return 0;
 178
 179         hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 180                                 clkdm->clktrctrl_mask);
 181
 182         if (hwsup) {
 183                 /* Disable HW transitions when we are changing deps */
 184                 _disable_hwsup(clkdm);
 185                 _clkdm_add_autodeps(clkdm);
 186                 _enable_hwsup(clkdm);
 187         } else {
 188                 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
 189                         omap2_clkdm_wakeup(clkdm);
 190         }
 191
 192         return 0;
 193 }
 194
 195 static int omap2_clkdm_clk_disable(struct clockdomain *clkdm)
 196 {
 197         bool hwsup = false;
 198
 199         if (!clkdm->clktrctrl_mask)
 200                 return 0;
 201
 202         hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 203                                 clkdm->clktrctrl_mask);
 204
 205         if (hwsup) {
 206                 /* Disable HW transitions when we are changing deps */
 207                 _disable_hwsup(clkdm);
 208                 _clkdm_del_autodeps(clkdm);
 209                 _enable_hwsup(clkdm);
 210         } else {
 211                 if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
 212                         omap2_clkdm_sleep(clkdm);
 213         }
 214
 215         return 0;
 216 }
 217
 218 static int omap3_clkdm_sleep(struct clockdomain *clkdm)
 219 {
 220         if (cpu_is_am33xx())
 221                 am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs,
 222                                 clkdm->clktrctrl_mask);
 223         else
 224                 omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
 225                                 clkdm->clktrctrl_mask);
 226         return 0;
 227 }
 228
 229 static int omap3_clkdm_wakeup(struct clockdomain *clkdm)
 230 {
 231         if (cpu_is_am33xx())
 232                 am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs,
 233                                 clkdm->clktrctrl_mask);
 234         else
 235                 omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
 236                                 clkdm->clktrctrl_mask);
 237         return 0;
 238 }
 239
 240 static void omap3_clkdm_allow_idle(struct clockdomain *clkdm)
 241 {
 242         if (atomic_read(&clkdm->usecount) > 0)
 243                 _clkdm_add_autodeps(clkdm);
 244
 245         omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 246                                 clkdm->clktrctrl_mask);
 247 }
 248
 249 static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
 250 {
 251         omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 252                                 clkdm->clktrctrl_mask);
 253
 254         if (atomic_read(&clkdm->usecount) > 0)
 255                 _clkdm_del_autodeps(clkdm);
 256 }
 257
 258 struct clkdm_ops omap2_clkdm_operations = {
 259         .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
 260         .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
 261         .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
 262         .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
 263         .clkdm_sleep            = omap2_clkdm_sleep,
 264         .clkdm_wakeup           = omap2_clkdm_wakeup,
 265         .clkdm_allow_idle       = omap2_clkdm_allow_idle,
 266         .clkdm_deny_idle        = omap2_clkdm_deny_idle,
 267         .clkdm_clk_enable       = omap2_clkdm_clk_enable,
 268         .clkdm_clk_disable      = omap2_clkdm_clk_disable,
 269 };
 270
 271 struct clkdm_ops omap3_clkdm_operations = {
 272         .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
 273         .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
 274         .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
 275         .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
 276         .clkdm_add_sleepdep     = omap3_clkdm_add_sleepdep,
 277         .clkdm_del_sleepdep     = omap3_clkdm_del_sleepdep,
 278         .clkdm_read_sleepdep    = omap3_clkdm_read_sleepdep,
 279         .clkdm_clear_all_sleepdeps      = omap3_clkdm_clear_all_sleepdeps,
 280         .clkdm_sleep            = omap3_clkdm_sleep,
 281         .clkdm_wakeup           = omap3_clkdm_wakeup,
 282         .clkdm_allow_idle       = omap3_clkdm_allow_idle,
 283         .clkdm_deny_idle        = omap3_clkdm_deny_idle,
 284         .clkdm_clk_enable       = omap2_clkdm_clk_enable,
 285         .clkdm_clk_disable      = omap2_clkdm_clk_disable,
 286 };