bcb66309aceac6960c1d202c76508f9f38bad0f7
1 /*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11 #include <linux/gpio.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/clk.h>
17 #include <linux/err.h>
18 #include <linux/slab.h>
19 #include <linux/of.h>
20 #include <linux/davinci_emac.h>
21 #include <linux/cpsw.h>
22 #include <linux/etherdevice.h>
23 #include <linux/dma-mapping.h>
25 #include <mach/hardware.h>
26 #include <mach/irqs.h>
27 #include <asm/mach-types.h>
28 #include <asm/mach/map.h>
29 #include <asm/pmu.h>
31 #include <plat/tc.h>
32 #include <plat/board.h>
33 #include <plat/mcbsp.h>
34 #include <plat/mmc.h>
35 #include <plat/dma.h>
36 #include <plat/omap_hwmod.h>
37 #include <plat/omap_device.h>
38 #include <plat/omap4-keypad.h>
40 #include "mux.h"
41 #include "control.h"
42 #include "devices.h"
44 #define L3_MODULES_MAX_LEN 12
45 #define L3_MODULES 3
47 void am33xx_cpsw_init(void);
49 static int __init omap3_l3_init(void)
50 {
51 int l;
52 struct omap_hwmod *oh;
53 struct platform_device *pdev;
54 char oh_name[L3_MODULES_MAX_LEN];
56 /*
57 * To avoid code running on other OMAPs in
58 * multi-omap builds
59 */
60 if (!(cpu_is_omap34xx()))
61 return -ENODEV;
63 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
65 oh = omap_hwmod_lookup(oh_name);
67 if (!oh)
68 pr_err("could not look up %s\n", oh_name);
70 pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
71 NULL, 0, 0);
73 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
75 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
76 }
77 postcore_initcall(omap3_l3_init);
79 static int __init omap4_l3_init(void)
80 {
81 int l, i;
82 struct omap_hwmod *oh[3];
83 struct platform_device *pdev;
84 char oh_name[L3_MODULES_MAX_LEN];
86 /* If dtb is there, the devices will be created dynamically */
87 if (of_have_populated_dt())
88 return -ENODEV;
90 /*
91 * To avoid code running on other OMAPs in
92 * multi-omap builds
93 */
94 if (!(cpu_is_omap44xx()))
95 return -ENODEV;
97 for (i = 0; i < L3_MODULES; i++) {
98 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
100 oh[i] = omap_hwmod_lookup(oh_name);
101 if (!(oh[i]))
102 pr_err("could not look up %s\n", oh_name);
103 }
105 pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
106 0, NULL, 0, 0);
108 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
110 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
111 }
112 postcore_initcall(omap4_l3_init);
114 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
116 static struct resource omap2cam_resources[] = {
117 {
118 .start = OMAP24XX_CAMERA_BASE,
119 .end = OMAP24XX_CAMERA_BASE + 0xfff,
120 .flags = IORESOURCE_MEM,
121 },
122 {
123 .start = INT_24XX_CAM_IRQ,
124 .flags = IORESOURCE_IRQ,
125 }
126 };
128 static struct platform_device omap2cam_device = {
129 .name = "omap24xxcam",
130 .id = -1,
131 .num_resources = ARRAY_SIZE(omap2cam_resources),
132 .resource = omap2cam_resources,
133 };
134 #endif
136 static struct resource omap3isp_resources[] = {
137 {
138 .start = OMAP3430_ISP_BASE,
139 .end = OMAP3430_ISP_END,
140 .flags = IORESOURCE_MEM,
141 },
142 {
143 .start = OMAP3430_ISP_CCP2_BASE,
144 .end = OMAP3430_ISP_CCP2_END,
145 .flags = IORESOURCE_MEM,
146 },
147 {
148 .start = OMAP3430_ISP_CCDC_BASE,
149 .end = OMAP3430_ISP_CCDC_END,
150 .flags = IORESOURCE_MEM,
151 },
152 {
153 .start = OMAP3430_ISP_HIST_BASE,
154 .end = OMAP3430_ISP_HIST_END,
155 .flags = IORESOURCE_MEM,
156 },
157 {
158 .start = OMAP3430_ISP_H3A_BASE,
159 .end = OMAP3430_ISP_H3A_END,
160 .flags = IORESOURCE_MEM,
161 },
162 {
163 .start = OMAP3430_ISP_PREV_BASE,
164 .end = OMAP3430_ISP_PREV_END,
165 .flags = IORESOURCE_MEM,
166 },
167 {
168 .start = OMAP3430_ISP_RESZ_BASE,
169 .end = OMAP3430_ISP_RESZ_END,
170 .flags = IORESOURCE_MEM,
171 },
172 {
173 .start = OMAP3430_ISP_SBL_BASE,
174 .end = OMAP3430_ISP_SBL_END,
175 .flags = IORESOURCE_MEM,
176 },
177 {
178 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
179 .end = OMAP3430_ISP_CSI2A_REGS1_END,
180 .flags = IORESOURCE_MEM,
181 },
182 {
183 .start = OMAP3430_ISP_CSIPHY2_BASE,
184 .end = OMAP3430_ISP_CSIPHY2_END,
185 .flags = IORESOURCE_MEM,
186 },
187 {
188 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
189 .end = OMAP3630_ISP_CSI2A_REGS2_END,
190 .flags = IORESOURCE_MEM,
191 },
192 {
193 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
194 .end = OMAP3630_ISP_CSI2C_REGS1_END,
195 .flags = IORESOURCE_MEM,
196 },
197 {
198 .start = OMAP3630_ISP_CSIPHY1_BASE,
199 .end = OMAP3630_ISP_CSIPHY1_END,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
204 .end = OMAP3630_ISP_CSI2C_REGS2_END,
205 .flags = IORESOURCE_MEM,
206 },
207 {
208 .start = INT_34XX_CAM_IRQ,
209 .flags = IORESOURCE_IRQ,
210 }
211 };
213 static struct platform_device omap3isp_device = {
214 .name = "omap3isp",
215 .id = -1,
216 .num_resources = ARRAY_SIZE(omap3isp_resources),
217 .resource = omap3isp_resources,
218 };
220 int omap3_init_camera(struct isp_platform_data *pdata)
221 {
222 omap3isp_device.dev.platform_data = pdata;
223 return platform_device_register(&omap3isp_device);
224 }
226 static inline void omap_init_camera(void)
227 {
228 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
229 if (cpu_is_omap24xx())
230 platform_device_register(&omap2cam_device);
231 #endif
232 }
234 int __init omap4_keyboard_init(struct omap4_keypad_platform_data
235 *sdp4430_keypad_data, struct omap_board_data *bdata)
236 {
237 struct platform_device *pdev;
238 struct omap_hwmod *oh;
239 struct omap4_keypad_platform_data *keypad_data;
240 unsigned int id = -1;
241 char *oh_name = "kbd";
242 char *name = "omap4-keypad";
244 oh = omap_hwmod_lookup(oh_name);
245 if (!oh) {
246 pr_err("Could not look up %s\n", oh_name);
247 return -ENODEV;
248 }
250 keypad_data = sdp4430_keypad_data;
252 pdev = omap_device_build(name, id, oh, keypad_data,
253 sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
255 if (IS_ERR(pdev)) {
256 WARN(1, "Can't build omap_device for %s:%s.\n",
257 name, oh->name);
258 return PTR_ERR(pdev);
259 }
260 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
262 return 0;
263 }
265 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
266 static inline void omap_init_mbox(void)
267 {
268 struct omap_hwmod *oh;
269 struct platform_device *pdev;
271 oh = omap_hwmod_lookup("mailbox");
272 if (!oh) {
273 pr_err("%s: unable to find hwmod\n", __func__);
274 return;
275 }
277 pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
278 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
279 __func__, PTR_ERR(pdev));
280 }
281 #else
282 static inline void omap_init_mbox(void) { }
283 #endif /* CONFIG_OMAP_MBOX_FWK */
285 static inline void omap_init_sti(void) {}
287 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
289 static struct platform_device omap_pcm = {
290 .name = "omap-pcm-audio",
291 .id = -1,
292 };
294 /*
295 * OMAP2420 has 2 McBSP ports
296 * OMAP2430 has 5 McBSP ports
297 * OMAP3 has 5 McBSP ports
298 * OMAP4 has 4 McBSP ports
299 */
300 OMAP_MCBSP_PLATFORM_DEVICE(1);
301 OMAP_MCBSP_PLATFORM_DEVICE(2);
302 OMAP_MCBSP_PLATFORM_DEVICE(3);
303 OMAP_MCBSP_PLATFORM_DEVICE(4);
304 OMAP_MCBSP_PLATFORM_DEVICE(5);
306 static void omap_init_audio(void)
307 {
308 platform_device_register(&omap_mcbsp1);
309 platform_device_register(&omap_mcbsp2);
310 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
311 platform_device_register(&omap_mcbsp3);
312 platform_device_register(&omap_mcbsp4);
313 }
314 if (cpu_is_omap243x() || cpu_is_omap34xx())
315 platform_device_register(&omap_mcbsp5);
317 platform_device_register(&omap_pcm);
318 }
320 #else
321 static inline void omap_init_audio(void) {}
322 #endif
324 #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
325 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
327 static void omap_init_mcpdm(void)
328 {
329 struct omap_hwmod *oh;
330 struct platform_device *pdev;
332 oh = omap_hwmod_lookup("mcpdm");
333 if (!oh) {
334 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
335 return;
336 }
338 pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
339 WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
340 }
341 #else
342 static inline void omap_init_mcpdm(void) {}
343 #endif
345 #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
346 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
348 static void omap_init_dmic(void)
349 {
350 struct omap_hwmod *oh;
351 struct platform_device *pdev;
353 oh = omap_hwmod_lookup("dmic");
354 if (!oh) {
355 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
356 return;
357 }
359 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
360 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
361 }
362 #else
363 static inline void omap_init_dmic(void) {}
364 #endif
366 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
368 #include <plat/mcspi.h>
370 static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
371 {
372 struct platform_device *pdev;
373 char *name = "omap2_mcspi";
374 struct omap2_mcspi_platform_config *pdata;
375 static int spi_num;
376 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
378 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
379 if (!pdata) {
380 pr_err("Memory allocation for McSPI device failed\n");
381 return -ENOMEM;
382 }
384 pdata->num_cs = mcspi_attrib->num_chipselect;
385 switch (oh->class->rev) {
386 case OMAP2_MCSPI_REV:
387 case OMAP3_MCSPI_REV:
388 pdata->regs_offset = 0;
389 break;
390 case OMAP4_MCSPI_REV:
391 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
392 break;
393 default:
394 pr_err("Invalid McSPI Revision value\n");
395 return -EINVAL;
396 }
398 spi_num++;
399 pdev = omap_device_build(name, spi_num, oh, pdata,
400 sizeof(*pdata), NULL, 0, 0);
401 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
402 name, oh->name);
403 kfree(pdata);
404 return 0;
405 }
407 static void omap_init_mcspi(void)
408 {
409 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
410 }
412 #else
413 static inline void omap_init_mcspi(void) {}
414 #endif
416 static struct resource omap2_pmu_resource = {
417 .start = 3,
418 .end = 3,
419 .flags = IORESOURCE_IRQ,
420 };
422 static struct resource omap3_pmu_resource = {
423 .start = INT_34XX_BENCH_MPU_EMUL,
424 .end = INT_34XX_BENCH_MPU_EMUL,
425 .flags = IORESOURCE_IRQ,
426 };
428 static struct platform_device omap_pmu_device = {
429 .name = "arm-pmu",
430 .id = ARM_PMU_DEVICE_CPU,
431 .num_resources = 1,
432 };
434 static void omap_init_pmu(void)
435 {
436 if (cpu_is_omap24xx())
437 omap_pmu_device.resource = &omap2_pmu_resource;
438 else if (cpu_is_omap34xx())
439 omap_pmu_device.resource = &omap3_pmu_resource;
440 else
441 return;
443 platform_device_register(&omap_pmu_device);
444 }
447 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
449 #ifdef CONFIG_ARCH_OMAP2
450 static struct resource omap2_sham_resources[] = {
451 {
452 .start = OMAP24XX_SEC_SHA1MD5_BASE,
453 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
454 .flags = IORESOURCE_MEM,
455 },
456 {
457 .start = INT_24XX_SHA1MD5,
458 .flags = IORESOURCE_IRQ,
459 }
460 };
461 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
462 #else
463 #define omap2_sham_resources NULL
464 #define omap2_sham_resources_sz 0
465 #endif
467 #ifdef CONFIG_ARCH_OMAP3
468 static struct resource omap3_sham_resources[] = {
469 {
470 .start = OMAP34XX_SEC_SHA1MD5_BASE,
471 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
472 .flags = IORESOURCE_MEM,
473 },
474 {
475 .start = INT_34XX_SHA1MD52_IRQ,
476 .flags = IORESOURCE_IRQ,
477 },
478 {
479 .start = OMAP34XX_DMA_SHA1MD5_RX,
480 .flags = IORESOURCE_DMA,
481 }
482 };
483 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
484 #else
485 #define omap3_sham_resources NULL
486 #define omap3_sham_resources_sz 0
487 #endif
489 static struct platform_device sham_device = {
490 .name = "omap-sham",
491 .id = -1,
492 };
494 static void omap_init_sham(void)
495 {
496 if (cpu_is_omap24xx()) {
497 sham_device.resource = omap2_sham_resources;
498 sham_device.num_resources = omap2_sham_resources_sz;
499 } else if (cpu_is_omap34xx()) {
500 sham_device.resource = omap3_sham_resources;
501 sham_device.num_resources = omap3_sham_resources_sz;
502 } else {
503 pr_err("%s: platform not supported\n", __func__);
504 return;
505 }
506 platform_device_register(&sham_device);
507 }
508 #else
509 static inline void omap_init_sham(void) { }
510 #endif
512 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
514 #ifdef CONFIG_ARCH_OMAP2
515 static struct resource omap2_aes_resources[] = {
516 {
517 .start = OMAP24XX_SEC_AES_BASE,
518 .end = OMAP24XX_SEC_AES_BASE + 0x4C,
519 .flags = IORESOURCE_MEM,
520 },
521 {
522 .start = OMAP24XX_DMA_AES_TX,
523 .flags = IORESOURCE_DMA,
524 },
525 {
526 .start = OMAP24XX_DMA_AES_RX,
527 .flags = IORESOURCE_DMA,
528 }
529 };
530 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
531 #else
532 #define omap2_aes_resources NULL
533 #define omap2_aes_resources_sz 0
534 #endif
536 #ifdef CONFIG_ARCH_OMAP3
537 static struct resource omap3_aes_resources[] = {
538 {
539 .start = OMAP34XX_SEC_AES_BASE,
540 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
541 .flags = IORESOURCE_MEM,
542 },
543 {
544 .start = OMAP34XX_DMA_AES2_TX,
545 .flags = IORESOURCE_DMA,
546 },
547 {
548 .start = OMAP34XX_DMA_AES2_RX,
549 .flags = IORESOURCE_DMA,
550 }
551 };
552 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
553 #else
554 #define omap3_aes_resources NULL
555 #define omap3_aes_resources_sz 0
556 #endif
558 static struct platform_device aes_device = {
559 .name = "omap-aes",
560 .id = -1,
561 };
563 static void omap_init_aes(void)
564 {
565 if (cpu_is_omap24xx()) {
566 aes_device.resource = omap2_aes_resources;
567 aes_device.num_resources = omap2_aes_resources_sz;
568 } else if (cpu_is_omap34xx()) {
569 aes_device.resource = omap3_aes_resources;
570 aes_device.num_resources = omap3_aes_resources_sz;
571 } else {
572 pr_err("%s: platform not supported\n", __func__);
573 return;
574 }
575 platform_device_register(&aes_device);
576 }
578 #else
579 static inline void omap_init_aes(void) { }
580 #endif
582 /*-------------------------------------------------------------------------*/
584 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
586 static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
587 *mmc_controller)
588 {
589 if ((mmc_controller->slots[0].switch_pin > 0) && \
590 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
591 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
592 OMAP_PIN_INPUT_PULLUP);
593 if ((mmc_controller->slots[0].gpio_wp > 0) && \
594 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
595 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
596 OMAP_PIN_INPUT_PULLUP);
598 omap_mux_init_signal("sdmmc_cmd", 0);
599 omap_mux_init_signal("sdmmc_clki", 0);
600 omap_mux_init_signal("sdmmc_clko", 0);
601 omap_mux_init_signal("sdmmc_dat0", 0);
602 omap_mux_init_signal("sdmmc_dat_dir0", 0);
603 omap_mux_init_signal("sdmmc_cmd_dir", 0);
604 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
605 omap_mux_init_signal("sdmmc_dat1", 0);
606 omap_mux_init_signal("sdmmc_dat2", 0);
607 omap_mux_init_signal("sdmmc_dat3", 0);
608 omap_mux_init_signal("sdmmc_dat_dir1", 0);
609 omap_mux_init_signal("sdmmc_dat_dir2", 0);
610 omap_mux_init_signal("sdmmc_dat_dir3", 0);
611 }
613 /*
614 * Use internal loop-back in MMC/SDIO Module Input Clock
615 * selection
616 */
617 if (mmc_controller->slots[0].internal_clock) {
618 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
619 v |= (1 << 24);
620 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
621 }
622 }
624 void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
625 {
626 char *name = "mmci-omap";
628 if (!mmc_data[0]) {
629 pr_err("%s fails: Incomplete platform data\n", __func__);
630 return;
631 }
633 omap242x_mmc_mux(mmc_data[0]);
634 omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
635 INT_24XX_MMC_IRQ, mmc_data[0]);
636 }
638 #endif
640 /*-------------------------------------------------------------------------*/
642 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
643 #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
644 #define OMAP_HDQ_BASE 0x480B2000
645 #endif
646 static struct resource omap_hdq_resources[] = {
647 {
648 .start = OMAP_HDQ_BASE,
649 .end = OMAP_HDQ_BASE + 0x1C,
650 .flags = IORESOURCE_MEM,
651 },
652 {
653 .start = INT_24XX_HDQ_IRQ,
654 .flags = IORESOURCE_IRQ,
655 },
656 };
657 static struct platform_device omap_hdq_dev = {
658 .name = "omap_hdq",
659 .id = 0,
660 .dev = {
661 .platform_data = NULL,
662 },
663 .num_resources = ARRAY_SIZE(omap_hdq_resources),
664 .resource = omap_hdq_resources,
665 };
666 static inline void omap_hdq_init(void)
667 {
668 (void) platform_device_register(&omap_hdq_dev);
669 }
670 #else
671 static inline void omap_hdq_init(void) {}
672 #endif
674 /*---------------------------------------------------------------------------*/
676 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
677 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
678 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
679 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
680 };
681 #else
682 static struct resource omap_vout_resource[2] = {
683 };
684 #endif
686 static struct platform_device omap_vout_device = {
687 .name = "omap_vout",
688 .num_resources = ARRAY_SIZE(omap_vout_resource),
689 .resource = &omap_vout_resource[0],
690 .id = -1,
691 };
692 static void omap_init_vout(void)
693 {
694 if (platform_device_register(&omap_vout_device) < 0)
695 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
696 }
697 #else
698 static inline void omap_init_vout(void) {}
699 #endif
701 /*-------------------------------------------------------------------------*/
703 static int __init omap2_init_devices(void)
704 {
705 /*
706 * please keep these calls, and their implementations above,
707 * in alphabetical order so they're easier to sort through.
708 */
709 omap_init_audio();
710 omap_init_mcpdm();
711 omap_init_dmic();
712 omap_init_camera();
713 omap_init_mbox();
714 omap_init_mcspi();
715 omap_init_pmu();
716 omap_hdq_init();
717 omap_init_sti();
718 omap_init_sham();
719 omap_init_aes();
720 omap_init_vout();
721 am33xx_cpsw_init();
723 return 0;
724 }
725 arch_initcall(omap2_init_devices);
727 #define AM33XX_CPSW_BASE (0x4A100000)
728 #define AM33XX_CPSW_MDIO_BASE (0x4A101000)
729 #define AM33XX_CPSW_SS_BASE (0x4A101200)
730 #define AM33XX_EMAC_MDIO_FREQ (1000000)
732 static u64 am33xx_cpsw_dmamask = DMA_BIT_MASK(32);
733 /* TODO : Verify the offsets */
734 static struct cpsw_slave_data am33xx_cpsw_slaves[] = {
735 {
736 .slave_reg_ofs = 0x208,
737 .sliver_reg_ofs = 0xd80,
738 .phy_id = "0:00",
739 },
740 {
741 .slave_reg_ofs = 0x308,
742 .sliver_reg_ofs = 0xdc0,
743 .phy_id = "0:01",
744 },
745 };
747 static struct cpsw_platform_data am33xx_cpsw_pdata = {
748 .ss_reg_ofs = 0x1200,
749 .channels = 8,
750 .cpdma_reg_ofs = 0x800,
751 .slaves = 2,
752 .slave_data = am33xx_cpsw_slaves,
753 .ale_reg_ofs = 0xd00,
754 .ale_entries = 1024,
755 .host_port_reg_ofs = 0x108,
756 .hw_stats_reg_ofs = 0x900,
757 .bd_ram_ofs = 0x2000,
758 .bd_ram_size = SZ_8K,
759 .rx_descs = 64,
760 .mac_control = BIT(5), /* MIIEN */
761 .gigabit_en = 1,
762 .host_port_num = 0,
763 .no_bd_ram = false,
764 .version = CPSW_VERSION_2,
765 };
767 static struct mdio_platform_data am33xx_cpsw_mdiopdata = {
768 .bus_freq = AM33XX_EMAC_MDIO_FREQ,
769 };
771 static struct resource am33xx_cpsw_mdioresources[] = {
772 {
773 .start = AM33XX_CPSW_MDIO_BASE,
774 .end = AM33XX_CPSW_MDIO_BASE + SZ_256 - 1,
775 .flags = IORESOURCE_MEM,
776 },
777 };
779 static struct platform_device am33xx_cpsw_mdiodevice = {
780 .name = "davinci_mdio",
781 .id = 0,
782 .num_resources = ARRAY_SIZE(am33xx_cpsw_mdioresources),
783 .resource = am33xx_cpsw_mdioresources,
784 .dev.platform_data = &am33xx_cpsw_mdiopdata,
785 };
787 static struct resource am33xx_cpsw_resources[] = {
788 {
789 .start = AM33XX_CPSW_BASE,
790 .end = AM33XX_CPSW_BASE + SZ_2K - 1,
791 .flags = IORESOURCE_MEM,
792 },
793 {
794 .start = AM33XX_CPSW_SS_BASE,
795 .end = AM33XX_CPSW_SS_BASE + SZ_256 - 1,
796 .flags = IORESOURCE_MEM,
797 },
798 {
799 .start = AM33XX_IRQ_CPSW_C0_RX,
800 .end = AM33XX_IRQ_CPSW_C0_RX,
801 .flags = IORESOURCE_IRQ,
802 },
803 {
804 .start = AM33XX_IRQ_CPSW_RX,
805 .end = AM33XX_IRQ_CPSW_RX,
806 .flags = IORESOURCE_IRQ,
807 },
808 {
809 .start = AM33XX_IRQ_CPSW_TX,
810 .end = AM33XX_IRQ_CPSW_TX,
811 .flags = IORESOURCE_IRQ,
812 },
813 {
814 .start = AM33XX_IRQ_CPSW_C0,
815 .end = AM33XX_IRQ_CPSW_C0,
816 .flags = IORESOURCE_IRQ,
817 },
818 };
820 static struct platform_device am33xx_cpsw_device = {
821 .name = "cpsw",
822 .id = 0,
823 .num_resources = ARRAY_SIZE(am33xx_cpsw_resources),
824 .resource = am33xx_cpsw_resources,
825 .dev = {
826 .platform_data = &am33xx_cpsw_pdata,
827 .dma_mask = &am33xx_cpsw_dmamask,
828 .coherent_dma_mask = DMA_BIT_MASK(32),
829 },
830 };
832 static unsigned char am33xx_macid0[ETH_ALEN];
833 static unsigned char am33xx_macid1[ETH_ALEN];
834 static unsigned int am33xx_evmid;
836 /*
837 * am33xx_evmid_fillup - set up board evmid
838 * @evmid - evm id which needs to be configured
839 *
840 * This function is called to configure board evm id.
841 * IA Motor Control EVM needs special setting of MAC PHY Id.
842 * This function is called when IA Motor Control EVM is detected
843 * during boot-up.
844 */
845 void am33xx_evmid_fillup(unsigned int evmid)
846 {
847 am33xx_evmid = evmid;
848 return;
849 }
851 /*
852 * am33xx_cpsw_macidfillup - setup mac adrresses
853 * @eeprommacid0 - mac id 0 which needs to be configured
854 * @eeprommacid1 - mac id 1 which needs to be configured
855 *
856 * This function is called to configure mac addresses.
857 * Mac addresses are read from eeprom and this function is called
858 * to store those mac adresses in am33xx_macid0 and am33xx_macid1.
859 * In case, mac address read from eFuse are invalid, mac addresses
860 * stored in these variable are used.
861 */
862 void am33xx_cpsw_macidfillup(char *eeprommacid0, char *eeprommacid1)
863 {
864 u32 i;
866 /* Fillup these mac addresses with the mac adresses from eeprom */
867 for (i = 0; i < ETH_ALEN; i++) {
868 am33xx_macid0[i] = eeprommacid0[i];
869 am33xx_macid1[i] = eeprommacid1[i];
870 }
872 return;
873 }
875 void am33xx_cpsw_init(void)
876 {
877 u32 mac_lo, mac_hi;
878 u32 i;
880 mac_lo = omap_ctrl_readl(TI81XX_CONTROL_MAC_ID0_LO);
881 mac_hi = omap_ctrl_readl(TI81XX_CONTROL_MAC_ID0_HI);
882 am33xx_cpsw_slaves[0].mac_addr[0] = mac_hi & 0xFF;
883 am33xx_cpsw_slaves[0].mac_addr[1] = (mac_hi & 0xFF00) >> 8;
884 am33xx_cpsw_slaves[0].mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
885 am33xx_cpsw_slaves[0].mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
886 am33xx_cpsw_slaves[0].mac_addr[4] = mac_lo & 0xFF;
887 am33xx_cpsw_slaves[0].mac_addr[5] = (mac_lo & 0xFF00) >> 8;
889 /* Read MACID0 from eeprom if eFuse MACID is invalid */
890 if (!is_valid_ether_addr(am33xx_cpsw_slaves[0].mac_addr)) {
891 for (i = 0; i < ETH_ALEN; i++)
892 am33xx_cpsw_slaves[0].mac_addr[i] = am33xx_macid0[i];
893 }
895 mac_lo = omap_ctrl_readl(TI81XX_CONTROL_MAC_ID1_LO);
896 mac_hi = omap_ctrl_readl(TI81XX_CONTROL_MAC_ID1_HI);
897 am33xx_cpsw_slaves[1].mac_addr[0] = mac_hi & 0xFF;
898 am33xx_cpsw_slaves[1].mac_addr[1] = (mac_hi & 0xFF00) >> 8;
899 am33xx_cpsw_slaves[1].mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
900 am33xx_cpsw_slaves[1].mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
901 am33xx_cpsw_slaves[1].mac_addr[4] = mac_lo & 0xFF;
902 am33xx_cpsw_slaves[1].mac_addr[5] = (mac_lo & 0xFF00) >> 8;
904 /* Read MACID1 from eeprom if eFuse MACID is invalid */
905 if (!is_valid_ether_addr(am33xx_cpsw_slaves[1].mac_addr)) {
906 for (i = 0; i < ETH_ALEN; i++)
907 am33xx_cpsw_slaves[1].mac_addr[i] = am33xx_macid1[i];
908 }
910 platform_device_register(&am33xx_cpsw_mdiodevice);
911 platform_device_register(&am33xx_cpsw_device);
912 clk_add_alias(NULL, dev_name(&am33xx_cpsw_mdiodevice.dev),
913 NULL, &am33xx_cpsw_device.dev);
914 }
917 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
918 static int __init omap_init_wdt(void)
919 {
920 int id = -1;
921 struct platform_device *pdev;
922 struct omap_hwmod *oh;
923 char *oh_name = "wd_timer2";
924 char *dev_name = "omap_wdt";
926 if (!cpu_class_is_omap2())
927 return 0;
929 oh = omap_hwmod_lookup(oh_name);
930 if (!oh) {
931 pr_err("Could not look up wd_timer%d hwmod\n", id);
932 return -EINVAL;
933 }
935 pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
936 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
937 dev_name, oh->name);
938 return 0;
939 }
940 subsys_initcall(omap_init_wdt);
941 #endif