1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
141 #include "common.h"
142 #include <plat/cpu.h>
143 #include "clockdomain.h"
144 #include "powerdomain.h"
145 #include <plat/clock.h>
146 #include <plat/omap_hwmod.h>
147 #include <plat/prcm.h>
149 #include "cm2xxx_3xxx.h"
150 #include "cminst44xx.h"
151 #include "prm2xxx_3xxx.h"
152 #include "prm44xx.h"
153 #include "prm33xx.h"
154 #include "prminst44xx.h"
155 #include "mux.h"
157 /* Maximum microseconds to wait for OMAP module to softreset */
158 #define MAX_MODULE_SOFTRESET_WAIT 10000
160 /* Name of the OMAP hwmod for the MPU */
161 #define MPU_INITIATOR_NAME "mpu"
163 /* omap_hwmod_list contains all registered struct omap_hwmods */
164 static LIST_HEAD(omap_hwmod_list);
166 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
167 static struct omap_hwmod *mpu_oh;
170 /* Private functions */
172 /**
173 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
174 * @oh: struct omap_hwmod *
175 *
176 * Load the current value of the hwmod OCP_SYSCONFIG register into the
177 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
178 * OCP_SYSCONFIG register or 0 upon success.
179 */
180 static int _update_sysc_cache(struct omap_hwmod *oh)
181 {
182 if (!oh->class->sysc) {
183 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
184 return -EINVAL;
185 }
187 /* XXX ensure module interface clock is up */
189 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
191 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
192 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
194 return 0;
195 }
197 /**
198 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
199 * @v: OCP_SYSCONFIG value to write
200 * @oh: struct omap_hwmod *
201 *
202 * Write @v into the module class' OCP_SYSCONFIG register, if it has
203 * one. No return value.
204 */
205 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
206 {
207 if (!oh->class->sysc) {
208 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
209 return;
210 }
212 /* XXX ensure module interface clock is up */
214 /* Module might have lost context, always update cache and register */
215 oh->_sysc_cache = v;
216 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
217 }
219 /**
220 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
221 * @oh: struct omap_hwmod *
222 * @standbymode: MIDLEMODE field bits
223 * @v: pointer to register contents to modify
224 *
225 * Update the master standby mode bits in @v to be @standbymode for
226 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
227 * upon error or 0 upon success.
228 */
229 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
230 u32 *v)
231 {
232 u32 mstandby_mask;
233 u8 mstandby_shift;
235 if (!oh->class->sysc ||
236 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
237 return -EINVAL;
239 if (!oh->class->sysc->sysc_fields) {
240 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
241 return -EINVAL;
242 }
244 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
245 mstandby_mask = (0x3 << mstandby_shift);
247 *v &= ~mstandby_mask;
248 *v |= __ffs(standbymode) << mstandby_shift;
250 return 0;
251 }
253 /**
254 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
255 * @oh: struct omap_hwmod *
256 * @idlemode: SIDLEMODE field bits
257 * @v: pointer to register contents to modify
258 *
259 * Update the slave idle mode bits in @v to be @idlemode for the @oh
260 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
261 * or 0 upon success.
262 */
263 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
264 {
265 u32 sidle_mask;
266 u8 sidle_shift;
268 if (!oh->class->sysc ||
269 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
270 return -EINVAL;
272 if (!oh->class->sysc->sysc_fields) {
273 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
274 return -EINVAL;
275 }
277 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
278 sidle_mask = (0x3 << sidle_shift);
280 *v &= ~sidle_mask;
281 *v |= __ffs(idlemode) << sidle_shift;
283 return 0;
284 }
286 /**
287 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
288 * @oh: struct omap_hwmod *
289 * @clockact: CLOCKACTIVITY field bits
290 * @v: pointer to register contents to modify
291 *
292 * Update the clockactivity mode bits in @v to be @clockact for the
293 * @oh hwmod. Used for additional powersaving on some modules. Does
294 * not write to the hardware. Returns -EINVAL upon error or 0 upon
295 * success.
296 */
297 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
298 {
299 u32 clkact_mask;
300 u8 clkact_shift;
302 if (!oh->class->sysc ||
303 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
304 return -EINVAL;
306 if (!oh->class->sysc->sysc_fields) {
307 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
308 return -EINVAL;
309 }
311 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
312 clkact_mask = (0x3 << clkact_shift);
314 *v &= ~clkact_mask;
315 *v |= clockact << clkact_shift;
317 return 0;
318 }
320 /**
321 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
322 * @oh: struct omap_hwmod *
323 * @v: pointer to register contents to modify
324 *
325 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
326 * error or 0 upon success.
327 */
328 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
329 {
330 u32 softrst_mask;
332 if (!oh->class->sysc ||
333 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
334 return -EINVAL;
336 if (!oh->class->sysc->sysc_fields) {
337 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
338 return -EINVAL;
339 }
341 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
343 *v |= softrst_mask;
345 return 0;
346 }
348 /**
349 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
350 * @oh: struct omap_hwmod *
351 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
352 * @v: pointer to register contents to modify
353 *
354 * Update the module autoidle bit in @v to be @autoidle for the @oh
355 * hwmod. The autoidle bit controls whether the module can gate
356 * internal clocks automatically when it isn't doing anything; the
357 * exact function of this bit varies on a per-module basis. This
358 * function does not write to the hardware. Returns -EINVAL upon
359 * error or 0 upon success.
360 */
361 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
362 u32 *v)
363 {
364 u32 autoidle_mask;
365 u8 autoidle_shift;
367 if (!oh->class->sysc ||
368 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
369 return -EINVAL;
371 if (!oh->class->sysc->sysc_fields) {
372 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
373 return -EINVAL;
374 }
376 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
377 autoidle_mask = (0x1 << autoidle_shift);
379 *v &= ~autoidle_mask;
380 *v |= autoidle << autoidle_shift;
382 return 0;
383 }
385 /**
386 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
387 * @oh: struct omap_hwmod *
388 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
389 *
390 * Set or clear the I/O pad wakeup flag in the mux entries for the
391 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
392 * in memory. If the hwmod is currently idled, and the new idle
393 * values don't match the previous ones, this function will also
394 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
395 * currently idled, this function won't touch the hardware: the new
396 * mux settings are written to the SCM PADCTRL registers when the
397 * hwmod is idled. No return value.
398 */
399 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
400 {
401 struct omap_device_pad *pad;
402 bool change = false;
403 u16 prev_idle;
404 int j;
406 if (!oh->mux || !oh->mux->enabled)
407 return;
409 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
410 pad = oh->mux->pads_dynamic[j];
412 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
413 continue;
415 prev_idle = pad->idle;
417 if (set_wake)
418 pad->idle |= OMAP_WAKEUP_EN;
419 else
420 pad->idle &= ~OMAP_WAKEUP_EN;
422 if (prev_idle != pad->idle)
423 change = true;
424 }
426 if (change && oh->_state == _HWMOD_STATE_IDLE)
427 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
428 }
430 /**
431 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
432 * @oh: struct omap_hwmod *
433 *
434 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
435 * upon error or 0 upon success.
436 */
437 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
438 {
439 if (!oh->class->sysc ||
440 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
441 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
442 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
443 return -EINVAL;
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
447 return -EINVAL;
448 }
450 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
451 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
453 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
454 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
455 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
456 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
458 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
460 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
462 return 0;
463 }
465 /**
466 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
467 * @oh: struct omap_hwmod *
468 *
469 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
470 * upon error or 0 upon success.
471 */
472 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
473 {
474 if (!oh->class->sysc ||
475 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
476 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
477 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
478 return -EINVAL;
480 if (!oh->class->sysc->sysc_fields) {
481 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
482 return -EINVAL;
483 }
485 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
486 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
488 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
489 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
490 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
491 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
493 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
495 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
497 return 0;
498 }
500 /**
501 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
502 * @oh: struct omap_hwmod *
503 *
504 * Prevent the hardware module @oh from entering idle while the
505 * hardare module initiator @init_oh is active. Useful when a module
506 * will be accessed by a particular initiator (e.g., if a module will
507 * be accessed by the IVA, there should be a sleepdep between the IVA
508 * initiator and the module). Only applies to modules in smart-idle
509 * mode. If the clockdomain is marked as not needing autodeps, return
510 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
511 * passes along clkdm_add_sleepdep() value upon success.
512 */
513 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
514 {
515 if (!oh->_clk)
516 return -EINVAL;
518 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
519 return 0;
521 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
522 }
524 /**
525 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
526 * @oh: struct omap_hwmod *
527 *
528 * Allow the hardware module @oh to enter idle while the hardare
529 * module initiator @init_oh is active. Useful when a module will not
530 * be accessed by a particular initiator (e.g., if a module will not
531 * be accessed by the IVA, there should be no sleepdep between the IVA
532 * initiator and the module). Only applies to modules in smart-idle
533 * mode. If the clockdomain is marked as not needing autodeps, return
534 * 0 without doing anything. Returns -EINVAL upon error or passes
535 * along clkdm_del_sleepdep() value upon success.
536 */
537 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
538 {
539 if (!oh->_clk)
540 return -EINVAL;
542 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
543 return 0;
545 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
546 }
548 /**
549 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
550 * @oh: struct omap_hwmod *
551 *
552 * Called from _init_clocks(). Populates the @oh _clk (main
553 * functional clock pointer) if a main_clk is present. Returns 0 on
554 * success or -EINVAL on error.
555 */
556 static int _init_main_clk(struct omap_hwmod *oh)
557 {
558 int ret = 0;
560 if (!oh->main_clk)
561 return 0;
563 oh->_clk = omap_clk_get_by_name(oh->main_clk);
564 if (!oh->_clk) {
565 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
566 oh->name, oh->main_clk);
567 return -EINVAL;
568 }
570 if (!oh->_clk->clkdm)
571 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
572 oh->main_clk, oh->_clk->name);
574 return ret;
575 }
577 /**
578 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
579 * @oh: struct omap_hwmod *
580 *
581 * Called from _init_clocks(). Populates the @oh OCP slave interface
582 * clock pointers. Returns 0 on success or -EINVAL on error.
583 */
584 static int _init_interface_clks(struct omap_hwmod *oh)
585 {
586 struct clk *c;
587 int i;
588 int ret = 0;
590 if (oh->slaves_cnt == 0)
591 return 0;
593 for (i = 0; i < oh->slaves_cnt; i++) {
594 struct omap_hwmod_ocp_if *os = oh->slaves[i];
596 if (!os->clk)
597 continue;
599 c = omap_clk_get_by_name(os->clk);
600 if (!c) {
601 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
602 oh->name, os->clk);
603 ret = -EINVAL;
604 }
605 os->_clk = c;
606 }
608 return ret;
609 }
611 /**
612 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
613 * @oh: struct omap_hwmod *
614 *
615 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
616 * clock pointers. Returns 0 on success or -EINVAL on error.
617 */
618 static int _init_opt_clks(struct omap_hwmod *oh)
619 {
620 struct omap_hwmod_opt_clk *oc;
621 struct clk *c;
622 int i;
623 int ret = 0;
625 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
626 c = omap_clk_get_by_name(oc->clk);
627 if (!c) {
628 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
629 oh->name, oc->clk);
630 ret = -EINVAL;
631 }
632 oc->_clk = c;
633 }
635 return ret;
636 }
638 /**
639 * _enable_clocks - enable hwmod main clock and interface clocks
640 * @oh: struct omap_hwmod *
641 *
642 * Enables all clocks necessary for register reads and writes to succeed
643 * on the hwmod @oh. Returns 0.
644 */
645 static int _enable_clocks(struct omap_hwmod *oh)
646 {
647 int i;
649 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
651 if (oh->_clk)
652 clk_enable(oh->_clk);
654 if (oh->slaves_cnt > 0) {
655 for (i = 0; i < oh->slaves_cnt; i++) {
656 struct omap_hwmod_ocp_if *os = oh->slaves[i];
657 struct clk *c = os->_clk;
659 if (c && (os->flags & OCPIF_SWSUP_IDLE))
660 clk_enable(c);
661 }
662 }
664 /* The opt clocks are controlled by the device driver. */
666 return 0;
667 }
669 /**
670 * _disable_clocks - disable hwmod main clock and interface clocks
671 * @oh: struct omap_hwmod *
672 *
673 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
674 */
675 static int _disable_clocks(struct omap_hwmod *oh)
676 {
677 int i;
679 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
681 if (oh->_clk)
682 clk_disable(oh->_clk);
684 if (oh->slaves_cnt > 0) {
685 for (i = 0; i < oh->slaves_cnt; i++) {
686 struct omap_hwmod_ocp_if *os = oh->slaves[i];
687 struct clk *c = os->_clk;
689 if (c && (os->flags & OCPIF_SWSUP_IDLE))
690 clk_disable(c);
691 }
692 }
694 /* The opt clocks are controlled by the device driver. */
696 return 0;
697 }
699 static void _enable_optional_clocks(struct omap_hwmod *oh)
700 {
701 struct omap_hwmod_opt_clk *oc;
702 int i;
704 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
706 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
707 if (oc->_clk) {
708 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
709 oc->_clk->name);
710 clk_enable(oc->_clk);
711 }
712 }
714 static void _disable_optional_clocks(struct omap_hwmod *oh)
715 {
716 struct omap_hwmod_opt_clk *oc;
717 int i;
719 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
721 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
722 if (oc->_clk) {
723 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
724 oc->_clk->name);
725 clk_disable(oc->_clk);
726 }
727 }
729 /**
730 * _enable_module - enable CLKCTRL modulemode on OMAP4
731 * @oh: struct omap_hwmod *
732 *
733 * Enables the PRCM module mode related to the hwmod @oh.
734 * No return value.
735 */
736 static void _enable_module(struct omap_hwmod *oh)
737 {
738 /* The module mode does not exist prior OMAP4 & AM33xx */
739 if (!cpu_is_omap44xx() && !cpu_is_am33xx())
740 return;
742 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
743 return;
745 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
746 oh->name, oh->prcm.omap4.modulemode);
748 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
749 oh->clkdm->prcm_partition,
750 oh->clkdm->cm_inst,
751 oh->clkdm->clkdm_offs,
752 oh->prcm.omap4.clkctrl_offs);
753 }
755 /**
756 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
757 * @oh: struct omap_hwmod *
758 *
759 * Wait for a module @oh to enter slave idle. Returns 0 if the module
760 * does not have an IDLEST bit or if the module successfully enters
761 * slave idle; otherwise, pass along the return value of the
762 * appropriate *_cm*_wait_module_idle() function.
763 */
764 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
765 {
766 if (!cpu_is_omap44xx() && !cpu_is_am33xx())
767 return 0;
769 if (!oh)
770 return -EINVAL;
772 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
773 return 0;
775 if (oh->flags & HWMOD_NO_IDLEST)
776 return 0;
778 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
779 oh->clkdm->cm_inst,
780 oh->clkdm->clkdm_offs,
781 oh->prcm.omap4.clkctrl_offs);
782 }
784 /**
785 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
786 * @oh: struct omap_hwmod *
787 *
788 * Disable the PRCM module mode related to the hwmod @oh.
789 * Return EINVAL if the modulemode is not supported and 0 in case of success.
790 */
791 static int _omap4_disable_module(struct omap_hwmod *oh)
792 {
793 int v;
795 /* The module mode does not exist prior OMAP4 & AM33xx */
796 if (!cpu_is_omap44xx() && !cpu_is_am33xx())
797 return -EINVAL;
799 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
800 return -EINVAL;
802 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
804 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
805 oh->clkdm->cm_inst,
806 oh->clkdm->clkdm_offs,
807 oh->prcm.omap4.clkctrl_offs);
809 v = _omap4_wait_target_disable(oh);
810 if (v)
811 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
812 oh->name);
814 return 0;
815 }
817 /**
818 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
819 * @oh: struct omap_hwmod *oh
820 *
821 * Count and return the number of MPU IRQs associated with the hwmod
822 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
823 * NULL.
824 */
825 static int _count_mpu_irqs(struct omap_hwmod *oh)
826 {
827 struct omap_hwmod_irq_info *ohii;
828 int i = 0;
830 if (!oh || !oh->mpu_irqs)
831 return 0;
833 do {
834 ohii = &oh->mpu_irqs[i++];
835 } while (ohii->irq != -1);
837 return i-1;
838 }
840 /**
841 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
842 * @oh: struct omap_hwmod *oh
843 *
844 * Count and return the number of SDMA request lines associated with
845 * the hwmod @oh. Used to allocate struct resource data. Returns 0
846 * if @oh is NULL.
847 */
848 static int _count_sdma_reqs(struct omap_hwmod *oh)
849 {
850 struct omap_hwmod_dma_info *ohdi;
851 int i = 0;
853 if (!oh || !oh->sdma_reqs)
854 return 0;
856 do {
857 ohdi = &oh->sdma_reqs[i++];
858 } while (ohdi->dma_req != -1);
860 return i-1;
861 }
863 /**
864 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
865 * @oh: struct omap_hwmod *oh
866 *
867 * Count and return the number of address space ranges associated with
868 * the hwmod @oh. Used to allocate struct resource data. Returns 0
869 * if @oh is NULL.
870 */
871 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
872 {
873 struct omap_hwmod_addr_space *mem;
874 int i = 0;
876 if (!os || !os->addr)
877 return 0;
879 do {
880 mem = &os->addr[i++];
881 } while (mem->pa_start != mem->pa_end);
883 return i-1;
884 }
886 /**
887 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
888 * @oh: struct omap_hwmod *
889 *
890 * Returns the array index of the OCP slave port that the MPU
891 * addresses the device on, or -EINVAL upon error or not found.
892 */
893 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
894 {
895 int i;
896 int found = 0;
898 if (!oh || oh->slaves_cnt == 0)
899 return -EINVAL;
901 for (i = 0; i < oh->slaves_cnt; i++) {
902 struct omap_hwmod_ocp_if *os = oh->slaves[i];
904 if (os->user & OCP_USER_MPU) {
905 found = 1;
906 break;
907 }
908 }
910 if (found)
911 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
912 oh->name, i);
913 else
914 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
915 oh->name);
917 return (found) ? i : -EINVAL;
918 }
920 /**
921 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
922 * @oh: struct omap_hwmod *
923 *
924 * Return the virtual address of the base of the register target of
925 * device @oh, or NULL on error.
926 */
927 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
928 {
929 struct omap_hwmod_ocp_if *os;
930 struct omap_hwmod_addr_space *mem;
931 int i = 0, found = 0;
932 void __iomem *va_start;
934 if (!oh || oh->slaves_cnt == 0)
935 return NULL;
937 os = oh->slaves[index];
939 if (!os->addr)
940 return NULL;
942 do {
943 mem = &os->addr[i++];
944 if (mem->flags & ADDR_TYPE_RT)
945 found = 1;
946 } while (!found && mem->pa_start != mem->pa_end);
948 if (found) {
949 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
950 if (!va_start) {
951 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
952 return NULL;
953 }
954 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
955 oh->name, va_start);
956 } else {
957 pr_debug("omap_hwmod: %s: no MPU register target found\n",
958 oh->name);
959 }
961 return (found) ? va_start : NULL;
962 }
964 /**
965 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
966 * @oh: struct omap_hwmod *
967 *
968 * If module is marked as SWSUP_SIDLE, force the module out of slave
969 * idle; otherwise, configure it for smart-idle. If module is marked
970 * as SWSUP_MSUSPEND, force the module out of master standby;
971 * otherwise, configure it for smart-standby. No return value.
972 */
973 static void _enable_sysc(struct omap_hwmod *oh)
974 {
975 u8 idlemode, sf;
976 u32 v;
978 if (!oh->class->sysc)
979 return;
981 v = oh->_sysc_cache;
982 sf = oh->class->sysc->sysc_flags;
984 if (sf & SYSC_HAS_SIDLEMODE) {
985 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
986 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
987 _set_slave_idlemode(oh, idlemode, &v);
988 }
990 if (sf & SYSC_HAS_MIDLEMODE) {
991 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
992 idlemode = HWMOD_IDLEMODE_NO;
993 } else {
994 if (sf & SYSC_HAS_ENAWAKEUP)
995 _enable_wakeup(oh, &v);
996 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
997 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
998 else
999 idlemode = HWMOD_IDLEMODE_SMART;
1000 }
1001 _set_master_standbymode(oh, idlemode, &v);
1002 }
1004 /*
1005 * XXX The clock framework should handle this, by
1006 * calling into this code. But this must wait until the
1007 * clock structures are tagged with omap_hwmod entries
1008 */
1009 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1010 (sf & SYSC_HAS_CLOCKACTIVITY))
1011 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1013 /* If slave is in SMARTIDLE, also enable wakeup */
1014 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1015 _enable_wakeup(oh, &v);
1017 _write_sysconfig(v, oh);
1019 /*
1020 * Set the autoidle bit only after setting the smartidle bit
1021 * Setting this will not have any impact on the other modules.
1022 */
1023 if (sf & SYSC_HAS_AUTOIDLE) {
1024 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1025 0 : 1;
1026 _set_module_autoidle(oh, idlemode, &v);
1027 _write_sysconfig(v, oh);
1028 }
1029 }
1031 /**
1032 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1033 * @oh: struct omap_hwmod *
1034 *
1035 * If module is marked as SWSUP_SIDLE, force the module into slave
1036 * idle; otherwise, configure it for smart-idle. If module is marked
1037 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1038 * configure it for smart-standby. No return value.
1039 */
1040 static void _idle_sysc(struct omap_hwmod *oh)
1041 {
1042 u8 idlemode, sf;
1043 u32 v;
1045 if (!oh->class->sysc)
1046 return;
1048 v = oh->_sysc_cache;
1049 sf = oh->class->sysc->sysc_flags;
1051 if (sf & SYSC_HAS_SIDLEMODE) {
1052 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1053 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1054 _set_slave_idlemode(oh, idlemode, &v);
1055 }
1057 if (sf & SYSC_HAS_MIDLEMODE) {
1058 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1059 idlemode = HWMOD_IDLEMODE_FORCE;
1060 } else {
1061 if (sf & SYSC_HAS_ENAWAKEUP)
1062 _enable_wakeup(oh, &v);
1063 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1064 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1065 else
1066 idlemode = HWMOD_IDLEMODE_SMART;
1067 }
1068 _set_master_standbymode(oh, idlemode, &v);
1069 }
1071 /* If slave is in SMARTIDLE, also enable wakeup */
1072 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1073 _enable_wakeup(oh, &v);
1075 _write_sysconfig(v, oh);
1076 }
1078 /**
1079 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1080 * @oh: struct omap_hwmod *
1081 *
1082 * Force the module into slave idle and master suspend. No return
1083 * value.
1084 */
1085 static void _shutdown_sysc(struct omap_hwmod *oh)
1086 {
1087 u32 v;
1088 u8 sf;
1090 if (!oh->class->sysc)
1091 return;
1093 v = oh->_sysc_cache;
1094 sf = oh->class->sysc->sysc_flags;
1096 if (sf & SYSC_HAS_SIDLEMODE)
1097 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1099 if (sf & SYSC_HAS_MIDLEMODE)
1100 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1102 if (sf & SYSC_HAS_AUTOIDLE)
1103 _set_module_autoidle(oh, 1, &v);
1105 _write_sysconfig(v, oh);
1106 }
1108 /**
1109 * _lookup - find an omap_hwmod by name
1110 * @name: find an omap_hwmod by name
1111 *
1112 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1113 */
1114 static struct omap_hwmod *_lookup(const char *name)
1115 {
1116 struct omap_hwmod *oh, *temp_oh;
1118 oh = NULL;
1120 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1121 if (!strcmp(name, temp_oh->name)) {
1122 oh = temp_oh;
1123 break;
1124 }
1125 }
1127 return oh;
1128 }
1129 /**
1130 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1131 * @oh: struct omap_hwmod *
1132 *
1133 * Convert a clockdomain name stored in a struct omap_hwmod into a
1134 * clockdomain pointer, and save it into the struct omap_hwmod.
1135 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1136 */
1137 static int _init_clkdm(struct omap_hwmod *oh)
1138 {
1139 if (cpu_is_omap24xx() || (cpu_is_omap34xx() && !cpu_is_am33xx()))
1140 return 0;
1142 if (!oh->clkdm_name) {
1143 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1144 return -EINVAL;
1145 }
1147 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1148 if (!oh->clkdm) {
1149 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1150 oh->name, oh->clkdm_name);
1151 return -EINVAL;
1152 }
1154 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1155 oh->name, oh->clkdm_name);
1157 return 0;
1158 }
1160 /**
1161 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1162 * well the clockdomain.
1163 * @oh: struct omap_hwmod *
1164 * @data: not used; pass NULL
1165 *
1166 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1167 * Resolves all clock names embedded in the hwmod. Returns 0 on
1168 * success, or a negative error code on failure.
1169 */
1170 static int _init_clocks(struct omap_hwmod *oh, void *data)
1171 {
1172 int ret = 0;
1174 if (oh->_state != _HWMOD_STATE_REGISTERED)
1175 return 0;
1177 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1179 ret |= _init_main_clk(oh);
1180 ret |= _init_interface_clks(oh);
1181 ret |= _init_opt_clks(oh);
1182 ret |= _init_clkdm(oh);
1184 if (!ret)
1185 oh->_state = _HWMOD_STATE_CLKS_INITED;
1186 else
1187 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1189 return ret;
1190 }
1192 /**
1193 * _wait_target_ready - wait for a module to leave slave idle
1194 * @oh: struct omap_hwmod *
1195 *
1196 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1197 * does not have an IDLEST bit or if the module successfully leaves
1198 * slave idle; otherwise, pass along the return value of the
1199 * appropriate *_cm*_wait_module_ready() function.
1200 */
1201 static int _wait_target_ready(struct omap_hwmod *oh)
1202 {
1203 struct omap_hwmod_ocp_if *os;
1204 int ret;
1206 if (!oh)
1207 return -EINVAL;
1209 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1210 return 0;
1212 os = oh->slaves[oh->_mpu_port_index];
1214 if (oh->flags & HWMOD_NO_IDLEST)
1215 return 0;
1217 /* XXX check module SIDLEMODE */
1219 /* XXX check clock enable states */
1221 /*
1222 * In order to use omap4 cminst code for am33xx family of devices,
1223 * first check cpu_is_am33xx here.
1224 *
1225 * Note: cpu_is_omap34xx is true for am33xx device as well.
1226 */
1227 if (cpu_is_omap44xx() || cpu_is_am33xx()) {
1228 if (!oh->clkdm)
1229 return -EINVAL;
1231 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1232 oh->clkdm->cm_inst,
1233 oh->clkdm->clkdm_offs,
1234 oh->prcm.omap4.clkctrl_offs);
1235 } else if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1236 ret = omap2_cm_wait_module_ready(
1237 oh->prcm.omap2.module_offs,
1238 oh->prcm.omap2.idlest_reg_id,
1239 oh->prcm.omap2.idlest_idle_bit);
1240 } else {
1241 BUG();
1242 };
1244 return ret;
1245 }
1247 /**
1248 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1249 * @oh: struct omap_hwmod *
1250 * @name: name of the reset line in the context of this hwmod
1251 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1252 *
1253 * Return the bit position of the reset line that match the
1254 * input name. Return -ENOENT if not found.
1255 */
1256 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1257 struct omap_hwmod_rst_info *ohri)
1258 {
1259 int i;
1261 for (i = 0; i < oh->rst_lines_cnt; i++) {
1262 const char *rst_line = oh->rst_lines[i].name;
1263 if (!strcmp(rst_line, name)) {
1264 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1265 ohri->st_shift = oh->rst_lines[i].st_shift;
1266 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1267 oh->name, __func__, rst_line, ohri->rst_shift,
1268 ohri->st_shift);
1270 return 0;
1271 }
1272 }
1274 return -ENOENT;
1275 }
1277 /**
1278 * _assert_hardreset - assert the HW reset line of submodules
1279 * contained in the hwmod module.
1280 * @oh: struct omap_hwmod *
1281 * @name: name of the reset line to lookup and assert
1282 *
1283 * Some IP like dsp, ipu or iva contain processor that require
1284 * an HW reset line to be assert / deassert in order to enable fully
1285 * the IP.
1286 */
1287 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1288 {
1289 struct omap_hwmod_rst_info ohri;
1290 u8 ret;
1292 if (!oh)
1293 return -EINVAL;
1295 ret = _lookup_hardreset(oh, name, &ohri);
1296 if (IS_ERR_VALUE(ret))
1297 return ret;
1299 /*
1300 * In order to use omap4 prm code for am33xx family of devices,
1301 * first check cpu_is_am33xx here.
1302 *
1303 * Note: cpu_is_omap34xx is true for am33xx device as well.
1304 */
1305 if (cpu_is_omap44xx() || cpu_is_am33xx())
1306 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1307 oh->clkdm->pwrdm.ptr->prcm_partition,
1308 oh->clkdm->pwrdm.ptr->prcm_offs,
1309 oh->prcm.omap4.rstctrl_offs);
1310 else if (cpu_is_omap24xx() || cpu_is_omap34xx())
1311 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1312 ohri.rst_shift);
1313 else
1314 return -EINVAL;
1315 }
1317 /**
1318 * _deassert_hardreset - deassert the HW reset line of submodules contained
1319 * in the hwmod module.
1320 * @oh: struct omap_hwmod *
1321 * @name: name of the reset line to look up and deassert
1322 *
1323 * Some IP like dsp, ipu or iva contain processor that require
1324 * an HW reset line to be assert / deassert in order to enable fully
1325 * the IP.
1326 */
1327 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1328 {
1329 struct omap_hwmod_rst_info ohri;
1330 int ret;
1332 if (!oh)
1333 return -EINVAL;
1335 ret = _lookup_hardreset(oh, name, &ohri);
1336 if (IS_ERR_VALUE(ret))
1337 return ret;
1339 /*
1340 * In order to use omap4 prm code for am33xx family of devices,
1341 * first check cpu_is_am33xx here.
1342 *
1343 * Note: cpu_is_omap34xx is true for am33xx device as well.
1344 */
1345 if (cpu_is_omap44xx() || cpu_is_am33xx()) {
1346 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1347 ohri.st_shift,
1348 oh->clkdm->pwrdm.ptr->prcm_partition,
1349 oh->clkdm->pwrdm.ptr->prcm_offs,
1350 oh->prcm.omap4.rstctrl_offs,
1351 oh->prcm.omap4.rstst_offs);
1352 } else if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1353 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1354 ohri.rst_shift,
1355 ohri.st_shift);
1356 } else {
1357 return -EINVAL;
1358 }
1360 if (ret == -EBUSY)
1361 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1363 return ret;
1364 }
1366 /**
1367 * _read_hardreset - read the HW reset line state of submodules
1368 * contained in the hwmod module
1369 * @oh: struct omap_hwmod *
1370 * @name: name of the reset line to look up and read
1371 *
1372 * Return the state of the reset line.
1373 */
1374 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1375 {
1376 struct omap_hwmod_rst_info ohri;
1377 u8 ret;
1379 if (!oh)
1380 return -EINVAL;
1382 ret = _lookup_hardreset(oh, name, &ohri);
1383 if (IS_ERR_VALUE(ret))
1384 return ret;
1386 /*
1387 * In order to use omap4 prm code for am33xx family of devices,
1388 * first check cpu_is_am33xx here.
1389 *
1390 * Note: cpu_is_omap34xx is true for am33xx device as well.
1391 */
1392 if (cpu_is_omap44xx() || cpu_is_am33xx()) {
1393 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1394 oh->clkdm->pwrdm.ptr->prcm_partition,
1395 oh->clkdm->pwrdm.ptr->prcm_offs,
1396 oh->prcm.omap4.rstctrl_offs);
1397 } else if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1398 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1399 ohri.st_shift);
1400 } else {
1401 return -EINVAL;
1402 }
1403 }
1405 /**
1406 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1407 * @oh: struct omap_hwmod *
1408 *
1409 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1410 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1411 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1412 * the module did not reset in time, or 0 upon success.
1413 *
1414 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1415 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1416 * use the SYSCONFIG softreset bit to provide the status.
1417 *
1418 * Note that some IP like McBSP do have reset control but don't have
1419 * reset status.
1420 */
1421 static int _ocp_softreset(struct omap_hwmod *oh)
1422 {
1423 u32 v;
1424 int c = 0;
1425 int ret = 0;
1427 if (!oh->class->sysc ||
1428 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1429 return -EINVAL;
1431 /* clocks must be on for this operation */
1432 if (oh->_state != _HWMOD_STATE_ENABLED) {
1433 pr_warning("omap_hwmod: %s: reset can only be entered from "
1434 "enabled state\n", oh->name);
1435 return -EINVAL;
1436 }
1438 /* For some modules, all optionnal clocks need to be enabled as well */
1439 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1440 _enable_optional_clocks(oh);
1442 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1444 v = oh->_sysc_cache;
1445 ret = _set_softreset(oh, &v);
1446 if (ret)
1447 goto dis_opt_clks;
1448 _write_sysconfig(v, oh);
1450 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1451 omap_test_timeout((omap_hwmod_read(oh,
1452 oh->class->sysc->syss_offs)
1453 & SYSS_RESETDONE_MASK),
1454 MAX_MODULE_SOFTRESET_WAIT, c);
1455 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1456 omap_test_timeout(!(omap_hwmod_read(oh,
1457 oh->class->sysc->sysc_offs)
1458 & SYSC_TYPE2_SOFTRESET_MASK),
1459 MAX_MODULE_SOFTRESET_WAIT, c);
1461 if (c == MAX_MODULE_SOFTRESET_WAIT)
1462 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1463 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1464 else
1465 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1467 /*
1468 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1469 * _wait_target_ready() or _reset()
1470 */
1472 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1474 dis_opt_clks:
1475 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1476 _disable_optional_clocks(oh);
1478 return ret;
1479 }
1481 /**
1482 * _reset - reset an omap_hwmod
1483 * @oh: struct omap_hwmod *
1484 *
1485 * Resets an omap_hwmod @oh. The default software reset mechanism for
1486 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1487 * bit. However, some hwmods cannot be reset via this method: some
1488 * are not targets and therefore have no OCP header registers to
1489 * access; others (like the IVA) have idiosyncratic reset sequences.
1490 * So for these relatively rare cases, custom reset code can be
1491 * supplied in the struct omap_hwmod_class .reset function pointer.
1492 * Passes along the return value from either _reset() or the custom
1493 * reset function - these must return -EINVAL if the hwmod cannot be
1494 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1495 * the module did not reset in time, or 0 upon success.
1496 */
1497 static int _reset(struct omap_hwmod *oh)
1498 {
1499 int ret;
1501 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1503 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1505 return ret;
1506 }
1508 /**
1509 * _enable - enable an omap_hwmod
1510 * @oh: struct omap_hwmod *
1511 *
1512 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1513 * register target. Returns -EINVAL if the hwmod is in the wrong
1514 * state or passes along the return value of _wait_target_ready().
1515 */
1516 static int _enable(struct omap_hwmod *oh)
1517 {
1518 int r;
1519 int hwsup = 0;
1521 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1523 /*
1524 * hwmods with HWMOD_INIT_NO_IDLE flag set are left
1525 * in enabled state at init.
1526 * Now that someone is really trying to enable them,
1527 * just ensure that the hwmod mux is set.
1528 */
1529 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1530 /*
1531 * If the caller has mux data populated, do the mux'ing
1532 * which wouldn't have been done as part of the _enable()
1533 * done during setup.
1534 */
1535 if (oh->mux)
1536 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1538 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1539 return 0;
1540 }
1542 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1543 oh->_state != _HWMOD_STATE_IDLE &&
1544 oh->_state != _HWMOD_STATE_DISABLED) {
1545 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1546 "from initialized, idle, or disabled state\n", oh->name);
1547 return -EINVAL;
1548 }
1550 /* Mux pins for device runtime if populated */
1551 if (oh->mux && (!oh->mux->enabled ||
1552 ((oh->_state == _HWMOD_STATE_IDLE) &&
1553 oh->mux->pads_dynamic)))
1554 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1556 _add_initiator_dep(oh, mpu_oh);
1558 if (oh->clkdm) {
1559 /*
1560 * A clockdomain must be in SW_SUP before enabling
1561 * completely the module. The clockdomain can be set
1562 * in HW_AUTO only when the module become ready.
1563 */
1564 hwsup = clkdm_in_hwsup(oh->clkdm);
1565 r = clkdm_hwmod_enable(oh->clkdm, oh);
1566 if (r) {
1567 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1568 oh->name, oh->clkdm->name, r);
1569 return r;
1570 }
1571 }
1573 _enable_clocks(oh);
1574 _enable_module(oh);
1576 /*
1577 * If an IP contains only one HW reset line, then de-assert it in order
1578 * to allow the module state transition. Otherwise the PRCM will return
1579 * Intransition status, and the init will failed.
1580 *
1581 * TODO: Based on observation, on module enable sate, we can safely
1582 * assert the reset signal here (irrespective of idlemode state).
1583 */
1584 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1585 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1586 _deassert_hardreset(oh, oh->rst_lines[0].name);
1588 r = _wait_target_ready(oh);
1589 if (!r) {
1590 /*
1591 * Set the clockdomain to HW_AUTO only if the target is ready,
1592 * assuming that the previous state was HW_AUTO
1593 */
1594 if (oh->clkdm && hwsup)
1595 clkdm_allow_idle(oh->clkdm);
1597 oh->_state = _HWMOD_STATE_ENABLED;
1599 /* Access the sysconfig only if the target is ready */
1600 if (oh->class->sysc) {
1601 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1602 _update_sysc_cache(oh);
1603 _enable_sysc(oh);
1604 }
1605 } else {
1606 _disable_clocks(oh);
1607 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1608 oh->name, r);
1610 if (oh->clkdm)
1611 clkdm_hwmod_disable(oh->clkdm, oh);
1612 }
1614 return r;
1615 }
1617 /**
1618 * _idle - idle an omap_hwmod
1619 * @oh: struct omap_hwmod *
1620 *
1621 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1622 * no further work. Returns -EINVAL if the hwmod is in the wrong
1623 * state or returns 0.
1624 */
1625 static int _idle(struct omap_hwmod *oh)
1626 {
1627 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1629 if (oh->_state != _HWMOD_STATE_ENABLED) {
1630 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1631 "enabled state\n", oh->name);
1632 return -EINVAL;
1633 }
1635 /*
1636 * FIXME: Due to AM33XX CPSW IP integration bug, it is required
1637 * to assert ocp reset signal to the module before disabling it.
1638 */
1639 if (oh->flags & HWMOD_SWSUP_RESET_BEFORE_IDLE)
1640 _reset(oh);
1642 if (oh->class->sysc)
1643 _idle_sysc(oh);
1644 _del_initiator_dep(oh, mpu_oh);
1646 _omap4_disable_module(oh);
1648 /*
1649 * The module must be in idle mode before disabling any parents
1650 * clocks. Otherwise, the parent clock might be disabled before
1651 * the module transition is done, and thus will prevent the
1652 * transition to complete properly.
1653 */
1654 _disable_clocks(oh);
1655 if (oh->clkdm)
1656 clkdm_hwmod_disable(oh->clkdm, oh);
1658 /* Mux pins for device idle if populated */
1659 if (oh->mux && oh->mux->pads_dynamic)
1660 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1662 oh->_state = _HWMOD_STATE_IDLE;
1664 return 0;
1665 }
1667 /**
1668 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1669 * @oh: struct omap_hwmod *
1670 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1671 *
1672 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1673 * local copy. Intended to be used by drivers that require
1674 * direct manipulation of the AUTOIDLE bits.
1675 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1676 * along the return value from _set_module_autoidle().
1677 *
1678 * Any users of this function should be scrutinized carefully.
1679 */
1680 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1681 {
1682 u32 v;
1683 int retval = 0;
1684 unsigned long flags;
1686 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1687 return -EINVAL;
1689 spin_lock_irqsave(&oh->_lock, flags);
1691 v = oh->_sysc_cache;
1693 retval = _set_module_autoidle(oh, autoidle, &v);
1695 if (!retval)
1696 _write_sysconfig(v, oh);
1698 spin_unlock_irqrestore(&oh->_lock, flags);
1700 return retval;
1701 }
1703 /**
1704 * _shutdown - shutdown an omap_hwmod
1705 * @oh: struct omap_hwmod *
1706 *
1707 * Shut down an omap_hwmod @oh. This should be called when the driver
1708 * used for the hwmod is removed or unloaded or if the driver is not
1709 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1710 * state or returns 0.
1711 */
1712 static int _shutdown(struct omap_hwmod *oh)
1713 {
1714 int ret;
1715 u8 prev_state;
1717 if (oh->_state != _HWMOD_STATE_IDLE &&
1718 oh->_state != _HWMOD_STATE_ENABLED) {
1719 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1720 "from idle, or enabled state\n", oh->name);
1721 return -EINVAL;
1722 }
1724 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1726 if (oh->class->pre_shutdown) {
1727 prev_state = oh->_state;
1728 if (oh->_state == _HWMOD_STATE_IDLE)
1729 _enable(oh);
1730 ret = oh->class->pre_shutdown(oh);
1731 if (ret) {
1732 if (prev_state == _HWMOD_STATE_IDLE)
1733 _idle(oh);
1734 return ret;
1735 }
1736 }
1738 if (oh->class->sysc) {
1739 if (oh->_state == _HWMOD_STATE_IDLE)
1740 _enable(oh);
1741 _shutdown_sysc(oh);
1742 }
1744 /* clocks and deps are already disabled in idle */
1745 if (oh->_state == _HWMOD_STATE_ENABLED) {
1746 _del_initiator_dep(oh, mpu_oh);
1747 /* XXX what about the other system initiators here? dma, dsp */
1748 _omap4_disable_module(oh);
1749 _disable_clocks(oh);
1750 if (oh->clkdm)
1751 clkdm_hwmod_disable(oh->clkdm, oh);
1752 }
1753 /* XXX Should this code also force-disable the optional clocks? */
1755 /*
1756 * If an IP contains only one HW reset line, then assert it
1757 * after disabling the clocks and before shutting down the IP.
1758 */
1759 if (oh->rst_lines_cnt == 1)
1760 _assert_hardreset(oh, oh->rst_lines[0].name);
1762 /* Mux pins to safe mode or use populated off mode values */
1763 if (oh->mux)
1764 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1766 oh->_state = _HWMOD_STATE_DISABLED;
1768 return 0;
1769 }
1771 /**
1772 * _setup - do initial configuration of omap_hwmod
1773 * @oh: struct omap_hwmod *
1774 *
1775 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1776 * OCP_SYSCONFIG register. Returns 0.
1777 */
1778 static int _setup(struct omap_hwmod *oh, void *data)
1779 {
1780 int i, r;
1781 u8 postsetup_state;
1783 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1784 return 0;
1786 /* Set iclk autoidle mode */
1787 if (oh->slaves_cnt > 0) {
1788 for (i = 0; i < oh->slaves_cnt; i++) {
1789 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1790 struct clk *c = os->_clk;
1792 if (!c)
1793 continue;
1795 if (os->flags & OCPIF_SWSUP_IDLE) {
1796 /* XXX omap_iclk_deny_idle(c); */
1797 } else {
1798 /* XXX omap_iclk_allow_idle(c); */
1799 clk_enable(c);
1800 }
1801 }
1802 }
1804 oh->_state = _HWMOD_STATE_INITIALIZED;
1806 /*
1807 * In the case of hwmod with hardreset that should not be
1808 * de-assert at boot time, we have to keep the module
1809 * initialized, because we cannot enable it properly with the
1810 * reset asserted. Exit without warning because that behavior is
1811 * expected.
1812 */
1813 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1814 return 0;
1816 r = _enable(oh);
1817 if (r) {
1818 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1819 oh->name, oh->_state);
1820 return 0;
1821 }
1823 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1824 _reset(oh);
1826 /*
1827 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1828 * The _enable() function should be split to
1829 * avoid the rewrite of the OCP_SYSCONFIG register.
1830 */
1831 if (oh->class->sysc) {
1832 _update_sysc_cache(oh);
1833 _enable_sysc(oh);
1834 }
1835 }
1837 postsetup_state = oh->_postsetup_state;
1838 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1839 postsetup_state = _HWMOD_STATE_ENABLED;
1841 /*
1842 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1843 * it should be set by the core code as a runtime flag during startup
1844 */
1845 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1846 (postsetup_state == _HWMOD_STATE_IDLE)) {
1847 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1848 postsetup_state = _HWMOD_STATE_ENABLED;
1849 }
1851 if (postsetup_state == _HWMOD_STATE_IDLE)
1852 _idle(oh);
1853 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1854 _shutdown(oh);
1855 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1856 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1857 oh->name, postsetup_state);
1859 return 0;
1860 }
1862 /**
1863 * _register - register a struct omap_hwmod
1864 * @oh: struct omap_hwmod *
1865 *
1866 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1867 * already has been registered by the same name; -EINVAL if the
1868 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1869 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1870 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1871 * success.
1872 *
1873 * XXX The data should be copied into bootmem, so the original data
1874 * should be marked __initdata and freed after init. This would allow
1875 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1876 * that the copy process would be relatively complex due to the large number
1877 * of substructures.
1878 */
1879 static int __init _register(struct omap_hwmod *oh)
1880 {
1881 int ms_id;
1883 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1884 (oh->_state != _HWMOD_STATE_UNKNOWN))
1885 return -EINVAL;
1887 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1889 if (_lookup(oh->name))
1890 return -EEXIST;
1892 ms_id = _find_mpu_port_index(oh);
1893 if (!IS_ERR_VALUE(ms_id))
1894 oh->_mpu_port_index = ms_id;
1895 else
1896 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1898 list_add_tail(&oh->node, &omap_hwmod_list);
1900 spin_lock_init(&oh->_lock);
1902 oh->_state = _HWMOD_STATE_REGISTERED;
1904 /*
1905 * XXX Rather than doing a strcmp(), this should test a flag
1906 * set in the hwmod data, inserted by the autogenerator code.
1907 */
1908 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1909 mpu_oh = oh;
1911 return 0;
1912 }
1915 /* Public functions */
1917 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1918 {
1919 if (oh->flags & HWMOD_16BIT_REG)
1920 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1921 else
1922 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1923 }
1925 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1926 {
1927 if (oh->flags & HWMOD_16BIT_REG)
1928 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1929 else
1930 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1931 }
1933 /**
1934 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1935 * @oh: struct omap_hwmod *
1936 *
1937 * This is a public function exposed to drivers. Some drivers may need to do
1938 * some settings before and after resetting the device. Those drivers after
1939 * doing the necessary settings could use this function to start a reset by
1940 * setting the SYSCONFIG.SOFTRESET bit.
1941 */
1942 int omap_hwmod_softreset(struct omap_hwmod *oh)
1943 {
1944 u32 v;
1945 int ret;
1947 if (!oh || !(oh->_sysc_cache))
1948 return -EINVAL;
1950 v = oh->_sysc_cache;
1951 ret = _set_softreset(oh, &v);
1952 if (ret)
1953 goto error;
1954 _write_sysconfig(v, oh);
1956 error:
1957 return ret;
1958 }
1960 /**
1961 * omap_hwmod_set_master_standbymode - set the hwmod's OCP master standbymode
1962 * @oh: struct omap_hwmod *
1963 * @standbymode: MSTANDBY field bits (shifted to bit 0)
1964 *
1965 * Sets the IP block's OCP master staandby mode in hardware, and updates our
1966 * local copy. Intended to be used by drivers that have some erratum
1967 * that requires direct manipulation of the MSTANDBY bits. Returns
1968 * -EINVAL if @oh is null, or passes along the return value from
1969 * _set_master_standbymode().
1970 *
1971 */
1972 int omap_hwmod_set_master_standbymode(struct omap_hwmod *oh, u8 standbymode)
1973 {
1974 u32 v;
1975 int retval = 0;
1977 if (!oh)
1978 return -EINVAL;
1980 v = oh->_sysc_cache;
1982 retval = _set_master_standbymode(oh, standbymode, &v);
1983 if (!retval)
1984 _write_sysconfig(v, oh);
1986 return retval;
1987 }
1989 /**
1990 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1991 * @oh: struct omap_hwmod *
1992 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1993 *
1994 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1995 * local copy. Intended to be used by drivers that have some erratum
1996 * that requires direct manipulation of the SIDLEMODE bits. Returns
1997 * -EINVAL if @oh is null, or passes along the return value from
1998 * _set_slave_idlemode().
1999 *
2000 * XXX Does this function have any current users? If not, we should
2001 * remove it; it is better to let the rest of the hwmod code handle this.
2002 * Any users of this function should be scrutinized carefully.
2003 */
2004 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2005 {
2006 u32 v;
2007 int retval = 0;
2009 if (!oh)
2010 return -EINVAL;
2012 v = oh->_sysc_cache;
2014 retval = _set_slave_idlemode(oh, idlemode, &v);
2015 if (!retval)
2016 _write_sysconfig(v, oh);
2018 return retval;
2019 }
2021 /**
2022 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2023 * @name: name of the omap_hwmod to look up
2024 *
2025 * Given a @name of an omap_hwmod, return a pointer to the registered
2026 * struct omap_hwmod *, or NULL upon error.
2027 */
2028 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2029 {
2030 struct omap_hwmod *oh;
2032 if (!name)
2033 return NULL;
2035 oh = _lookup(name);
2037 return oh;
2038 }
2040 /**
2041 * omap_hwmod_for_each - call function for each registered omap_hwmod
2042 * @fn: pointer to a callback function
2043 * @data: void * data to pass to callback function
2044 *
2045 * Call @fn for each registered omap_hwmod, passing @data to each
2046 * function. @fn must return 0 for success or any other value for
2047 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2048 * will stop and the non-zero return value will be passed to the
2049 * caller of omap_hwmod_for_each(). @fn is called with
2050 * omap_hwmod_for_each() held.
2051 */
2052 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2053 void *data)
2054 {
2055 struct omap_hwmod *temp_oh;
2056 int ret = 0;
2058 if (!fn)
2059 return -EINVAL;
2061 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2062 ret = (*fn)(temp_oh, data);
2063 if (ret)
2064 break;
2065 }
2067 return ret;
2068 }
2070 /**
2071 * omap_hwmod_register - register an array of hwmods
2072 * @ohs: pointer to an array of omap_hwmods to register
2073 *
2074 * Intended to be called early in boot before the clock framework is
2075 * initialized. If @ohs is not null, will register all omap_hwmods
2076 * listed in @ohs that are valid for this chip. Returns 0.
2077 */
2078 int __init omap_hwmod_register(struct omap_hwmod **ohs)
2079 {
2080 int r, i;
2082 if (!ohs)
2083 return 0;
2085 i = 0;
2086 do {
2087 r = _register(ohs[i]);
2088 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2089 r);
2090 } while (ohs[++i]);
2092 return 0;
2093 }
2095 /*
2096 * _populate_mpu_rt_base - populate the virtual address for a hwmod
2097 *
2098 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
2099 * Assumes the caller takes care of locking if needed.
2100 */
2101 static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
2102 {
2103 if (oh->_state != _HWMOD_STATE_REGISTERED)
2104 return 0;
2106 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2107 return 0;
2109 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
2111 return 0;
2112 }
2114 /**
2115 * omap_hwmod_setup_one - set up a single hwmod
2116 * @oh_name: const char * name of the already-registered hwmod to set up
2117 *
2118 * Must be called after omap2_clk_init(). Resolves the struct clk
2119 * names to struct clk pointers for each registered omap_hwmod. Also
2120 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
2121 * success.
2122 */
2123 int __init omap_hwmod_setup_one(const char *oh_name)
2124 {
2125 struct omap_hwmod *oh;
2126 int r;
2128 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2130 if (!mpu_oh) {
2131 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
2132 oh_name, MPU_INITIATOR_NAME);
2133 return -EINVAL;
2134 }
2136 oh = _lookup(oh_name);
2137 if (!oh) {
2138 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2139 return -EINVAL;
2140 }
2142 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2143 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
2145 r = _populate_mpu_rt_base(oh, NULL);
2146 if (IS_ERR_VALUE(r)) {
2147 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
2148 return -EINVAL;
2149 }
2151 r = _init_clocks(oh, NULL);
2152 if (IS_ERR_VALUE(r)) {
2153 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
2154 return -EINVAL;
2155 }
2157 _setup(oh, NULL);
2159 return 0;
2160 }
2162 /**
2163 * omap_hwmod_setup - do some post-clock framework initialization
2164 *
2165 * Must be called after omap2_clk_init(). Resolves the struct clk names
2166 * to struct clk pointers for each registered omap_hwmod. Also calls
2167 * _setup() on each hwmod. Returns 0 upon success.
2168 */
2169 static int __init omap_hwmod_setup_all(void)
2170 {
2171 int r;
2173 if (!mpu_oh) {
2174 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2175 __func__, MPU_INITIATOR_NAME);
2176 return -EINVAL;
2177 }
2179 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
2181 r = omap_hwmod_for_each(_init_clocks, NULL);
2182 WARN(IS_ERR_VALUE(r),
2183 "omap_hwmod: %s: _init_clocks failed\n", __func__);
2185 omap_hwmod_for_each(_setup, NULL);
2187 return 0;
2188 }
2189 core_initcall(omap_hwmod_setup_all);
2191 /**
2192 * omap_hwmod_enable - enable an omap_hwmod
2193 * @oh: struct omap_hwmod *
2194 *
2195 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
2196 * Returns -EINVAL on error or passes along the return value from _enable().
2197 */
2198 int omap_hwmod_enable(struct omap_hwmod *oh)
2199 {
2200 int r;
2201 unsigned long flags;
2203 if (!oh)
2204 return -EINVAL;
2206 spin_lock_irqsave(&oh->_lock, flags);
2207 r = _enable(oh);
2208 spin_unlock_irqrestore(&oh->_lock, flags);
2210 return r;
2211 }
2213 /**
2214 * omap_hwmod_idle - idle an omap_hwmod
2215 * @oh: struct omap_hwmod *
2216 *
2217 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
2218 * Returns -EINVAL on error or passes along the return value from _idle().
2219 */
2220 int omap_hwmod_idle(struct omap_hwmod *oh)
2221 {
2222 unsigned long flags;
2224 if (!oh)
2225 return -EINVAL;
2227 spin_lock_irqsave(&oh->_lock, flags);
2228 _idle(oh);
2229 spin_unlock_irqrestore(&oh->_lock, flags);
2231 return 0;
2232 }
2234 /**
2235 * omap_hwmod_shutdown - shutdown an omap_hwmod
2236 * @oh: struct omap_hwmod *
2237 *
2238 * Shutdown an omap_hwmod @oh. Intended to be called by
2239 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2240 * the return value from _shutdown().
2241 */
2242 int omap_hwmod_shutdown(struct omap_hwmod *oh)
2243 {
2244 unsigned long flags;
2246 if (!oh)
2247 return -EINVAL;
2249 spin_lock_irqsave(&oh->_lock, flags);
2250 _shutdown(oh);
2251 spin_unlock_irqrestore(&oh->_lock, flags);
2253 return 0;
2254 }
2256 /**
2257 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2258 * @oh: struct omap_hwmod *oh
2259 *
2260 * Intended to be called by the omap_device code.
2261 */
2262 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2263 {
2264 unsigned long flags;
2266 spin_lock_irqsave(&oh->_lock, flags);
2267 _enable_clocks(oh);
2268 spin_unlock_irqrestore(&oh->_lock, flags);
2270 return 0;
2271 }
2273 /**
2274 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2275 * @oh: struct omap_hwmod *oh
2276 *
2277 * Intended to be called by the omap_device code.
2278 */
2279 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2280 {
2281 unsigned long flags;
2283 spin_lock_irqsave(&oh->_lock, flags);
2284 _disable_clocks(oh);
2285 spin_unlock_irqrestore(&oh->_lock, flags);
2287 return 0;
2288 }
2290 /**
2291 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2292 * @oh: struct omap_hwmod *oh
2293 *
2294 * Intended to be called by drivers and core code when all posted
2295 * writes to a device must complete before continuing further
2296 * execution (for example, after clearing some device IRQSTATUS
2297 * register bits)
2298 *
2299 * XXX what about targets with multiple OCP threads?
2300 */
2301 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2302 {
2303 BUG_ON(!oh);
2305 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2306 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2307 "device configuration\n", oh->name);
2308 return;
2309 }
2311 /*
2312 * Forces posted writes to complete on the OCP thread handling
2313 * register writes
2314 */
2315 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
2316 }
2318 /**
2319 * omap_hwmod_reset - reset the hwmod
2320 * @oh: struct omap_hwmod *
2321 *
2322 * Under some conditions, a driver may wish to reset the entire device.
2323 * Called from omap_device code. Returns -EINVAL on error or passes along
2324 * the return value from _reset().
2325 */
2326 int omap_hwmod_reset(struct omap_hwmod *oh)
2327 {
2328 int r;
2329 unsigned long flags;
2331 if (!oh)
2332 return -EINVAL;
2334 spin_lock_irqsave(&oh->_lock, flags);
2335 r = _reset(oh);
2336 spin_unlock_irqrestore(&oh->_lock, flags);
2338 return r;
2339 }
2341 /**
2342 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2343 * @oh: struct omap_hwmod *
2344 * @res: pointer to the first element of an array of struct resource to fill
2345 *
2346 * Count the number of struct resource array elements necessary to
2347 * contain omap_hwmod @oh resources. Intended to be called by code
2348 * that registers omap_devices. Intended to be used to determine the
2349 * size of a dynamically-allocated struct resource array, before
2350 * calling omap_hwmod_fill_resources(). Returns the number of struct
2351 * resource array elements needed.
2352 *
2353 * XXX This code is not optimized. It could attempt to merge adjacent
2354 * resource IDs.
2355 *
2356 */
2357 int omap_hwmod_count_resources(struct omap_hwmod *oh)
2358 {
2359 int ret, i;
2361 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
2363 for (i = 0; i < oh->slaves_cnt; i++)
2364 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
2366 return ret;
2367 }
2369 /**
2370 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2371 * @oh: struct omap_hwmod *
2372 * @res: pointer to the first element of an array of struct resource to fill
2373 *
2374 * Fill the struct resource array @res with resource data from the
2375 * omap_hwmod @oh. Intended to be called by code that registers
2376 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2377 * number of array elements filled.
2378 */
2379 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2380 {
2381 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
2382 int r = 0;
2384 /* For each IRQ, DMA, memory area, fill in array.*/
2386 mpu_irqs_cnt = _count_mpu_irqs(oh);
2387 for (i = 0; i < mpu_irqs_cnt; i++) {
2388 (res + r)->name = (oh->mpu_irqs + i)->name;
2389 (res + r)->start = (oh->mpu_irqs + i)->irq;
2390 (res + r)->end = (oh->mpu_irqs + i)->irq;
2391 (res + r)->flags = IORESOURCE_IRQ;
2392 r++;
2393 }
2395 sdma_reqs_cnt = _count_sdma_reqs(oh);
2396 for (i = 0; i < sdma_reqs_cnt; i++) {
2397 (res + r)->name = (oh->sdma_reqs + i)->name;
2398 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2399 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
2400 (res + r)->flags = IORESOURCE_DMA;
2401 r++;
2402 }
2404 for (i = 0; i < oh->slaves_cnt; i++) {
2405 struct omap_hwmod_ocp_if *os;
2406 int addr_cnt;
2408 os = oh->slaves[i];
2409 addr_cnt = _count_ocp_if_addr_spaces(os);
2411 for (j = 0; j < addr_cnt; j++) {
2412 (res + r)->name = (os->addr + j)->name;
2413 (res + r)->start = (os->addr + j)->pa_start;
2414 (res + r)->end = (os->addr + j)->pa_end;
2415 (res + r)->flags = IORESOURCE_MEM;
2416 r++;
2417 }
2418 }
2420 return r;
2421 }
2423 /**
2424 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2425 * @oh: struct omap_hwmod *
2426 *
2427 * Return the powerdomain pointer associated with the OMAP module
2428 * @oh's main clock. If @oh does not have a main clk, return the
2429 * powerdomain associated with the interface clock associated with the
2430 * module's MPU port. (XXX Perhaps this should use the SDMA port
2431 * instead?) Returns NULL on error, or a struct powerdomain * on
2432 * success.
2433 */
2434 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2435 {
2436 struct clk *c;
2438 if (!oh)
2439 return NULL;
2441 if (oh->_clk) {
2442 c = oh->_clk;
2443 } else {
2444 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2445 return NULL;
2446 c = oh->slaves[oh->_mpu_port_index]->_clk;
2447 }
2449 if (!c->clkdm)
2450 return NULL;
2452 return c->clkdm->pwrdm.ptr;
2454 }
2456 /**
2457 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2458 * @oh: struct omap_hwmod *
2459 *
2460 * Returns the virtual address corresponding to the beginning of the
2461 * module's register target, in the address range that is intended to
2462 * be used by the MPU. Returns the virtual address upon success or NULL
2463 * upon error.
2464 */
2465 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2466 {
2467 if (!oh)
2468 return NULL;
2470 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2471 return NULL;
2473 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2474 return NULL;
2476 return oh->_mpu_rt_va;
2477 }
2479 /**
2480 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2481 * @oh: struct omap_hwmod *
2482 * @init_oh: struct omap_hwmod * (initiator)
2483 *
2484 * Add a sleep dependency between the initiator @init_oh and @oh.
2485 * Intended to be called by DSP/Bridge code via platform_data for the
2486 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2487 * code needs to add/del initiator dependencies dynamically
2488 * before/after accessing a device. Returns the return value from
2489 * _add_initiator_dep().
2490 *
2491 * XXX Keep a usecount in the clockdomain code
2492 */
2493 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2494 struct omap_hwmod *init_oh)
2495 {
2496 return _add_initiator_dep(oh, init_oh);
2497 }
2499 /*
2500 * XXX what about functions for drivers to save/restore ocp_sysconfig
2501 * for context save/restore operations?
2502 */
2504 /**
2505 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2506 * @oh: struct omap_hwmod *
2507 * @init_oh: struct omap_hwmod * (initiator)
2508 *
2509 * Remove a sleep dependency between the initiator @init_oh and @oh.
2510 * Intended to be called by DSP/Bridge code via platform_data for the
2511 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2512 * code needs to add/del initiator dependencies dynamically
2513 * before/after accessing a device. Returns the return value from
2514 * _del_initiator_dep().
2515 *
2516 * XXX Keep a usecount in the clockdomain code
2517 */
2518 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2519 struct omap_hwmod *init_oh)
2520 {
2521 return _del_initiator_dep(oh, init_oh);
2522 }
2524 /**
2525 * omap_hwmod_enable_wakeup - allow device to wake up the system
2526 * @oh: struct omap_hwmod *
2527 *
2528 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2529 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2530 * registers to cause the PRCM to receive wakeup events from the
2531 * module. Does not set any wakeup routing registers beyond this
2532 * point - if the module is to wake up any other module or subsystem,
2533 * that must be set separately. Called by omap_device code. Returns
2534 * -EINVAL on error or 0 upon success.
2535 */
2536 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2537 {
2538 unsigned long flags;
2539 u32 v;
2541 if (!oh->class->sysc ||
2542 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2543 return -EINVAL;
2545 spin_lock_irqsave(&oh->_lock, flags);
2546 v = oh->_sysc_cache;
2547 _enable_wakeup(oh, &v);
2548 _write_sysconfig(v, oh);
2549 _set_idle_ioring_wakeup(oh, true);
2550 spin_unlock_irqrestore(&oh->_lock, flags);
2552 return 0;
2553 }
2555 /**
2556 * omap_hwmod_disable_wakeup - prevent device from waking the system
2557 * @oh: struct omap_hwmod *
2558 *
2559 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2560 * from sending wakeups to the PRCM. Eventually this should clear
2561 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2562 * from the module. Does not set any wakeup routing registers beyond
2563 * this point - if the module is to wake up any other module or
2564 * subsystem, that must be set separately. Called by omap_device
2565 * code. Returns -EINVAL on error or 0 upon success.
2566 */
2567 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2568 {
2569 unsigned long flags;
2570 u32 v;
2572 if (!oh->class->sysc ||
2573 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2574 return -EINVAL;
2576 spin_lock_irqsave(&oh->_lock, flags);
2577 v = oh->_sysc_cache;
2578 _disable_wakeup(oh, &v);
2579 _write_sysconfig(v, oh);
2580 _set_idle_ioring_wakeup(oh, false);
2581 spin_unlock_irqrestore(&oh->_lock, flags);
2583 return 0;
2584 }
2586 /**
2587 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2588 * contained in the hwmod module.
2589 * @oh: struct omap_hwmod *
2590 * @name: name of the reset line to lookup and assert
2591 *
2592 * Some IP like dsp, ipu or iva contain processor that require
2593 * an HW reset line to be assert / deassert in order to enable fully
2594 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2595 * yet supported on this OMAP; otherwise, passes along the return value
2596 * from _assert_hardreset().
2597 */
2598 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2599 {
2600 int ret;
2601 unsigned long flags;
2603 if (!oh)
2604 return -EINVAL;
2606 spin_lock_irqsave(&oh->_lock, flags);
2607 ret = _assert_hardreset(oh, name);
2608 spin_unlock_irqrestore(&oh->_lock, flags);
2610 return ret;
2611 }
2613 /**
2614 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2615 * contained in the hwmod module.
2616 * @oh: struct omap_hwmod *
2617 * @name: name of the reset line to look up and deassert
2618 *
2619 * Some IP like dsp, ipu or iva contain processor that require
2620 * an HW reset line to be assert / deassert in order to enable fully
2621 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2622 * yet supported on this OMAP; otherwise, passes along the return value
2623 * from _deassert_hardreset().
2624 */
2625 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2626 {
2627 int ret;
2628 unsigned long flags;
2630 if (!oh)
2631 return -EINVAL;
2633 spin_lock_irqsave(&oh->_lock, flags);
2634 ret = _deassert_hardreset(oh, name);
2635 spin_unlock_irqrestore(&oh->_lock, flags);
2637 return ret;
2638 }
2640 /**
2641 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2642 * contained in the hwmod module
2643 * @oh: struct omap_hwmod *
2644 * @name: name of the reset line to look up and read
2645 *
2646 * Return the current state of the hwmod @oh's reset line named @name:
2647 * returns -EINVAL upon parameter error or if this operation
2648 * is unsupported on the current OMAP; otherwise, passes along the return
2649 * value from _read_hardreset().
2650 */
2651 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2652 {
2653 int ret;
2654 unsigned long flags;
2656 if (!oh)
2657 return -EINVAL;
2659 spin_lock_irqsave(&oh->_lock, flags);
2660 ret = _read_hardreset(oh, name);
2661 spin_unlock_irqrestore(&oh->_lock, flags);
2663 return ret;
2664 }
2667 /**
2668 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2669 * @classname: struct omap_hwmod_class name to search for
2670 * @fn: callback function pointer to call for each hwmod in class @classname
2671 * @user: arbitrary context data to pass to the callback function
2672 *
2673 * For each omap_hwmod of class @classname, call @fn.
2674 * If the callback function returns something other than
2675 * zero, the iterator is terminated, and the callback function's return
2676 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2677 * if @classname or @fn are NULL, or passes back the error code from @fn.
2678 */
2679 int omap_hwmod_for_each_by_class(const char *classname,
2680 int (*fn)(struct omap_hwmod *oh,
2681 void *user),
2682 void *user)
2683 {
2684 struct omap_hwmod *temp_oh;
2685 int ret = 0;
2687 if (!classname || !fn)
2688 return -EINVAL;
2690 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2691 __func__, classname);
2693 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2694 if (!strcmp(temp_oh->class->name, classname)) {
2695 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2696 __func__, temp_oh->name);
2697 ret = (*fn)(temp_oh, user);
2698 if (ret)
2699 break;
2700 }
2701 }
2703 if (ret)
2704 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2705 __func__, ret);
2707 return ret;
2708 }
2710 /**
2711 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2712 * @oh: struct omap_hwmod *
2713 * @state: state that _setup() should leave the hwmod in
2714 *
2715 * Sets the hwmod state that @oh will enter at the end of _setup()
2716 * (called by omap_hwmod_setup_*()). Only valid to call between
2717 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
2718 * 0 upon success or -EINVAL if there is a problem with the arguments
2719 * or if the hwmod is in the wrong state.
2720 */
2721 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2722 {
2723 int ret;
2724 unsigned long flags;
2726 if (!oh)
2727 return -EINVAL;
2729 if (state != _HWMOD_STATE_DISABLED &&
2730 state != _HWMOD_STATE_ENABLED &&
2731 state != _HWMOD_STATE_IDLE)
2732 return -EINVAL;
2734 spin_lock_irqsave(&oh->_lock, flags);
2736 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2737 ret = -EINVAL;
2738 goto ohsps_unlock;
2739 }
2741 oh->_postsetup_state = state;
2742 ret = 0;
2744 ohsps_unlock:
2745 spin_unlock_irqrestore(&oh->_lock, flags);
2747 return ret;
2748 }
2750 /**
2751 * omap_hwmod_get_context_loss_count - get lost context count
2752 * @oh: struct omap_hwmod *
2753 *
2754 * Query the powerdomain of of @oh to get the context loss
2755 * count for this device.
2756 *
2757 * Returns the context loss count of the powerdomain assocated with @oh
2758 * upon success, or zero if no powerdomain exists for @oh.
2759 */
2760 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2761 {
2762 struct powerdomain *pwrdm;
2763 int ret = 0;
2765 pwrdm = omap_hwmod_get_pwrdm(oh);
2766 if (pwrdm)
2767 ret = pwrdm_get_context_loss_count(pwrdm);
2769 return ret;
2770 }
2772 /**
2773 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2774 * @oh: struct omap_hwmod *
2775 *
2776 * Prevent the hwmod @oh from being reset during the setup process.
2777 * Intended for use by board-*.c files on boards with devices that
2778 * cannot tolerate being reset. Must be called before the hwmod has
2779 * been set up. Returns 0 upon success or negative error code upon
2780 * failure.
2781 */
2782 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2783 {
2784 if (!oh)
2785 return -EINVAL;
2787 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2788 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2789 oh->name);
2790 return -EINVAL;
2791 }
2793 oh->flags |= HWMOD_INIT_NO_RESET;
2795 return 0;
2796 }
2798 /**
2799 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
2800 * @oh: struct omap_hwmod * containing hwmod mux entries
2801 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
2802 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
2803 *
2804 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
2805 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
2806 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
2807 * this function is not called for a given pad_idx, then the ISR
2808 * associated with @oh's first MPU IRQ will be triggered when an I/O
2809 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
2810 * the _dynamic or wakeup_ entry: if there are other entries not
2811 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
2812 * entries are NOT COUNTED in the dynamic pad index. This function
2813 * must be called separately for each pad that requires its interrupt
2814 * to be re-routed this way. Returns -EINVAL if there is an argument
2815 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
2816 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
2817 *
2818 * XXX This function interface is fragile. Rather than using array
2819 * indexes, which are subject to unpredictable change, it should be
2820 * using hwmod IRQ names, and some other stable key for the hwmod mux
2821 * pad records.
2822 */
2823 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
2824 {
2825 int nr_irqs;
2827 might_sleep();
2829 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
2830 pad_idx >= oh->mux->nr_pads_dynamic)
2831 return -EINVAL;
2833 /* Check the number of available mpu_irqs */
2834 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
2835 ;
2837 if (irq_idx >= nr_irqs)
2838 return -EINVAL;
2840 if (!oh->mux->irqs) {
2841 /* XXX What frees this? */
2842 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
2843 GFP_KERNEL);
2844 if (!oh->mux->irqs)
2845 return -ENOMEM;
2846 }
2847 oh->mux->irqs[pad_idx] = irq_idx;
2849 return 0;
2850 }