1 /*
2 * omap_hwmod macros, structures
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 * Paul Walmsley
7 *
8 * Created in collaboration with (alphabetical order): Benoît Cousson,
9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * These headers and macros are used to define OMAP on-chip module
17 * data and their integration with other OMAP modules and Linux.
18 * Copious documentation and references can also be found in the
19 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * writing).
21 *
22 * To do:
23 * - add interconnect error log structures
24 * - add pinmuxing
25 * - init_conn_id_bit (CONNID_BIT_VECTOR)
26 * - implement default hwmod SMS/SDRC flags?
27 * - move Linux-specific data ("non-ROM data") out
28 *
29 */
30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/list.h>
36 #include <linux/ioport.h>
37 #include <linux/spinlock.h>
38 #include <plat/cpu.h>
40 struct omap_device;
42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
44 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
45 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
47 /*
48 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
49 * with the original PRCM protocol defined for OMAP2420
50 */
51 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
52 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
53 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
54 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
55 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
56 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
57 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
58 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
59 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
60 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
61 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
62 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
64 /*
65 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
66 * with the new PRCM protocol defined for new OMAP4 IPs.
67 */
68 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
69 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
70 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
71 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
72 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
73 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
75 /*
76 * OCP SYSCONFIG bit shifts/masks TYPE3.
77 * This is applicable for some IPs present in AM33XX
78 */
79 #define SYSC_TYPE3_SIDLEMODE_SHIFT 0
80 #define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
81 #define SYSC_TYPE3_MIDLEMODE_SHIFT 2
82 #define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
84 /*
85 * OCP SYSCONFIG bit shifts/masks TYPE4.
86 * This is applicable for some IPs present in AM33XX
87 */
88 #define SYSC_TYPE4_CLOCKACTIVITY_SHIFT 8
89 #define SYSC_TYPE4_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
90 #define SYSC_TYPE4_MIDLEMODE_SHIFT 5
91 #define SYSC_TYPE4_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
92 #define SYSC_TYPE4_SIDLEMODE_SHIFT 3
93 #define SYSC_TYPE4_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
94 #define SYSC_TYPE4_ENAWAKEUP_SHIFT 2
95 #define SYSC_TYPE4_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
96 #define SYSC_TYPE4_SOFTRESET_SHIFT 1
97 #define SYSC_TYPE4_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
98 #define SYSC_TYPE4_AUTOIDLE_SHIFT 0
99 #define SYSC_TYPE4_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
101 /* OCP SYSSTATUS bit shifts/masks */
102 #define SYSS_RESETDONE_SHIFT 0
103 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
105 /* Master standby/slave idle mode flags */
106 #define HWMOD_IDLEMODE_FORCE (1 << 0)
107 #define HWMOD_IDLEMODE_NO (1 << 1)
108 #define HWMOD_IDLEMODE_SMART (1 << 2)
109 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3)
111 /* modulemode control type (SW or HW) */
112 #define MODULEMODE_HWCTRL 1
113 #define MODULEMODE_SWCTRL 2
116 /**
117 * struct omap_hwmod_mux_info - hwmod specific mux configuration
118 * @pads: array of omap_device_pad entries
119 * @nr_pads: number of omap_device_pad entries
120 *
121 * Note that this is currently built during init as needed.
122 */
123 struct omap_hwmod_mux_info {
124 int nr_pads;
125 struct omap_device_pad *pads;
126 int nr_pads_dynamic;
127 struct omap_device_pad **pads_dynamic;
128 int *irqs;
129 bool enabled;
130 };
132 /**
133 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
134 * @name: name of the IRQ channel (module local name)
135 * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
136 *
137 * @name should be something short, e.g., "tx" or "rx". It is for use
138 * by platform_get_resource_byname(). It is defined locally to the
139 * hwmod.
140 */
141 struct omap_hwmod_irq_info {
142 const char *name;
143 s16 irq;
144 };
146 /**
147 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
148 * @name: name of the DMA channel (module local name)
149 * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
150 *
151 * @name should be something short, e.g., "tx" or "rx". It is for use
152 * by platform_get_resource_byname(). It is defined locally to the
153 * hwmod.
154 */
155 struct omap_hwmod_dma_info {
156 const char *name;
157 s16 dma_req;
158 };
160 /**
161 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
162 * @name: name of the reset line (module local name)
163 * @rst_shift: Offset of the reset bit
164 * @st_shift: Offset of the reset status bit (OMAP2/3 only)
165 *
166 * @name should be something short, e.g., "cpu0" or "rst". It is defined
167 * locally to the hwmod.
168 */
169 struct omap_hwmod_rst_info {
170 const char *name;
171 u8 rst_shift;
172 u8 st_shift;
173 };
175 /**
176 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
177 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
178 * @clk: opt clock: OMAP clock name
179 * @_clk: pointer to the struct clk (filled in at runtime)
180 *
181 * The module's interface clock and main functional clock should not
182 * be added as optional clocks.
183 */
184 struct omap_hwmod_opt_clk {
185 const char *role;
186 const char *clk;
187 struct clk *_clk;
188 };
191 /* omap_hwmod_omap2_firewall.flags bits */
192 #define OMAP_FIREWALL_L3 (1 << 0)
193 #define OMAP_FIREWALL_L4 (1 << 1)
195 /**
196 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
197 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
198 * @l4_fw_region: L4 firewall region ID
199 * @l4_prot_group: L4 protection group ID
200 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
201 */
202 struct omap_hwmod_omap2_firewall {
203 u8 l3_perm_bit;
204 u8 l4_fw_region;
205 u8 l4_prot_group;
206 u8 flags;
207 };
210 /*
211 * omap_hwmod_addr_space.flags bits
212 *
213 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
214 * ADDR_TYPE_RT: Address space contains module register target data.
215 */
216 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
217 #define ADDR_TYPE_RT (1 << 1)
219 /**
220 * struct omap_hwmod_addr_space - address space handled by the hwmod
221 * @name: name of the address space
222 * @pa_start: starting physical address
223 * @pa_end: ending physical address
224 * @flags: (see omap_hwmod_addr_space.flags macros above)
225 *
226 * Address space doesn't necessarily follow physical interconnect
227 * structure. GPMC is one example.
228 */
229 struct omap_hwmod_addr_space {
230 const char *name;
231 u32 pa_start;
232 u32 pa_end;
233 u8 flags;
234 };
237 /*
238 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
239 * interface to interact with the hwmod. Used to add sleep dependencies
240 * when the module is enabled or disabled.
241 */
242 #define OCP_USER_MPU (1 << 0)
243 #define OCP_USER_SDMA (1 << 1)
245 /* omap_hwmod_ocp_if.flags bits */
246 #define OCPIF_SWSUP_IDLE (1 << 0)
247 #define OCPIF_CAN_BURST (1 << 1)
249 /**
250 * struct omap_hwmod_ocp_if - OCP interface data
251 * @master: struct omap_hwmod that initiates OCP transactions on this link
252 * @slave: struct omap_hwmod that responds to OCP transactions on this link
253 * @addr: address space associated with this link
254 * @clk: interface clock: OMAP clock name
255 * @_clk: pointer to the interface struct clk (filled in at runtime)
256 * @fw: interface firewall data
257 * @width: OCP data width
258 * @user: initiators using this interface (see OCP_USER_* macros above)
259 * @flags: OCP interface flags (see OCPIF_* macros above)
260 *
261 * It may also be useful to add a tag_cnt field for OCP2.x devices.
262 *
263 * Parameter names beginning with an underscore are managed internally by
264 * the omap_hwmod code and should not be set during initialization.
265 */
266 struct omap_hwmod_ocp_if {
267 struct omap_hwmod *master;
268 struct omap_hwmod *slave;
269 struct omap_hwmod_addr_space *addr;
270 const char *clk;
271 struct clk *_clk;
272 union {
273 struct omap_hwmod_omap2_firewall omap2;
274 } fw;
275 u8 width;
276 u8 user;
277 u8 flags;
278 };
281 /* Macros for use in struct omap_hwmod_sysconfig */
283 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
284 #define MASTER_STANDBY_SHIFT 4
285 #define SLAVE_IDLE_SHIFT 0
286 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
287 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
288 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
289 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
290 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
291 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
292 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
293 #define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
295 /* omap_hwmod_sysconfig.sysc_flags capability flags */
296 #define SYSC_HAS_AUTOIDLE (1 << 0)
297 #define SYSC_HAS_SOFTRESET (1 << 1)
298 #define SYSC_HAS_ENAWAKEUP (1 << 2)
299 #define SYSC_HAS_EMUFREE (1 << 3)
300 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
301 #define SYSC_HAS_SIDLEMODE (1 << 5)
302 #define SYSC_HAS_MIDLEMODE (1 << 6)
303 #define SYSS_HAS_RESET_STATUS (1 << 7)
304 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
305 #define SYSC_HAS_RESET_STATUS (1 << 9)
307 /* omap_hwmod_sysconfig.clockact flags */
308 #define CLOCKACT_TEST_BOTH 0x0
309 #define CLOCKACT_TEST_MAIN 0x1
310 #define CLOCKACT_TEST_ICLK 0x2
311 #define CLOCKACT_TEST_NONE 0x3
313 /**
314 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
315 * @midle_shift: Offset of the midle bit
316 * @clkact_shift: Offset of the clockactivity bit
317 * @sidle_shift: Offset of the sidle bit
318 * @enwkup_shift: Offset of the enawakeup bit
319 * @srst_shift: Offset of the softreset bit
320 * @autoidle_shift: Offset of the autoidle bit
321 */
322 struct omap_hwmod_sysc_fields {
323 u8 midle_shift;
324 u8 clkact_shift;
325 u8 sidle_shift;
326 u8 enwkup_shift;
327 u8 srst_shift;
328 u8 autoidle_shift;
329 };
331 /**
332 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
333 * @rev_offs: IP block revision register offset (from module base addr)
334 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
335 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
336 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
337 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
338 * @clockact: the default value of the module CLOCKACTIVITY bits
339 *
340 * @clockact describes to the module which clocks are likely to be
341 * disabled when the PRCM issues its idle request to the module. Some
342 * modules have separate clockdomains for the interface clock and main
343 * functional clock, and can check whether they should acknowledge the
344 * idle request based on the internal module functionality that has
345 * been associated with the clocks marked in @clockact. This field is
346 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
347 *
348 * @sysc_fields: structure containing the offset positions of various bits in
349 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
350 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
351 * whether the device ip is compliant with the original PRCM protocol
352 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
353 * If the device follows a different scheme for the sysconfig register ,
354 * then this field has to be populated with the correct offset structure.
355 */
356 struct omap_hwmod_class_sysconfig {
357 u16 rev_offs;
358 u16 sysc_offs;
359 u16 syss_offs;
360 u16 sysc_flags;
361 u8 idlemodes;
362 u8 clockact;
363 struct omap_hwmod_sysc_fields *sysc_fields;
364 };
366 /**
367 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
368 * @module_offs: PRCM submodule offset from the start of the PRM/CM
369 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
370 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
371 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
372 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
373 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
374 *
375 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
376 * WKEN, GRPSEL registers. In an ideal world, no extra information
377 * would be needed for IDLEST information, but alas, there are some
378 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
379 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
380 */
381 struct omap_hwmod_omap2_prcm {
382 s16 module_offs;
383 u8 prcm_reg_id;
384 u8 module_bit;
385 u8 idlest_reg_id;
386 u8 idlest_idle_bit;
387 u8 idlest_stdby_bit;
388 };
391 /**
392 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
393 * @clkctrl_reg: PRCM address of the clock control register
394 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
395 * @submodule_wkdep_bit: bit shift of the WKDEP range
396 */
397 struct omap_hwmod_omap4_prcm {
398 u16 clkctrl_offs;
399 u16 rstctrl_offs;
400 u16 context_offs;
401 u8 submodule_wkdep_bit;
402 u8 modulemode;
403 };
406 /*
407 * omap_hwmod.flags definitions
408 *
409 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
410 * of idle, rather than relying on module smart-idle
411 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
412 * of standby, rather than relying on module smart-standby
413 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
414 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
415 * XXX Should be HWMOD_SETUP_NO_RESET
416 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
417 * controller, etc. XXX probably belongs outside the main hwmod file
418 * XXX Should be HWMOD_SETUP_NO_IDLE
419 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
420 * when module is enabled, rather than the default, which is to
421 * enable autoidle
422 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
423 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
424 * only for few initiator modules on OMAP2 & 3.
425 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
426 * This is needed for devices like DSS that require optional clocks enabled
427 * in order to complete the reset. Optional clocks will be disabled
428 * again after the reset.
429 * HWMOD_16BIT_REG: Module has 16bit registers
430 */
431 #define HWMOD_SWSUP_SIDLE (1 << 0)
432 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
433 #define HWMOD_INIT_NO_RESET (1 << 2)
434 #define HWMOD_INIT_NO_IDLE (1 << 3)
435 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
436 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
437 #define HWMOD_NO_IDLEST (1 << 6)
438 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
439 #define HWMOD_16BIT_REG (1 << 8)
441 /*
442 * omap_hwmod._int_flags definitions
443 * These are for internal use only and are managed by the omap_hwmod code.
444 *
445 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
446 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
447 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
448 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
449 * causes the first call to _enable() to only update the pinmux
450 */
451 #define _HWMOD_NO_MPU_PORT (1 << 0)
452 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
453 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
454 #define _HWMOD_SKIP_ENABLE (1 << 3)
456 /*
457 * omap_hwmod._state definitions
458 *
459 * INITIALIZED: reset (optionally), initialized, enabled, disabled
460 * (optionally)
461 *
462 *
463 */
464 #define _HWMOD_STATE_UNKNOWN 0
465 #define _HWMOD_STATE_REGISTERED 1
466 #define _HWMOD_STATE_CLKS_INITED 2
467 #define _HWMOD_STATE_INITIALIZED 3
468 #define _HWMOD_STATE_ENABLED 4
469 #define _HWMOD_STATE_IDLE 5
470 #define _HWMOD_STATE_DISABLED 6
472 /**
473 * struct omap_hwmod_class - the type of an IP block
474 * @name: name of the hwmod_class
475 * @sysc: device SYSCONFIG/SYSSTATUS register data
476 * @rev: revision of the IP class
477 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
478 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
479 *
480 * Represent the class of a OMAP hardware "modules" (e.g. timer,
481 * smartreflex, gpio, uart...)
482 *
483 * @pre_shutdown is a function that will be run immediately before
484 * hwmod clocks are disabled, etc. It is intended for use for hwmods
485 * like the MPU watchdog, which cannot be disabled with the standard
486 * omap_hwmod_shutdown(). The function should return 0 upon success,
487 * or some negative error upon failure. Returning an error will cause
488 * omap_hwmod_shutdown() to abort the device shutdown and return an
489 * error.
490 *
491 * If @reset is defined, then the function it points to will be
492 * executed in place of the standard hwmod _reset() code in
493 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have
494 * unusual reset sequences - usually processor IP blocks like the IVA.
495 */
496 struct omap_hwmod_class {
497 const char *name;
498 struct omap_hwmod_class_sysconfig *sysc;
499 u32 rev;
500 int (*pre_shutdown)(struct omap_hwmod *oh);
501 int (*reset)(struct omap_hwmod *oh);
502 };
504 /**
505 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
506 * @name: name of the hwmod
507 * @class: struct omap_hwmod_class * to the class of this hwmod
508 * @od: struct omap_device currently associated with this hwmod (internal use)
509 * @mpu_irqs: ptr to an array of MPU IRQs
510 * @sdma_reqs: ptr to an array of System DMA request IDs
511 * @prcm: PRCM data pertaining to this hwmod
512 * @main_clk: main clock: OMAP clock name
513 * @_clk: pointer to the main struct clk (filled in at runtime)
514 * @opt_clks: other device clocks that drivers can request (0..*)
515 * @vdd_name: voltage domain name
516 * @voltdm: pointer to voltage domain (filled in at runtime)
517 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
518 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
519 * @dev_attr: arbitrary device attributes that can be passed to the driver
520 * @_sysc_cache: internal-use hwmod flags
521 * @_mpu_rt_va: cached register target start address (internal use)
522 * @_mpu_port_index: cached MPU register target slave ID (internal use)
523 * @opt_clks_cnt: number of @opt_clks
524 * @master_cnt: number of @master entries
525 * @slaves_cnt: number of @slave entries
526 * @response_lat: device OCP response latency (in interface clock cycles)
527 * @_int_flags: internal-use hwmod flags
528 * @_state: internal-use hwmod state
529 * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
530 * @flags: hwmod flags (documented below)
531 * @_lock: spinlock serializing operations on this hwmod
532 * @node: list node for hwmod list (internal use)
533 *
534 * @main_clk refers to this module's "main clock," which for our
535 * purposes is defined as "the functional clock needed for register
536 * accesses to complete." Modules may not have a main clock if the
537 * interface clock also serves as a main clock.
538 *
539 * Parameter names beginning with an underscore are managed internally by
540 * the omap_hwmod code and should not be set during initialization.
541 */
542 struct omap_hwmod {
543 const char *name;
544 struct omap_hwmod_class *class;
545 struct omap_device *od;
546 struct omap_hwmod_mux_info *mux;
547 struct omap_hwmod_irq_info *mpu_irqs;
548 struct omap_hwmod_dma_info *sdma_reqs;
549 struct omap_hwmod_rst_info *rst_lines;
550 union {
551 struct omap_hwmod_omap2_prcm omap2;
552 struct omap_hwmod_omap4_prcm omap4;
553 } prcm;
554 const char *main_clk;
555 struct clk *_clk;
556 struct omap_hwmod_opt_clk *opt_clks;
557 char *clkdm_name;
558 struct clockdomain *clkdm;
559 char *vdd_name;
560 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
561 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
562 void *dev_attr;
563 u32 _sysc_cache;
564 void __iomem *_mpu_rt_va;
565 spinlock_t _lock;
566 struct list_head node;
567 u16 flags;
568 u8 _mpu_port_index;
569 u8 response_lat;
570 u8 rst_lines_cnt;
571 u8 opt_clks_cnt;
572 u8 masters_cnt;
573 u8 slaves_cnt;
574 u8 hwmods_cnt;
575 u8 _int_flags;
576 u8 _state;
577 u8 _postsetup_state;
578 };
580 int omap_hwmod_register(struct omap_hwmod **ohs);
581 struct omap_hwmod *omap_hwmod_lookup(const char *name);
582 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
583 void *data);
585 int __init omap_hwmod_setup_one(const char *name);
587 int omap_hwmod_enable(struct omap_hwmod *oh);
588 int _omap_hwmod_enable(struct omap_hwmod *oh);
589 int omap_hwmod_idle(struct omap_hwmod *oh);
590 int _omap_hwmod_idle(struct omap_hwmod *oh);
591 int omap_hwmod_shutdown(struct omap_hwmod *oh);
593 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
594 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
595 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
597 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
598 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
600 int omap_hwmod_set_master_standbymode(struct omap_hwmod *oh, u8 idlemode);
601 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
602 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
604 int omap_hwmod_reset(struct omap_hwmod *oh);
605 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
607 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
608 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
609 int omap_hwmod_softreset(struct omap_hwmod *oh);
611 int omap_hwmod_count_resources(struct omap_hwmod *oh);
612 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
614 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
615 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
617 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
618 struct omap_hwmod *init_oh);
619 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
620 struct omap_hwmod *init_oh);
622 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
623 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
624 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
625 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
627 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
628 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
630 int omap_hwmod_for_each_by_class(const char *classname,
631 int (*fn)(struct omap_hwmod *oh,
632 void *user),
633 void *user);
635 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
636 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
638 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
640 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
642 /*
643 * Chip variant-specific hwmod init routines - XXX should be converted
644 * to use initcalls once the initial boot ordering is straightened out
645 */
646 extern int omap2420_hwmod_init(void);
647 extern int omap2430_hwmod_init(void);
648 extern int omap3xxx_hwmod_init(void);
649 extern int omap44xx_hwmod_init(void);
650 extern int am33xx_hwmod_init(void);
652 #endif