1 /*
2 * omap_hwmod macros, structures
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 * Paul Walmsley
7 *
8 * Created in collaboration with (alphabetical order): Benoît Cousson,
9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * These headers and macros are used to define OMAP on-chip module
17 * data and their integration with other OMAP modules and Linux.
18 * Copious documentation and references can also be found in the
19 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * writing).
21 *
22 * To do:
23 * - add interconnect error log structures
24 * - add pinmuxing
25 * - init_conn_id_bit (CONNID_BIT_VECTOR)
26 * - implement default hwmod SMS/SDRC flags?
27 * - move Linux-specific data ("non-ROM data") out
28 *
29 */
30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/list.h>
36 #include <linux/ioport.h>
37 #include <linux/spinlock.h>
38 #include <plat/cpu.h>
40 struct omap_device;
42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
45 /*
46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
47 * with the original PRCM protocol defined for OMAP2420
48 */
49 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
50 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
53 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
54 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
56 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
57 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
58 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
59 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
60 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
62 /*
63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
64 * with the new PRCM protocol defined for new OMAP4 IPs.
65 */
66 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
67 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
68 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
69 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
70 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
71 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
73 /* OCP SYSSTATUS bit shifts/masks */
74 #define SYSS_RESETDONE_SHIFT 0
75 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
77 /* Master standby/slave idle mode flags */
78 #define HWMOD_IDLEMODE_FORCE (1 << 0)
79 #define HWMOD_IDLEMODE_NO (1 << 1)
80 #define HWMOD_IDLEMODE_SMART (1 << 2)
81 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3)
83 /* modulemode control type (SW or HW) */
84 #define MODULEMODE_HWCTRL 1
85 #define MODULEMODE_SWCTRL 2
88 /**
89 * struct omap_hwmod_mux_info - hwmod specific mux configuration
90 * @pads: array of omap_device_pad entries
91 * @nr_pads: number of omap_device_pad entries
92 *
93 * Note that this is currently built during init as needed.
94 */
95 struct omap_hwmod_mux_info {
96 int nr_pads;
97 struct omap_device_pad *pads;
98 int nr_pads_dynamic;
99 struct omap_device_pad **pads_dynamic;
100 bool enabled;
101 };
103 /**
104 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
105 * @name: name of the IRQ channel (module local name)
106 * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
107 *
108 * @name should be something short, e.g., "tx" or "rx". It is for use
109 * by platform_get_resource_byname(). It is defined locally to the
110 * hwmod.
111 */
112 struct omap_hwmod_irq_info {
113 const char *name;
114 s16 irq;
115 };
117 /**
118 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
119 * @name: name of the DMA channel (module local name)
120 * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
121 *
122 * @name should be something short, e.g., "tx" or "rx". It is for use
123 * by platform_get_resource_byname(). It is defined locally to the
124 * hwmod.
125 */
126 struct omap_hwmod_dma_info {
127 const char *name;
128 s16 dma_req;
129 };
131 /**
132 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
133 * @name: name of the reset line (module local name)
134 * @rst_shift: Offset of the reset bit
135 * @st_shift: Offset of the reset status bit (OMAP2/3 only)
136 *
137 * @name should be something short, e.g., "cpu0" or "rst". It is defined
138 * locally to the hwmod.
139 */
140 struct omap_hwmod_rst_info {
141 const char *name;
142 u8 rst_shift;
143 u8 st_shift;
144 };
146 /**
147 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
148 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
149 * @clk: opt clock: OMAP clock name
150 * @_clk: pointer to the struct clk (filled in at runtime)
151 *
152 * The module's interface clock and main functional clock should not
153 * be added as optional clocks.
154 */
155 struct omap_hwmod_opt_clk {
156 const char *role;
157 const char *clk;
158 struct clk *_clk;
159 };
162 /* omap_hwmod_omap2_firewall.flags bits */
163 #define OMAP_FIREWALL_L3 (1 << 0)
164 #define OMAP_FIREWALL_L4 (1 << 1)
166 /**
167 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
168 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
169 * @l4_fw_region: L4 firewall region ID
170 * @l4_prot_group: L4 protection group ID
171 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
172 */
173 struct omap_hwmod_omap2_firewall {
174 u8 l3_perm_bit;
175 u8 l4_fw_region;
176 u8 l4_prot_group;
177 u8 flags;
178 };
181 /*
182 * omap_hwmod_addr_space.flags bits
183 *
184 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
185 * ADDR_TYPE_RT: Address space contains module register target data.
186 */
187 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
188 #define ADDR_TYPE_RT (1 << 1)
190 /**
191 * struct omap_hwmod_addr_space - address space handled by the hwmod
192 * @name: name of the address space
193 * @pa_start: starting physical address
194 * @pa_end: ending physical address
195 * @flags: (see omap_hwmod_addr_space.flags macros above)
196 *
197 * Address space doesn't necessarily follow physical interconnect
198 * structure. GPMC is one example.
199 */
200 struct omap_hwmod_addr_space {
201 const char *name;
202 u32 pa_start;
203 u32 pa_end;
204 u8 flags;
205 };
208 /*
209 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
210 * interface to interact with the hwmod. Used to add sleep dependencies
211 * when the module is enabled or disabled.
212 */
213 #define OCP_USER_MPU (1 << 0)
214 #define OCP_USER_SDMA (1 << 1)
216 /* omap_hwmod_ocp_if.flags bits */
217 #define OCPIF_SWSUP_IDLE (1 << 0)
218 #define OCPIF_CAN_BURST (1 << 1)
220 /**
221 * struct omap_hwmod_ocp_if - OCP interface data
222 * @master: struct omap_hwmod that initiates OCP transactions on this link
223 * @slave: struct omap_hwmod that responds to OCP transactions on this link
224 * @addr: address space associated with this link
225 * @clk: interface clock: OMAP clock name
226 * @_clk: pointer to the interface struct clk (filled in at runtime)
227 * @fw: interface firewall data
228 * @width: OCP data width
229 * @user: initiators using this interface (see OCP_USER_* macros above)
230 * @flags: OCP interface flags (see OCPIF_* macros above)
231 *
232 * It may also be useful to add a tag_cnt field for OCP2.x devices.
233 *
234 * Parameter names beginning with an underscore are managed internally by
235 * the omap_hwmod code and should not be set during initialization.
236 */
237 struct omap_hwmod_ocp_if {
238 struct omap_hwmod *master;
239 struct omap_hwmod *slave;
240 struct omap_hwmod_addr_space *addr;
241 const char *clk;
242 struct clk *_clk;
243 union {
244 struct omap_hwmod_omap2_firewall omap2;
245 } fw;
246 u8 width;
247 u8 user;
248 u8 flags;
249 };
252 /* Macros for use in struct omap_hwmod_sysconfig */
254 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
255 #define MASTER_STANDBY_SHIFT 4
256 #define SLAVE_IDLE_SHIFT 0
257 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
258 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
259 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
260 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
261 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
262 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
263 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
264 #define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
266 /* omap_hwmod_sysconfig.sysc_flags capability flags */
267 #define SYSC_HAS_AUTOIDLE (1 << 0)
268 #define SYSC_HAS_SOFTRESET (1 << 1)
269 #define SYSC_HAS_ENAWAKEUP (1 << 2)
270 #define SYSC_HAS_EMUFREE (1 << 3)
271 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
272 #define SYSC_HAS_SIDLEMODE (1 << 5)
273 #define SYSC_HAS_MIDLEMODE (1 << 6)
274 #define SYSS_HAS_RESET_STATUS (1 << 7)
275 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
276 #define SYSC_HAS_RESET_STATUS (1 << 9)
278 /* omap_hwmod_sysconfig.clockact flags */
279 #define CLOCKACT_TEST_BOTH 0x0
280 #define CLOCKACT_TEST_MAIN 0x1
281 #define CLOCKACT_TEST_ICLK 0x2
282 #define CLOCKACT_TEST_NONE 0x3
284 /**
285 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
286 * @midle_shift: Offset of the midle bit
287 * @clkact_shift: Offset of the clockactivity bit
288 * @sidle_shift: Offset of the sidle bit
289 * @enwkup_shift: Offset of the enawakeup bit
290 * @srst_shift: Offset of the softreset bit
291 * @autoidle_shift: Offset of the autoidle bit
292 */
293 struct omap_hwmod_sysc_fields {
294 u8 midle_shift;
295 u8 clkact_shift;
296 u8 sidle_shift;
297 u8 enwkup_shift;
298 u8 srst_shift;
299 u8 autoidle_shift;
300 };
302 /**
303 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
304 * @rev_offs: IP block revision register offset (from module base addr)
305 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
306 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
307 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
308 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
309 * @clockact: the default value of the module CLOCKACTIVITY bits
310 *
311 * @clockact describes to the module which clocks are likely to be
312 * disabled when the PRCM issues its idle request to the module. Some
313 * modules have separate clockdomains for the interface clock and main
314 * functional clock, and can check whether they should acknowledge the
315 * idle request based on the internal module functionality that has
316 * been associated with the clocks marked in @clockact. This field is
317 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
318 *
319 * @sysc_fields: structure containing the offset positions of various bits in
320 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
321 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
322 * whether the device ip is compliant with the original PRCM protocol
323 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
324 * If the device follows a different scheme for the sysconfig register ,
325 * then this field has to be populated with the correct offset structure.
326 */
327 struct omap_hwmod_class_sysconfig {
328 u16 rev_offs;
329 u16 sysc_offs;
330 u16 syss_offs;
331 u16 sysc_flags;
332 u8 idlemodes;
333 u8 clockact;
334 struct omap_hwmod_sysc_fields *sysc_fields;
335 };
337 /**
338 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
339 * @module_offs: PRCM submodule offset from the start of the PRM/CM
340 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
341 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
342 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
343 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
344 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
345 *
346 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
347 * WKEN, GRPSEL registers. In an ideal world, no extra information
348 * would be needed for IDLEST information, but alas, there are some
349 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
350 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
351 */
352 struct omap_hwmod_omap2_prcm {
353 s16 module_offs;
354 u8 prcm_reg_id;
355 u8 module_bit;
356 u8 idlest_reg_id;
357 u8 idlest_idle_bit;
358 u8 idlest_stdby_bit;
359 };
362 /**
363 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
364 * @clkctrl_reg: PRCM address of the clock control register
365 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
366 * @submodule_wkdep_bit: bit shift of the WKDEP range
367 */
368 struct omap_hwmod_omap4_prcm {
369 u16 clkctrl_offs;
370 u16 rstctrl_offs;
371 u16 context_offs;
372 u8 submodule_wkdep_bit;
373 u8 modulemode;
374 };
377 /*
378 * omap_hwmod.flags definitions
379 *
380 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
381 * of idle, rather than relying on module smart-idle
382 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
383 * of standby, rather than relying on module smart-standby
384 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
385 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
386 * XXX Should be HWMOD_SETUP_NO_RESET
387 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
388 * controller, etc. XXX probably belongs outside the main hwmod file
389 * XXX Should be HWMOD_SETUP_NO_IDLE
390 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
391 * when module is enabled, rather than the default, which is to
392 * enable autoidle
393 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
394 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
395 * only for few initiator modules on OMAP2 & 3.
396 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
397 * This is needed for devices like DSS that require optional clocks enabled
398 * in order to complete the reset. Optional clocks will be disabled
399 * again after the reset.
400 * HWMOD_16BIT_REG: Module has 16bit registers
401 */
402 #define HWMOD_SWSUP_SIDLE (1 << 0)
403 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
404 #define HWMOD_INIT_NO_RESET (1 << 2)
405 #define HWMOD_INIT_NO_IDLE (1 << 3)
406 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
407 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
408 #define HWMOD_NO_IDLEST (1 << 6)
409 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
410 #define HWMOD_16BIT_REG (1 << 8)
412 /*
413 * omap_hwmod._int_flags definitions
414 * These are for internal use only and are managed by the omap_hwmod code.
415 *
416 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
417 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
418 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
419 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
420 * causes the first call to _enable() to only update the pinmux
421 */
422 #define _HWMOD_NO_MPU_PORT (1 << 0)
423 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
424 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
425 #define _HWMOD_SKIP_ENABLE (1 << 3)
427 /*
428 * omap_hwmod._state definitions
429 *
430 * INITIALIZED: reset (optionally), initialized, enabled, disabled
431 * (optionally)
432 *
433 *
434 */
435 #define _HWMOD_STATE_UNKNOWN 0
436 #define _HWMOD_STATE_REGISTERED 1
437 #define _HWMOD_STATE_CLKS_INITED 2
438 #define _HWMOD_STATE_INITIALIZED 3
439 #define _HWMOD_STATE_ENABLED 4
440 #define _HWMOD_STATE_IDLE 5
441 #define _HWMOD_STATE_DISABLED 6
443 /**
444 * struct omap_hwmod_class - the type of an IP block
445 * @name: name of the hwmod_class
446 * @sysc: device SYSCONFIG/SYSSTATUS register data
447 * @rev: revision of the IP class
448 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
449 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
450 *
451 * Represent the class of a OMAP hardware "modules" (e.g. timer,
452 * smartreflex, gpio, uart...)
453 *
454 * @pre_shutdown is a function that will be run immediately before
455 * hwmod clocks are disabled, etc. It is intended for use for hwmods
456 * like the MPU watchdog, which cannot be disabled with the standard
457 * omap_hwmod_shutdown(). The function should return 0 upon success,
458 * or some negative error upon failure. Returning an error will cause
459 * omap_hwmod_shutdown() to abort the device shutdown and return an
460 * error.
461 *
462 * If @reset is defined, then the function it points to will be
463 * executed in place of the standard hwmod _reset() code in
464 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have
465 * unusual reset sequences - usually processor IP blocks like the IVA.
466 */
467 struct omap_hwmod_class {
468 const char *name;
469 struct omap_hwmod_class_sysconfig *sysc;
470 u32 rev;
471 int (*pre_shutdown)(struct omap_hwmod *oh);
472 int (*reset)(struct omap_hwmod *oh);
473 };
475 /**
476 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
477 * @name: name of the hwmod
478 * @class: struct omap_hwmod_class * to the class of this hwmod
479 * @od: struct omap_device currently associated with this hwmod (internal use)
480 * @mpu_irqs: ptr to an array of MPU IRQs
481 * @sdma_reqs: ptr to an array of System DMA request IDs
482 * @prcm: PRCM data pertaining to this hwmod
483 * @main_clk: main clock: OMAP clock name
484 * @_clk: pointer to the main struct clk (filled in at runtime)
485 * @opt_clks: other device clocks that drivers can request (0..*)
486 * @vdd_name: voltage domain name
487 * @voltdm: pointer to voltage domain (filled in at runtime)
488 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
489 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
490 * @dev_attr: arbitrary device attributes that can be passed to the driver
491 * @_sysc_cache: internal-use hwmod flags
492 * @_mpu_rt_va: cached register target start address (internal use)
493 * @_mpu_port_index: cached MPU register target slave ID (internal use)
494 * @opt_clks_cnt: number of @opt_clks
495 * @master_cnt: number of @master entries
496 * @slaves_cnt: number of @slave entries
497 * @response_lat: device OCP response latency (in interface clock cycles)
498 * @_int_flags: internal-use hwmod flags
499 * @_state: internal-use hwmod state
500 * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
501 * @flags: hwmod flags (documented below)
502 * @_lock: spinlock serializing operations on this hwmod
503 * @node: list node for hwmod list (internal use)
504 *
505 * @main_clk refers to this module's "main clock," which for our
506 * purposes is defined as "the functional clock needed for register
507 * accesses to complete." Modules may not have a main clock if the
508 * interface clock also serves as a main clock.
509 *
510 * Parameter names beginning with an underscore are managed internally by
511 * the omap_hwmod code and should not be set during initialization.
512 */
513 struct omap_hwmod {
514 const char *name;
515 struct omap_hwmod_class *class;
516 struct omap_device *od;
517 struct omap_hwmod_mux_info *mux;
518 struct omap_hwmod_irq_info *mpu_irqs;
519 struct omap_hwmod_dma_info *sdma_reqs;
520 struct omap_hwmod_rst_info *rst_lines;
521 union {
522 struct omap_hwmod_omap2_prcm omap2;
523 struct omap_hwmod_omap4_prcm omap4;
524 } prcm;
525 const char *main_clk;
526 struct clk *_clk;
527 struct omap_hwmod_opt_clk *opt_clks;
528 char *clkdm_name;
529 struct clockdomain *clkdm;
530 char *vdd_name;
531 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
532 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
533 void *dev_attr;
534 u32 _sysc_cache;
535 void __iomem *_mpu_rt_va;
536 spinlock_t _lock;
537 struct list_head node;
538 u16 flags;
539 u8 _mpu_port_index;
540 u8 response_lat;
541 u8 rst_lines_cnt;
542 u8 opt_clks_cnt;
543 u8 masters_cnt;
544 u8 slaves_cnt;
545 u8 hwmods_cnt;
546 u8 _int_flags;
547 u8 _state;
548 u8 _postsetup_state;
549 };
551 int omap_hwmod_register(struct omap_hwmod **ohs);
552 struct omap_hwmod *omap_hwmod_lookup(const char *name);
553 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
554 void *data);
556 int __init omap_hwmod_setup_one(const char *name);
558 int omap_hwmod_enable(struct omap_hwmod *oh);
559 int _omap_hwmod_enable(struct omap_hwmod *oh);
560 int omap_hwmod_idle(struct omap_hwmod *oh);
561 int _omap_hwmod_idle(struct omap_hwmod *oh);
562 int omap_hwmod_shutdown(struct omap_hwmod *oh);
564 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
565 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
566 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
568 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
569 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
571 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
572 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
574 int omap_hwmod_reset(struct omap_hwmod *oh);
575 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
577 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
578 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
579 int omap_hwmod_softreset(struct omap_hwmod *oh);
581 int omap_hwmod_count_resources(struct omap_hwmod *oh);
582 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
584 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
585 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
587 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
588 struct omap_hwmod *init_oh);
589 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
590 struct omap_hwmod *init_oh);
592 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
593 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
594 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
595 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
597 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
598 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
600 int omap_hwmod_for_each_by_class(const char *classname,
601 int (*fn)(struct omap_hwmod *oh,
602 void *user),
603 void *user);
605 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
606 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
608 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
610 /*
611 * Chip variant-specific hwmod init routines - XXX should be converted
612 * to use initcalls once the initial boot ordering is straightened out
613 */
614 extern int omap2420_hwmod_init(void);
615 extern int omap2430_hwmod_init(void);
616 extern int omap3xxx_hwmod_init(void);
617 extern int omap44xx_hwmod_init(void);
619 #endif